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kernel os linux

dt-bindings: net: Add Realtek MDIO controller

Add dtschema for the MDIO controller found in the RTL9300 Ethernet
switch. The controller is slightly unusual in that direct MDIO
communication is not possible. We model the MDIO controller with the
MDIO buses as child nodes and the PHYs as children of the buses. The
mapping of switch port number to MDIO bus/addr requires the
ethernet-ports sibling to provide the mapping via the phy-handle
property.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250218195216.1034220-4-chris.packham@alliedtelesis.co.nz
Signed-off-by: Jakub Kicinski <kuba@kernel.org>

authored by

Chris Packham and committed by
Jakub Kicinski
96757457 92575a21

+117
+86
Documentation/devicetree/bindings/net/realtek,rtl9301-mdio.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/net/realtek,rtl9301-mdio.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Realtek RTL9300 MDIO Controller 8 + 9 + maintainers: 10 + - Chris Packham <chris.packham@alliedtelesis.co.nz> 11 + 12 + properties: 13 + compatible: 14 + oneOf: 15 + - items: 16 + - enum: 17 + - realtek,rtl9302b-mdio 18 + - realtek,rtl9302c-mdio 19 + - realtek,rtl9303-mdio 20 + - const: realtek,rtl9301-mdio 21 + - const: realtek,rtl9301-mdio 22 + 23 + '#address-cells': 24 + const: 1 25 + 26 + '#size-cells': 27 + const: 0 28 + 29 + reg: 30 + maxItems: 1 31 + 32 + patternProperties: 33 + '^mdio-bus@[0-3]$': 34 + $ref: mdio.yaml# 35 + 36 + properties: 37 + reg: 38 + maxItems: 1 39 + 40 + required: 41 + - reg 42 + 43 + patternProperties: 44 + '^ethernet-phy@[a-f0-9]+$': 45 + type: object 46 + $ref: ethernet-phy.yaml# 47 + unevaluatedProperties: false 48 + 49 + unevaluatedProperties: false 50 + 51 + required: 52 + - compatible 53 + - reg 54 + 55 + unevaluatedProperties: false 56 + 57 + examples: 58 + - | 59 + mdio-controller@ca00 { 60 + compatible = "realtek,rtl9301-mdio"; 61 + reg = <0xca00 0x200>; 62 + #address-cells = <1>; 63 + #size-cells = <0>; 64 + 65 + mdio-bus@0 { 66 + reg = <0>; 67 + #address-cells = <1>; 68 + #size-cells = <0>; 69 + 70 + ethernet-phy@0 { 71 + compatible = "ethernet-phy-ieee802.3-c45"; 72 + reg = <0>; 73 + }; 74 + }; 75 + 76 + mdio-bus@1 { 77 + reg = <1>; 78 + #address-cells = <1>; 79 + #size-cells = <0>; 80 + 81 + ethernet-phy@0 { 82 + compatible = "ethernet-phy-ieee802.3-c45"; 83 + reg = <0>; 84 + }; 85 + }; 86 + };
+31
Documentation/devicetree/bindings/net/realtek,rtl9301-switch.yaml
··· 54 54 'i2c@[0-9a-f]+$': 55 55 $ref: /schemas/i2c/realtek,rtl9301-i2c.yaml# 56 56 57 + 'mdio-controller@[0-9a-f]+$': 58 + $ref: realtek,rtl9301-mdio.yaml# 59 + 57 60 required: 58 61 - compatible 59 62 - reg ··· 132 129 }; 133 130 }; 134 131 132 + mdio-controller@ca00 { 133 + compatible = "realtek,rtl9301-mdio"; 134 + reg = <0xca00 0x200>; 135 + #address-cells = <1>; 136 + #size-cells = <0>; 137 + 138 + mdio-bus@0 { 139 + reg = <0>; 140 + #address-cells = <1>; 141 + #size-cells = <0>; 142 + 143 + phy1: ethernet-phy@0 { 144 + reg = <0>; 145 + }; 146 + }; 147 + mdio-bus@1 { 148 + reg = <1>; 149 + #address-cells = <1>; 150 + #size-cells = <0>; 151 + 152 + phy2: ethernet-phy@0 { 153 + reg = <0>; 154 + }; 155 + }; 156 + }; 157 + 135 158 ethernet-ports { 136 159 #address-cells = <1>; 137 160 #size-cells = <0>; 138 161 139 162 port@0 { 140 163 reg = <0>; 164 + phy-handle = <&phy1>; 141 165 }; 142 166 port@1 { 143 167 reg = <1>; 168 + phy-handle = <&phy2>; 144 169 }; 145 170 }; 146 171 };