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Merge tag 'spi-fix-v6.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

Pull spi fixes from Mark Brown:
"A fairly small pile of fixes, plus one new compatible string addition
to the Synopsis driver for a new platform.

The most notable thing is the fix for divide by zeros in spi-mem if an
operation has no dummy bytes"

* tag 'spi-fix-v6.15-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi:
spi: tegra114: Don't fail set_cs_timing when delays are zero
spi: spi-qpic-snand: fix NAND_READ_LOCATION_2 register handling
spi: spi-mem: Add fix to avoid divide error
spi: dt-bindings: snps,dw-apb-ssi: Add compatible for SOPHGO SG2042 SoC
spi: dt-bindings: snps,dw-apb-ssi: Merge duplicate compatible entry
spi: spi-qpic-snand: propagate errors from qcom_spi_block_erase()
spi: stm32-ospi: Fix an error handling path in stm32_ospi_probe()

Linus Torvalds 95d3481a b6a218ff

+21 -19
unified split
+7 -12
Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.yaml
··· 56 enum: 57 - snps,dw-apb-ssi 58 - snps,dwc-ssi-1.01a 59 - - description: Microsemi Ocelot/Jaguar2 SoC SPI Controller 60 - items: 61 - - enum: 62 - - mscc,ocelot-spi 63 - - mscc,jaguar2-spi 64 - - const: snps,dw-apb-ssi 65 - description: Microchip Sparx5 SoC SPI Controller 66 const: microchip,sparx5-spi 67 - description: Amazon Alpine SPI Controller 68 const: amazon,alpine-dw-apb-ssi 69 - - description: Renesas RZ/N1 SPI Controller 70 items: 71 - - const: renesas,rzn1-spi 72 - const: snps,dw-apb-ssi 73 - description: Intel Keem Bay SPI Controller 74 const: intel,keembay-ssi ··· 87 - renesas,r9a06g032-spi # RZ/N1D 88 - renesas,r9a06g033-spi # RZ/N1S 89 - const: renesas,rzn1-spi # RZ/N1 90 - - description: T-HEAD TH1520 SoC SPI Controller 91 - items: 92 - - const: thead,th1520-spi 93 - - const: snps,dw-apb-ssi 94 95 reg: 96 minItems: 1
··· 56 enum: 57 - snps,dw-apb-ssi 58 - snps,dwc-ssi-1.01a 59 - description: Microchip Sparx5 SoC SPI Controller 60 const: microchip,sparx5-spi 61 - description: Amazon Alpine SPI Controller 62 const: amazon,alpine-dw-apb-ssi 63 + - description: Vendor controllers which use snps,dw-apb-ssi as fallback 64 items: 65 + - enum: 66 + - mscc,ocelot-spi 67 + - mscc,jaguar2-spi 68 + - renesas,rzn1-spi 69 + - sophgo,sg2042-spi 70 + - thead,th1520-spi 71 - const: snps,dw-apb-ssi 72 - description: Intel Keem Bay SPI Controller 73 const: intel,keembay-ssi ··· 88 - renesas,r9a06g032-spi # RZ/N1D 89 - renesas,r9a06g033-spi # RZ/N1S 90 - const: renesas,rzn1-spi # RZ/N1 91 92 reg: 93 minItems: 1
+5 -1
drivers/spi/spi-mem.c
··· 596 ns_per_cycles = 1000000000 / op->max_freq; 597 ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1); 598 ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1); 599 - ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1); 600 ncycles += ((op->data.nbytes * 8) / op->data.buswidth) / (op->data.dtr ? 2 : 1); 601 602 return ncycles * ns_per_cycles;
··· 596 ns_per_cycles = 1000000000 / op->max_freq; 597 ncycles += ((op->cmd.nbytes * 8) / op->cmd.buswidth) / (op->cmd.dtr ? 2 : 1); 598 ncycles += ((op->addr.nbytes * 8) / op->addr.buswidth) / (op->addr.dtr ? 2 : 1); 599 + 600 + /* Dummy bytes are optional for some SPI flash memory operations */ 601 + if (op->dummy.nbytes) 602 + ncycles += ((op->dummy.nbytes * 8) / op->dummy.buswidth) / (op->dummy.dtr ? 2 : 1); 603 + 604 ncycles += ((op->data.nbytes * 8) / op->data.buswidth) / (op->data.dtr ? 2 : 1); 605 606 return ncycles * ns_per_cycles;
+2 -3
drivers/spi/spi-qpic-snand.c
··· 142 else if (reg == NAND_READ_LOCATION_1) 143 snandc->regs->read_location1 = locreg_val; 144 else if (reg == NAND_READ_LOCATION_2) 145 - snandc->regs->read_location1 = locreg_val; 146 else if (reg == NAND_READ_LOCATION_3) 147 snandc->regs->read_location3 = locreg_val; 148 } ··· 1307 snandc->qspi->addr1 = cpu_to_le32(s_op.addr1_reg << 16); 1308 snandc->qspi->addr2 = cpu_to_le32(s_op.addr2_reg); 1309 snandc->qspi->cmd = cpu_to_le32(cmd); 1310 - qcom_spi_block_erase(snandc); 1311 - return 0; 1312 default: 1313 break; 1314 }
··· 142 else if (reg == NAND_READ_LOCATION_1) 143 snandc->regs->read_location1 = locreg_val; 144 else if (reg == NAND_READ_LOCATION_2) 145 + snandc->regs->read_location2 = locreg_val; 146 else if (reg == NAND_READ_LOCATION_3) 147 snandc->regs->read_location3 = locreg_val; 148 } ··· 1307 snandc->qspi->addr1 = cpu_to_le32(s_op.addr1_reg << 16); 1308 snandc->qspi->addr2 = cpu_to_le32(s_op.addr2_reg); 1309 snandc->qspi->cmd = cpu_to_le32(cmd); 1310 + return qcom_spi_block_erase(snandc); 1311 default: 1312 break; 1313 }
+4
drivers/spi/spi-stm32-ospi.c
··· 960 err_pm_enable: 961 pm_runtime_force_suspend(ospi->dev); 962 mutex_destroy(&ospi->lock); 963 964 return ret; 965 }
··· 960 err_pm_enable: 961 pm_runtime_force_suspend(ospi->dev); 962 mutex_destroy(&ospi->lock); 963 + if (ospi->dma_chtx) 964 + dma_release_channel(ospi->dma_chtx); 965 + if (ospi->dma_chrx) 966 + dma_release_channel(ospi->dma_chrx); 967 968 return ret; 969 }
+3 -3
drivers/spi/spi-tegra114.c
··· 728 u32 inactive_cycles; 729 u8 cs_state; 730 731 - if (setup->unit != SPI_DELAY_UNIT_SCK || 732 - hold->unit != SPI_DELAY_UNIT_SCK || 733 - inactive->unit != SPI_DELAY_UNIT_SCK) { 734 dev_err(&spi->dev, 735 "Invalid delay unit %d, should be SPI_DELAY_UNIT_SCK\n", 736 SPI_DELAY_UNIT_SCK);
··· 728 u32 inactive_cycles; 729 u8 cs_state; 730 731 + if ((setup->unit && setup->unit != SPI_DELAY_UNIT_SCK) || 732 + (hold->unit && hold->unit != SPI_DELAY_UNIT_SCK) || 733 + (inactive->unit && inactive->unit != SPI_DELAY_UNIT_SCK)) { 734 dev_err(&spi->dev, 735 "Invalid delay unit %d, should be SPI_DELAY_UNIT_SCK\n", 736 SPI_DELAY_UNIT_SCK);