···5050int clk_register(struct clk *);5151void clk_unregister(struct clk *);52525353-/* the exported API, in addition to clk_set_rate */5454-/**5555- * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter5656- * @clk: clock source5757- * @rate: desired clock rate in Hz5858- * @algo_id: algorithm id to be passed down to ops->set_rate5959- *6060- * Returns success (0) or negative errno.6161- */6262-int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id);6363-6453#endif /* __ASM_MIPS_CLOCK_H */
···66 * License. See the file "COPYING" in the main directory of this archive77 * for more details.88 */99-1010-#include <linux/module.h>99+#include <linux/clk.h>1110#include <linux/cpufreq.h>1212-#include <linux/platform_device.h>1111+#include <linux/errno.h>1212+#include <linux/export.h>1313+#include <linux/init.h>1414+#include <linux/list.h>1515+#include <linux/mutex.h>1616+#include <linux/spinlock.h>13171418#include <asm/clock.h>1515-1616-#include <loongson.h>1919+#include <asm/mach-loongson/loongson.h>17201821static LIST_HEAD(clock_list);1922static DEFINE_SPINLOCK(clock_lock);···92899390int clk_set_rate(struct clk *clk, unsigned long rate)9491{9595- return clk_set_rate_ex(clk, rate, 0);9696-}9797-EXPORT_SYMBOL_GPL(clk_set_rate);9898-9999-int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id)100100-{10192 int ret = 0;10293 int regval;10394 int i;···100103 unsigned long flags;101104102105 spin_lock_irqsave(&clock_lock, flags);103103- ret = clk->ops->set_rate(clk, rate, algo_id);106106+ ret = clk->ops->set_rate(clk, rate, 0);104107 spin_unlock_irqrestore(&clock_lock, flags);105108 }106109···126129127130 return ret;128131}129129-EXPORT_SYMBOL_GPL(clk_set_rate_ex);132132+EXPORT_SYMBOL_GPL(clk_set_rate);130133131134long clk_round_rate(struct clk *clk, unsigned long rate)132135{···143146 return rate;144147}145148EXPORT_SYMBOL_GPL(clk_round_rate);146146-147147-/*148148- * This is the simple version of Loongson-2 wait, Maybe we need do this in149149- * interrupt disabled content150150- */151151-152152-DEFINE_SPINLOCK(loongson2_wait_lock);153153-void loongson2_cpu_wait(void)154154-{155155- u32 cpu_freq;156156- unsigned long flags;157157-158158- spin_lock_irqsave(&loongson2_wait_lock, flags);159159- cpu_freq = LOONGSON_CHIPCFG0;160160- LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */161161- LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */162162- spin_unlock_irqrestore(&loongson2_wait_lock, flags);163163-}164164-EXPORT_SYMBOL_GPL(loongson2_cpu_wait);165165-166166-MODULE_AUTHOR("Yanhua <yanh@lemote.com>");167167-MODULE_DESCRIPTION("cpufreq driver for Loongson 2F");168168-MODULE_LICENSE("GPL");
+20-1
arch/mips/kernel/cpufreq/loongson2_cpufreq.c
···19192020#include <asm/clock.h>21212222-#include <loongson.h>2222+#include <asm/mach-loongson/loongson.h>23232424static uint nowait;2525···180180 },181181 .id_table = platform_device_ids,182182};183183+184184+/*185185+ * This is the simple version of Loongson-2 wait, Maybe we need do this in186186+ * interrupt disabled context.187187+ */188188+189189+static DEFINE_SPINLOCK(loongson2_wait_lock);190190+191191+static void loongson2_cpu_wait(void)192192+{193193+ unsigned long flags;194194+ u32 cpu_freq;195195+196196+ spin_lock_irqsave(&loongson2_wait_lock, flags);197197+ cpu_freq = LOONGSON_CHIPCFG0;198198+ LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */199199+ LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */200200+ spin_unlock_irqrestore(&loongson2_wait_lock, flags);201201+}183202184203static int __init cpufreq_init(void)185204{