Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu/soc15: disable doorbell interrupt as part of BACO entry sequence

Workaround to make RAS recovery work in BACO reset.

Signed-off-by: Le Ma <le.ma@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Le Ma and committed by
Alex Deucher
956f6705 402c60d7

+19
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
··· 67 67 bool enable); 68 68 void (*ih_doorbell_range)(struct amdgpu_device *adev, 69 69 bool use_doorbell, int doorbell_index); 70 + void (*enable_doorbell_interrupt)(struct amdgpu_device *adev, 71 + bool enable); 70 72 void (*update_medium_grain_clock_gating)(struct amdgpu_device *adev, 71 73 bool enable); 72 74 void (*update_medium_grain_light_sleep)(struct amdgpu_device *adev,
+8
drivers/gpu/drm/amd/amdgpu/nbio_v7_4.c
··· 502 502 } 503 503 } 504 504 505 + static void nbio_v7_4_enable_doorbell_interrupt(struct amdgpu_device *adev, 506 + bool enable) 507 + { 508 + WREG32_FIELD15(NBIO, 0, BIF_DOORBELL_INT_CNTL, 509 + DOORBELL_INTERRUPT_DISABLE, enable ? 0 : 1); 510 + } 511 + 505 512 const struct amdgpu_nbio_funcs nbio_v7_4_funcs = { 506 513 .get_hdp_flush_req_offset = nbio_v7_4_get_hdp_flush_req_offset, 507 514 .get_hdp_flush_done_offset = nbio_v7_4_get_hdp_flush_done_offset, ··· 523 516 .enable_doorbell_aperture = nbio_v7_4_enable_doorbell_aperture, 524 517 .enable_doorbell_selfring_aperture = nbio_v7_4_enable_doorbell_selfring_aperture, 525 518 .ih_doorbell_range = nbio_v7_4_ih_doorbell_range, 519 + .enable_doorbell_interrupt = nbio_v7_4_enable_doorbell_interrupt, 526 520 .update_medium_grain_clock_gating = nbio_v7_4_update_medium_grain_clock_gating, 527 521 .update_medium_grain_light_sleep = nbio_v7_4_update_medium_grain_light_sleep, 528 522 .get_clockgating_state = nbio_v7_4_get_clockgating_state,
+9
drivers/gpu/drm/amd/amdgpu/soc15.c
··· 493 493 { 494 494 void *pp_handle = adev->powerplay.pp_handle; 495 495 const struct amd_pm_funcs *pp_funcs = adev->powerplay.pp_funcs; 496 + struct amdgpu_ras *ras = amdgpu_ras_get_context(adev); 496 497 497 498 if (!pp_funcs ||!pp_funcs->get_asic_baco_state ||!pp_funcs->set_asic_baco_state) 498 499 return -ENOENT; 500 + 501 + /* avoid NBIF got stuck when do RAS recovery in BACO reset */ 502 + if (ras && ras->supported) 503 + adev->nbio.funcs->enable_doorbell_interrupt(adev, false); 499 504 500 505 /* enter BACO state */ 501 506 if (pp_funcs->set_asic_baco_state(pp_handle, 1)) ··· 509 504 /* exit BACO state */ 510 505 if (pp_funcs->set_asic_baco_state(pp_handle, 0)) 511 506 return -EIO; 507 + 508 + /* re-enable doorbell interrupt after BACO exit */ 509 + if (ras && ras->supported) 510 + adev->nbio.funcs->enable_doorbell_interrupt(adev, true); 512 511 513 512 dev_info(adev->dev, "GPU BACO reset\n"); 514 513