···144144145145 psr = ratio <= 256 * maxfp ? ESAI_xCCR_xPSR_BYPASS : ESAI_xCCR_xPSR_DIV8;146146147147+ /* Do not loop-search if PM (1 ~ 256) alone can serve the ratio */148148+ if (ratio <= 256) {149149+ pm = ratio;150150+ fp = 1;151151+ goto out;152152+ }153153+147154 /* Set the max fluctuation -- 0.1% of the max devisor */148155 savesub = (psr ? 1 : 8) * 256 * maxfp / 1000;149156
+11-3
sound/soc/fsl/fsl_ssi.c
···217217 * @dai_fmt: DAI configuration this device is currently used with218218 * @streams: Mask of current active streams: BIT(TX) and BIT(RX)219219 * @i2s_net: I2S and Network mode configurations of SCR register220220+ * (this is the initial settings based on the DAI format)220221 * @synchronous: Use synchronous mode - both of TX and RX use STCK and SFCK221222 * @use_dma: DMA is used or FIQ with stream filter222223 * @use_dual_fifo: DMA with support for dual FIFO mode···830829 }831830832831 if (!fsl_ssi_is_ac97(ssi)) {832832+ /*833833+ * Keep the ssi->i2s_net intact while having a local variable834834+ * to override settings for special use cases. Otherwise, the835835+ * ssi->i2s_net will lose the settings for regular use cases.836836+ */837837+ u8 i2s_net = ssi->i2s_net;838838+833839 /* Normal + Network mode to send 16-bit data in 32-bit frames */834840 if (fsl_ssi_is_i2s_cbm_cfs(ssi) && sample_size == 16)835835- ssi->i2s_net = SSI_SCR_I2S_MODE_NORMAL | SSI_SCR_NET;841841+ i2s_net = SSI_SCR_I2S_MODE_NORMAL | SSI_SCR_NET;836842837843 /* Use Normal mode to send mono data at 1st slot of 2 slots */838844 if (channels == 1)839839- ssi->i2s_net = SSI_SCR_I2S_MODE_NORMAL;845845+ i2s_net = SSI_SCR_I2S_MODE_NORMAL;840846841847 regmap_update_bits(regs, REG_SSI_SCR,842842- SSI_SCR_I2S_NET_MASK, ssi->i2s_net);848848+ SSI_SCR_I2S_NET_MASK, i2s_net);843849 }844850845851 /* In synchronous mode, the SSI uses STCCR for capture */
+13-9
sound/soc/intel/Kconfig
···7272 for Baytrail Chromebooks but this option is now deprecated and is7373 not recommended, use SND_SST_ATOM_HIFI2_PLATFORM instead.74747575+config SND_SST_ATOM_HIFI2_PLATFORM7676+ tristate7777+ select SND_SOC_COMPRESS7878+7579config SND_SST_ATOM_HIFI2_PLATFORM_PCI7676- tristate "PCI HiFi2 (Medfield, Merrifield) Platforms"8080+ tristate "PCI HiFi2 (Merrifield) Platforms"7781 depends on X86 && PCI7882 select SND_SST_IPC_PCI7979- select SND_SOC_COMPRESS8383+ select SND_SST_ATOM_HIFI2_PLATFORM8084 help8181- If you have a Intel Medfield or Merrifield/Edison platform, then8585+ If you have a Intel Merrifield/Edison platform, then8286 enable this option by saying Y or m. Distros will typically not8383- enable this option: Medfield devices are not available to8484- developers and while Merrifield/Edison can run a mainline kernel with8585- limited functionality it will require a firmware file which8686- is not in the standard firmware tree8787+ enable this option: while Merrifield/Edison can run a mainline8888+ kernel with limited functionality it will require a firmware file8989+ which is not in the standard firmware tree87908888-config SND_SST_ATOM_HIFI2_PLATFORM9191+config SND_SST_ATOM_HIFI2_PLATFORM_ACPI8992 tristate "ACPI HiFi2 (Baytrail, Cherrytrail) Platforms"9393+ default ACPI9094 depends on X86 && ACPI9195 select SND_SST_IPC_ACPI9292- select SND_SOC_COMPRESS9696+ select SND_SST_ATOM_HIFI2_PLATFORM9397 select SND_SOC_ACPI_INTEL_MATCH9498 select IOSF_MBI9599 help
+11-3
sound/soc/omap/omap-dmic.c
···281281static int omap_dmic_select_fclk(struct omap_dmic *dmic, int clk_id,282282 unsigned int freq)283283{284284- struct clk *parent_clk;284284+ struct clk *parent_clk, *mux;285285 char *parent_clk_name;286286 int ret = 0;287287···329329 return -ENODEV;330330 }331331332332+ mux = clk_get_parent(dmic->fclk);333333+ if (IS_ERR(mux)) {334334+ dev_err(dmic->dev, "can't get fck mux parent\n");335335+ clk_put(parent_clk);336336+ return -ENODEV;337337+ }338338+332339 mutex_lock(&dmic->mutex);333340 if (dmic->active) {334341 /* disable clock while reparenting */335342 pm_runtime_put_sync(dmic->dev);336336- ret = clk_set_parent(dmic->fclk, parent_clk);343343+ ret = clk_set_parent(mux, parent_clk);337344 pm_runtime_get_sync(dmic->dev);338345 } else {339339- ret = clk_set_parent(dmic->fclk, parent_clk);346346+ ret = clk_set_parent(mux, parent_clk);340347 }341348 mutex_unlock(&dmic->mutex);342349···356349 dmic->fclk_freq = freq;357350358351err_busy:352352+ clk_put(mux);359353 clk_put(parent_clk);360354361355 return ret;
+2-2
sound/soc/sh/rcar/core.c
···15731573 return ret;15741574}1575157515761576-static int rsnd_suspend(struct device *dev)15761576+static int __maybe_unused rsnd_suspend(struct device *dev)15771577{15781578 struct rsnd_priv *priv = dev_get_drvdata(dev);15791579···15821582 return 0;15831583}1584158415851585-static int rsnd_resume(struct device *dev)15851585+static int __maybe_unused rsnd_resume(struct device *dev)15861586{15871587 struct rsnd_priv *priv = dev_get_drvdata(dev);15881588