Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: net: wireless: describe the ath12k AHB module for IPQ5332

Add device-tree bindings for the ATH12K module found in the IPQ5332
device.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Raj Kumar Bhagat <quic_rajkbhag@quicinc.com>
Link: https://patch.msgid.link/20250321-ath12k-ahb-v12-1-bb389ed76ae5@quicinc.com
Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com>

authored by

Raj Kumar Bhagat and committed by
Jeff Johnson
94fcd39c ce077937

+315
+315
Documentation/devicetree/bindings/net/wireless/qcom,ipq5332-wifi.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + # Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. 3 + %YAML 1.2 4 + --- 5 + $id: http://devicetree.org/schemas/net/wireless/qcom,ipq5332-wifi.yaml# 6 + $schema: http://devicetree.org/meta-schemas/core.yaml# 7 + 8 + title: Qualcomm Technologies ath12k wireless devices (AHB) 9 + 10 + maintainers: 11 + - Jeff Johnson <jjohnson@kernel.org> 12 + 13 + description: 14 + Qualcomm Technologies IEEE 802.11be AHB devices. 15 + 16 + properties: 17 + compatible: 18 + enum: 19 + - qcom,ipq5332-wifi 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + clocks: 25 + items: 26 + - description: XO clock used for copy engine 27 + 28 + clock-names: 29 + items: 30 + - const: xo 31 + 32 + interrupts: 33 + items: 34 + - description: Fatal interrupt 35 + - description: Ready interrupt 36 + - description: Spawn acknowledge interrupt 37 + - description: Stop acknowledge interrupt 38 + - description: misc-pulse1 interrupt events 39 + - description: misc-latch interrupt events 40 + - description: sw exception interrupt events 41 + - description: interrupt event for ring CE0 42 + - description: interrupt event for ring CE1 43 + - description: interrupt event for ring CE2 44 + - description: interrupt event for ring CE3 45 + - description: interrupt event for ring CE4 46 + - description: interrupt event for ring CE5 47 + - description: interrupt event for ring CE6 48 + - description: interrupt event for ring CE7 49 + - description: interrupt event for ring CE8 50 + - description: interrupt event for ring CE9 51 + - description: interrupt event for ring CE10 52 + - description: interrupt event for ring CE11 53 + - description: interrupt event for ring host2wbm-desc-feed 54 + - description: interrupt event for ring host2reo-re-injection 55 + - description: interrupt event for ring host2reo-command 56 + - description: interrupt event for ring host2rxdma-monitor-ring1 57 + - description: interrupt event for ring reo2ost-exception 58 + - description: interrupt event for ring wbm2host-rx-release 59 + - description: interrupt event for ring reo2host-status 60 + - description: interrupt event for ring reo2host-destination-ring4 61 + - description: interrupt event for ring reo2host-destination-ring3 62 + - description: interrupt event for ring reo2host-destination-ring2 63 + - description: interrupt event for ring reo2host-destination-ring1 64 + - description: interrupt event for ring rxdma2host-monitor-destination-mac3 65 + - description: interrupt event for ring rxdma2host-monitor-destination-mac2 66 + - description: interrupt event for ring rxdma2host-monitor-destination-mac1 67 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac3 68 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac2 69 + - description: interrupt event for ring host2rxdma-host-buf-ring-mac1 70 + - description: interrupt event for ring host2tcl-input-ring4 71 + - description: interrupt event for ring host2tcl-input-ring3 72 + - description: interrupt event for ring host2tcl-input-ring2 73 + - description: interrupt event for ring host2tcl-input-ring1 74 + - description: interrupt event for ring wbm2host-tx-completions-ring4 75 + - description: interrupt event for ring wbm2host-tx-completions-ring3 76 + - description: interrupt event for ring wbm2host-tx-completions-ring2 77 + - description: interrupt event for ring wbm2host-tx-completions-ring1 78 + - description: interrupt event for ring host2tx-monitor-ring1 79 + - description: interrupt event for ring txmon2host-monitor-destination-mac3 80 + - description: interrupt event for ring txmon2host-monitor-destination-mac2 81 + - description: interrupt event for ring txmon2host-monitor-destination-mac1 82 + - description: interrupt event for umac-reset 83 + 84 + interrupt-names: 85 + items: 86 + - const: fatal 87 + - const: ready 88 + - const: spawn 89 + - const: stop-ack 90 + - const: misc-pulse1 91 + - const: misc-latch 92 + - const: sw-exception 93 + - const: ce0 94 + - const: ce1 95 + - const: ce2 96 + - const: ce3 97 + - const: ce4 98 + - const: ce5 99 + - const: ce6 100 + - const: ce7 101 + - const: ce8 102 + - const: ce9 103 + - const: ce10 104 + - const: ce11 105 + - const: host2wbm-desc-feed 106 + - const: host2reo-re-injection 107 + - const: host2reo-command 108 + - const: host2rxdma-monitor-ring1 109 + - const: reo2ost-exception 110 + - const: wbm2host-rx-release 111 + - const: reo2host-status 112 + - const: reo2host-destination-ring4 113 + - const: reo2host-destination-ring3 114 + - const: reo2host-destination-ring2 115 + - const: reo2host-destination-ring1 116 + - const: rxdma2host-monitor-destination-mac3 117 + - const: rxdma2host-monitor-destination-mac2 118 + - const: rxdma2host-monitor-destination-mac1 119 + - const: host2rxdma-host-buf-ring-mac3 120 + - const: host2rxdma-host-buf-ring-mac2 121 + - const: host2rxdma-host-buf-ring-mac1 122 + - const: host2tcl-input-ring4 123 + - const: host2tcl-input-ring3 124 + - const: host2tcl-input-ring2 125 + - const: host2tcl-input-ring1 126 + - const: wbm2host-tx-completions-ring4 127 + - const: wbm2host-tx-completions-ring3 128 + - const: wbm2host-tx-completions-ring2 129 + - const: wbm2host-tx-completions-ring1 130 + - const: host2tx-monitor-ring1 131 + - const: txmon2host-monitor-destination-mac3 132 + - const: txmon2host-monitor-destination-mac2 133 + - const: txmon2host-monitor-destination-mac1 134 + - const: umac-reset 135 + 136 + memory-region: 137 + description: 138 + Memory regions used by the ath12k firmware. 139 + items: 140 + - description: Q6 memory region 141 + - description: m3 dump memory region 142 + - description: Q6 caldata memory region 143 + - description: Multi Link Operation (MLO) Global memory region 144 + 145 + memory-region-names: 146 + items: 147 + - const: q6-region 148 + - const: m3-dump 149 + - const: q6-caldb 150 + - const: mlo-global-mem 151 + 152 + qcom,calibration-variant: 153 + $ref: /schemas/types.yaml#/definitions/string 154 + description: 155 + String to uniquely identify variant of the calibration data for designs 156 + with colliding bus and device ids 157 + 158 + qcom,rproc: 159 + $ref: /schemas/types.yaml#/definitions/phandle 160 + description: 161 + Phandle to the Qualcomm Hexagon DSP(q6 remote processor), which is utilized 162 + for offloading WiFi processing tasks, this q6 remote processor operates in 163 + conjunction with WiFi. 164 + 165 + qcom,smem-states: 166 + $ref: /schemas/types.yaml#/definitions/phandle-array 167 + description: States used by the AP to signal the remote processor 168 + items: 169 + - description: Shutdown WCSS pd 170 + - description: Stop WCSS pd 171 + - description: Spawn WCSS pd 172 + 173 + qcom,smem-state-names: 174 + description: 175 + Names of the states used by the AP to signal the remote processor 176 + items: 177 + - const: shutdown 178 + - const: stop 179 + - const: spawn 180 + 181 + required: 182 + - compatible 183 + - reg 184 + - clocks 185 + - clock-names 186 + - interrupts 187 + - interrupt-names 188 + - memory-region 189 + - memory-region-names 190 + - qcom,rproc 191 + - qcom,smem-states 192 + - qcom,smem-state-names 193 + 194 + additionalProperties: false 195 + 196 + examples: 197 + - | 198 + #include <dt-bindings/interrupt-controller/arm-gic.h> 199 + #include <dt-bindings/clock/qcom,ipq5332-gcc.h> 200 + 201 + wifi0: wifi@c000000 { 202 + compatible = "qcom,ipq5332-wifi"; 203 + reg = <0x0c000000 0x1000000>; 204 + clocks = <&gcc GCC_XO_CLK>; 205 + clock-names = "xo"; 206 + interrupts-extended = <&wcss_smp2p_in 8 IRQ_TYPE_NONE>, 207 + <&wcss_smp2p_in 9 IRQ_TYPE_NONE>, 208 + <&wcss_smp2p_in 12 IRQ_TYPE_NONE>, 209 + <&wcss_smp2p_in 11 IRQ_TYPE_NONE>, 210 + <&intc GIC_SPI 559 IRQ_TYPE_EDGE_RISING>, 211 + <&intc GIC_SPI 560 IRQ_TYPE_EDGE_RISING>, 212 + <&intc GIC_SPI 561 IRQ_TYPE_EDGE_RISING>, 213 + <&intc GIC_SPI 422 IRQ_TYPE_EDGE_RISING>, 214 + <&intc GIC_SPI 423 IRQ_TYPE_EDGE_RISING>, 215 + <&intc GIC_SPI 424 IRQ_TYPE_EDGE_RISING>, 216 + <&intc GIC_SPI 425 IRQ_TYPE_EDGE_RISING>, 217 + <&intc GIC_SPI 426 IRQ_TYPE_EDGE_RISING>, 218 + <&intc GIC_SPI 427 IRQ_TYPE_EDGE_RISING>, 219 + <&intc GIC_SPI 428 IRQ_TYPE_EDGE_RISING>, 220 + <&intc GIC_SPI 429 IRQ_TYPE_EDGE_RISING>, 221 + <&intc GIC_SPI 430 IRQ_TYPE_EDGE_RISING>, 222 + <&intc GIC_SPI 431 IRQ_TYPE_EDGE_RISING>, 223 + <&intc GIC_SPI 432 IRQ_TYPE_EDGE_RISING>, 224 + <&intc GIC_SPI 433 IRQ_TYPE_EDGE_RISING>, 225 + <&intc GIC_SPI 491 IRQ_TYPE_EDGE_RISING>, 226 + <&intc GIC_SPI 495 IRQ_TYPE_EDGE_RISING>, 227 + <&intc GIC_SPI 493 IRQ_TYPE_EDGE_RISING>, 228 + <&intc GIC_SPI 544 IRQ_TYPE_EDGE_RISING>, 229 + <&intc GIC_SPI 457 IRQ_TYPE_EDGE_RISING>, 230 + <&intc GIC_SPI 466 IRQ_TYPE_EDGE_RISING>, 231 + <&intc GIC_SPI 497 IRQ_TYPE_EDGE_RISING>, 232 + <&intc GIC_SPI 454 IRQ_TYPE_EDGE_RISING>, 233 + <&intc GIC_SPI 453 IRQ_TYPE_EDGE_RISING>, 234 + <&intc GIC_SPI 452 IRQ_TYPE_EDGE_RISING>, 235 + <&intc GIC_SPI 451 IRQ_TYPE_EDGE_RISING>, 236 + <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>, 237 + <&intc GIC_SPI 488 IRQ_TYPE_EDGE_RISING>, 238 + <&intc GIC_SPI 484 IRQ_TYPE_EDGE_RISING>, 239 + <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>, 240 + <&intc GIC_SPI 554 IRQ_TYPE_EDGE_RISING>, 241 + <&intc GIC_SPI 549 IRQ_TYPE_EDGE_RISING>, 242 + <&intc GIC_SPI 507 IRQ_TYPE_EDGE_RISING>, 243 + <&intc GIC_SPI 500 IRQ_TYPE_EDGE_RISING>, 244 + <&intc GIC_SPI 499 IRQ_TYPE_EDGE_RISING>, 245 + <&intc GIC_SPI 498 IRQ_TYPE_EDGE_RISING>, 246 + <&intc GIC_SPI 450 IRQ_TYPE_EDGE_RISING>, 247 + <&intc GIC_SPI 449 IRQ_TYPE_EDGE_RISING>, 248 + <&intc GIC_SPI 448 IRQ_TYPE_EDGE_RISING>, 249 + <&intc GIC_SPI 447 IRQ_TYPE_EDGE_RISING>, 250 + <&intc GIC_SPI 543 IRQ_TYPE_EDGE_RISING>, 251 + <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>, 252 + <&intc GIC_SPI 486 IRQ_TYPE_EDGE_RISING>, 253 + <&intc GIC_SPI 482 IRQ_TYPE_EDGE_RISING>, 254 + <&intc GIC_SPI 419 IRQ_TYPE_EDGE_RISING>; 255 + interrupt-names = "fatal", 256 + "ready", 257 + "spawn", 258 + "stop-ack", 259 + "misc-pulse1", 260 + "misc-latch", 261 + "sw-exception", 262 + "ce0", 263 + "ce1", 264 + "ce2", 265 + "ce3", 266 + "ce4", 267 + "ce5", 268 + "ce6", 269 + "ce7", 270 + "ce8", 271 + "ce9", 272 + "ce10", 273 + "ce11", 274 + "host2wbm-desc-feed", 275 + "host2reo-re-injection", 276 + "host2reo-command", 277 + "host2rxdma-monitor-ring1", 278 + "reo2ost-exception", 279 + "wbm2host-rx-release", 280 + "reo2host-status", 281 + "reo2host-destination-ring4", 282 + "reo2host-destination-ring3", 283 + "reo2host-destination-ring2", 284 + "reo2host-destination-ring1", 285 + "rxdma2host-monitor-destination-mac3", 286 + "rxdma2host-monitor-destination-mac2", 287 + "rxdma2host-monitor-destination-mac1", 288 + "host2rxdma-host-buf-ring-mac3", 289 + "host2rxdma-host-buf-ring-mac2", 290 + "host2rxdma-host-buf-ring-mac1", 291 + "host2tcl-input-ring4", 292 + "host2tcl-input-ring3", 293 + "host2tcl-input-ring2", 294 + "host2tcl-input-ring1", 295 + "wbm2host-tx-completions-ring4", 296 + "wbm2host-tx-completions-ring3", 297 + "wbm2host-tx-completions-ring2", 298 + "wbm2host-tx-completions-ring1", 299 + "host2tx-monitor-ring1", 300 + "txmon2host-monitor-destination-mac3", 301 + "txmon2host-monitor-destination-mac2", 302 + "txmon2host-monitor-destination-mac1", 303 + "umac-reset"; 304 + 305 + memory-region = <&q6_region>, <&m3_dump>, <&q6_caldb>, <&mlo_mem>; 306 + memory-region-names = "q6-region", "m3-dump", "q6-caldb", "mlo-global-mem"; 307 + qcom,calibration-variant = "RDP441_1"; 308 + qcom,rproc = <&q6v5_wcss>; 309 + qcom,smem-states = <&wcss_smp2p_out 8>, 310 + <&wcss_smp2p_out 9>, 311 + <&wcss_smp2p_out 10>; 312 + qcom,smem-state-names = "shutdown", 313 + "stop", 314 + "spawn"; 315 + };