Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

perf arm64: Sync ESR_ELx_EC_* macros in arm64_exception_types.h with esr.h

Update perf util arm64_exception_types.h to match the exception class
macros defined in tools/arch/arm64/include/asm/esr.h.

This ensures consistency between perf tooling and the kernel header
definitions for ESR_ELx_EC_* values.

In v2, ESR_ELx_EC_OTHER and ESR_ELx_EC_GCS, which were missing in v1, were
included.

Reviewed-by: Leo Yan <leo.yan@arm.com>
Signed-off-by: Yunseong Kim <ysk@kzalloc.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Ian Rogers <irogers@google.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: John Garry <john.g.garry@oracle.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Leo Yan <leo.yan@linux.dev>
Cc: Levi Yun <yeoreum.yun@arm.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20250822145855.53071-2-ysk@kzalloc.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>

authored by

Yunseong Kim and committed by
Arnaldo Carvalho de Melo
94d4dfbb baa03483

+10 -5
+10 -5
tools/perf/arch/arm64/util/arm64_exception_types.h
··· 31 31 #define ESR_ELx_EC_FP_ASIMD (0x07) 32 32 #define ESR_ELx_EC_CP10_ID (0x08) /* EL2 only */ 33 33 #define ESR_ELx_EC_PAC (0x09) /* EL2 and above */ 34 - /* Unallocated EC: 0x0A - 0x0B */ 34 + #define ESR_ELx_EC_OTHER (0x0A) 35 + /* Unallocated EC: 0x0B */ 35 36 #define ESR_ELx_EC_CP14_64 (0x0C) 36 - /* Unallocated EC: 0x0d */ 37 + #define ESR_ELx_EC_BTI (0x0D) 37 38 #define ESR_ELx_EC_ILL (0x0E) 38 39 /* Unallocated EC: 0x0F - 0x10 */ 39 40 #define ESR_ELx_EC_SVC32 (0x11) ··· 47 46 #define ESR_ELx_EC_SYS64 (0x18) 48 47 #define ESR_ELx_EC_SVE (0x19) 49 48 #define ESR_ELx_EC_ERET (0x1a) /* EL2 only */ 50 - /* Unallocated EC: 0x1b - 0x1E */ 49 + /* Unallocated EC: 0x1B */ 50 + #define ESR_ELx_EC_FPAC (0x1C) /* EL1 and above */ 51 + #define ESR_ELx_EC_SME (0x1D) 52 + /* Unallocated EC: 0x1E */ 51 53 #define ESR_ELx_EC_IMP_DEF (0x1f) /* EL3 only */ 52 54 #define ESR_ELx_EC_IABT_LOW (0x20) 53 55 #define ESR_ELx_EC_IABT_CUR (0x21) ··· 59 55 #define ESR_ELx_EC_DABT_LOW (0x24) 60 56 #define ESR_ELx_EC_DABT_CUR (0x25) 61 57 #define ESR_ELx_EC_SP_ALIGN (0x26) 62 - /* Unallocated EC: 0x27 */ 58 + #define ESR_ELx_EC_MOPS (0x27) 63 59 #define ESR_ELx_EC_FP_EXC32 (0x28) 64 60 /* Unallocated EC: 0x29 - 0x2B */ 65 61 #define ESR_ELx_EC_FP_EXC64 (0x2C) 66 - /* Unallocated EC: 0x2D - 0x2E */ 62 + #define ESR_ELx_EC_GCS (0x2D) 63 + /* Unallocated EC: 0x2E */ 67 64 #define ESR_ELx_EC_SERROR (0x2F) 68 65 #define ESR_ELx_EC_BREAKPT_LOW (0x30) 69 66 #define ESR_ELx_EC_BREAKPT_CUR (0x31)