powerpc/4xx: DTS: Add Add'l SDRAM0 Compatible and Interrupt Info

Added additional information for type and compatibility strings and
interrupt information to the SDRAM0 memory-controller device tree
nodes for AMCC PowerPC 405EX[r]-based boards to facilitate binding
with the new "ibm,sdram-4xx-ddr2" EDAC memory controller adapter driver.

Signed-off-by: Grant Erickson <gerickson@nuovations.com>
Acked-by: Stefan Roese <sr@denx.de>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

authored by Grant Erickson and committed by Josh Boyer 94ce1c58 f3b8436a

+12 -3
+4 -1
arch/powerpc/boot/dts/haleakala.dts
··· 89 clock-frequency = <0>; /* Filled in by U-Boot */ 90 91 SDRAM0: memory-controller { 92 - compatible = "ibm,sdram-405exr"; 93 dcr-reg = <0x010 0x002>; 94 }; 95 96 MAL0: mcmal {
··· 89 clock-frequency = <0>; /* Filled in by U-Boot */ 90 91 SDRAM0: memory-controller { 92 + compatible = "ibm,sdram-405exr", "ibm,sdram-4xx-ddr2"; 93 dcr-reg = <0x010 0x002>; 94 + interrupt-parent = <&UIC2>; 95 + interrupts = <0x5 0x4 /* ECC DED Error */ 96 + 0x6 0x4>; /* ECC SEC Error */ 97 }; 98 99 MAL0: mcmal {
+4 -1
arch/powerpc/boot/dts/kilauea.dts
··· 90 clock-frequency = <0>; /* Filled in by U-Boot */ 91 92 SDRAM0: memory-controller { 93 - compatible = "ibm,sdram-405ex"; 94 dcr-reg = <0x010 0x002>; 95 }; 96 97 MAL0: mcmal {
··· 90 clock-frequency = <0>; /* Filled in by U-Boot */ 91 92 SDRAM0: memory-controller { 93 + compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; 94 dcr-reg = <0x010 0x002>; 95 + interrupt-parent = <&UIC2>; 96 + interrupts = <0x5 0x4 /* ECC DED Error */ 97 + 0x6 0x4>; /* ECC SEC Error */ 98 }; 99 100 MAL0: mcmal {
+4 -1
arch/powerpc/boot/dts/makalu.dts
··· 90 clock-frequency = <0>; /* Filled in by U-Boot */ 91 92 SDRAM0: memory-controller { 93 - compatible = "ibm,sdram-405ex"; 94 dcr-reg = <0x010 0x002>; 95 }; 96 97 MAL0: mcmal {
··· 90 clock-frequency = <0>; /* Filled in by U-Boot */ 91 92 SDRAM0: memory-controller { 93 + compatible = "ibm,sdram-405ex", "ibm,sdram-4xx-ddr2"; 94 dcr-reg = <0x010 0x002>; 95 + interrupt-parent = <&UIC2>; 96 + interrupts = <0x5 0x4 /* ECC DED Error */ 97 + 0x6 0x4 /* ECC SEC Error */ >; 98 }; 99 100 MAL0: mcmal {