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dt-bindings: arm: mediatek: move ethsys controller & convert to DT schema

DT schema helps validating DTS files. Binding was moved to clock/ as
this hardware is a clock provider. Example required a small fix for
"reg" value (1 address cell + 1 size cell).

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231119212416.2682-1-zajec5@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Rafał Miłecki and committed by
Stephen Boyd
94b0f301 39118392

+54 -29
-29
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
··· 1 - Mediatek ethsys controller 2 - ============================ 3 - 4 - The Mediatek ethsys controller provides various clocks to the system. 5 - 6 - Required Properties: 7 - 8 - - compatible: Should be: 9 - - "mediatek,mt2701-ethsys", "syscon" 10 - - "mediatek,mt7622-ethsys", "syscon" 11 - - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon" 12 - - "mediatek,mt7629-ethsys", "syscon" 13 - - "mediatek,mt7981-ethsys", "syscon" 14 - - "mediatek,mt7986-ethsys", "syscon" 15 - - #clock-cells: Must be 1 16 - - #reset-cells: Must be 1 17 - 18 - The ethsys controller uses the common clk binding from 19 - Documentation/devicetree/bindings/clock/clock-bindings.txt 20 - The available clocks are defined in dt-bindings/clock/mt*-clk.h. 21 - 22 - Example: 23 - 24 - ethsys: clock-controller@1b000000 { 25 - compatible = "mediatek,mt2701-ethsys", "syscon"; 26 - reg = <0 0x1b000000 0 0x1000>; 27 - #clock-cells = <1>; 28 - #reset-cells = <1>; 29 - };
+54
Documentation/devicetree/bindings/clock/mediatek,ethsys.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/clock/mediatek,ethsys.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: Mediatek ethsys controller 8 + 9 + description: 10 + The available clocks are defined in dt-bindings/clock/mt*-clk.h. 11 + 12 + maintainers: 13 + - James Liao <jamesjj.liao@mediatek.com> 14 + 15 + properties: 16 + compatible: 17 + oneOf: 18 + - items: 19 + - enum: 20 + - mediatek,mt2701-ethsys 21 + - mediatek,mt7622-ethsys 22 + - mediatek,mt7629-ethsys 23 + - mediatek,mt7981-ethsys 24 + - mediatek,mt7986-ethsys 25 + - const: syscon 26 + - items: 27 + - const: mediatek,mt7623-ethsys 28 + - const: mediatek,mt2701-ethsys 29 + - const: syscon 30 + 31 + reg: 32 + maxItems: 1 33 + 34 + "#clock-cells": 35 + const: 1 36 + 37 + "#reset-cells": 38 + const: 1 39 + 40 + required: 41 + - reg 42 + - "#clock-cells" 43 + - "#reset-cells" 44 + 45 + additionalProperties: false 46 + 47 + examples: 48 + - | 49 + clock-controller@1b000000 { 50 + compatible = "mediatek,mt2701-ethsys", "syscon"; 51 + reg = <0x1b000000 0x1000>; 52 + #clock-cells = <1>; 53 + #reset-cells = <1>; 54 + };