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dt-bindings: reset: Fix typo in imx8mq resets

Some of the mipi dsi resets were called

IMX8MQ_RESET_MIPI_DIS__

instead of

IMX8MQ_RESET_MIPI_DSI__

Since they're DSI related this looks like a typo. This fixes the
only in tree user as well to not break bisecting.

Signed-off-by: Guido Günther <agx@sigxcpu.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

authored by

Guido Günther and committed by
Philipp Zabel 942b4c10 e2557157

+9 -9
+6 -6
drivers/reset/reset-imx7.c
··· 169 169 [IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) }, 170 170 [IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) }, 171 171 [IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) }, 172 - [IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) }, 173 - [IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) }, 174 - [IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) }, 172 + [IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) }, 173 + [IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) }, 174 + [IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) }, 175 175 [IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR, 176 176 BIT(2) | BIT(1) }, 177 177 [IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) }, ··· 220 220 221 221 case IMX8MQ_RESET_PCIE_CTRL_APPS_EN: 222 222 case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */ 223 - case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */ 224 - case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */ 225 - case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */ 223 + case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */ 224 + case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */ 225 + case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */ 226 226 case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */ 227 227 case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */ 228 228 value = assert ? 0 : bit;
+3 -3
include/dt-bindings/reset/imx8mq-reset.h
··· 31 31 #define IMX8MQ_RESET_OTG2_PHY_RESET 20 32 32 #define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21 33 33 #define IMX8MQ_RESET_MIPI_DSI_RESET_N 22 34 - #define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23 35 - #define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24 36 - #define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25 34 + #define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23 35 + #define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24 36 + #define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25 37 37 #define IMX8MQ_RESET_PCIEPHY 26 38 38 #define IMX8MQ_RESET_PCIEPHY_PERST 27 39 39 #define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28