tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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ARM: dts: dra7: Use sdhci-omap programming model

Use sdhci-omap programming model based on the generic sdhci
library for programming the eMMC/SD/SDIO controller.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

authored by

Kishon Vijay Abraham I and committed by
Tony Lindgren 940293af 01c5d966

+19 -22
+2 -2
arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
··· 444 444 vmmc-supply = <&vdd_3v3>; 445 445 vqmmc-supply = <&vdd_3v3>; 446 446 bus-width = <8>; 447 - ti,non-removable; 448 - cap-mmc-dual-data-rate; 447 + non-removable; 448 + no-1-8-v; 449 449 }; 450 450 451 451 &sata {
+1
arch/arm/boot/dts/am57xx-beagle-x15.dts
··· 25 25 pinctrl-1 = <&mmc1_pins_hs>; 26 26 27 27 vmmc-supply = <&ldo1_reg>; 28 + no-1-8-v; 28 29 }; 29 30 30 31 &mmc2 {
+2 -1
arch/arm/boot/dts/am57xx-idk-common.dtsi
··· 412 412 vmmc-supply = <&v3_3d>; 413 413 vqmmc-supply = <&v3_3d>; 414 414 bus-width = <8>; 415 - ti,non-removable; 415 + non-removable; 416 416 max-frequency = <96000000>; 417 + no-1-8-v; 417 418 }; 418 419 419 420 &dcan1 {
+1
arch/arm/boot/dts/dra7-evm.dts
··· 377 377 vmmc-supply = <&evm_1v8_sw>; 378 378 vqmmc-supply = <&evm_1v8_sw>; 379 379 bus-width = <8>; 380 + non-removable; 380 381 pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; 381 382 pinctrl-0 = <&mmc2_pins_default>; 382 383 pinctrl-1 = <&mmc2_pins_hs>;
+10 -17
arch/arm/boot/dts/dra7.dtsi
··· 1079 1079 }; 1080 1080 1081 1081 mmc1: mmc@4809c000 { 1082 - compatible = "ti,omap4-hsmmc"; 1082 + compatible = "ti,dra7-sdhci"; 1083 1083 reg = <0x4809c000 0x400>; 1084 1084 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 1085 1085 ti,hwmods = "mmc1"; 1086 - ti,dual-volt; 1087 - ti,needs-special-reset; 1088 - dmas = <&sdma_xbar 61>, <&sdma_xbar 62>; 1089 - dma-names = "tx", "rx"; 1090 1086 status = "disabled"; 1091 1087 pbias-supply = <&pbias_mmc_reg>; 1092 1088 max-frequency = <192000000>; ··· 1096 1100 }; 1097 1101 1098 1102 mmc2: mmc@480b4000 { 1099 - compatible = "ti,omap4-hsmmc"; 1103 + compatible = "ti,dra7-sdhci"; 1100 1104 reg = <0x480b4000 0x400>; 1101 1105 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; 1102 1106 ti,hwmods = "mmc2"; 1103 - ti,needs-special-reset; 1104 - dmas = <&sdma_xbar 47>, <&sdma_xbar 48>; 1105 - dma-names = "tx", "rx"; 1106 1107 status = "disabled"; 1107 1108 max-frequency = <192000000>; 1109 + /* SDR104/DDR50/SDR50 bits in CAPA2 is not supported */ 1110 + sdhci-caps-mask = <0x7 0x0>; 1108 1111 }; 1109 1112 1110 1113 mmc3: mmc@480ad000 { 1111 - compatible = "ti,omap4-hsmmc"; 1114 + compatible = "ti,dra7-sdhci"; 1112 1115 reg = <0x480ad000 0x400>; 1113 1116 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; 1114 1117 ti,hwmods = "mmc3"; 1115 - ti,needs-special-reset; 1116 - dmas = <&sdma_xbar 77>, <&sdma_xbar 78>; 1117 - dma-names = "tx", "rx"; 1118 1118 status = "disabled"; 1119 1119 /* Errata i887 limits max-frequency of MMC3 to 64 MHz */ 1120 1120 max-frequency = <64000000>; 1121 + /* SDMA is not supported */ 1122 + sdhci-caps-mask = <0x0 0x400000>; 1121 1123 }; 1122 1124 1123 1125 mmc4: mmc@480d1000 { 1124 - compatible = "ti,omap4-hsmmc"; 1126 + compatible = "ti,dra7-sdhci"; 1125 1127 reg = <0x480d1000 0x400>; 1126 1128 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 1127 1129 ti,hwmods = "mmc4"; 1128 - ti,needs-special-reset; 1129 - dmas = <&sdma_xbar 57>, <&sdma_xbar 58>; 1130 - dma-names = "tx", "rx"; 1131 1130 status = "disabled"; 1132 1131 max-frequency = <192000000>; 1132 + /* SDMA is not supported */ 1133 + sdhci-caps-mask = <0x0 0x400000>; 1133 1134 }; 1134 1135 1135 1136 mmu0_dsp1: mmu@40d01000 {
+1 -1
arch/arm/boot/dts/dra72-evm-common.dtsi
··· 413 413 pinctrl-names = "default"; 414 414 pinctrl-0 = <&mmc2_pins_default>; 415 415 bus-width = <8>; 416 - ti,non-removable; 416 + non-removable; 417 417 max-frequency = <192000000>; 418 418 }; 419 419
+2 -1
arch/arm/boot/dts/dra76-evm.dts
··· 327 327 &mmc1 { 328 328 status = "okay"; 329 329 vmmc-supply = <&vio_3v3_sd>; 330 - vmmc_aux-supply = <&ldo4_reg>; 330 + vqmmc-supply = <&ldo4_reg>; 331 331 bus-width = <4>; 332 332 /* 333 333 * SDCD signal is not being used here - using the fact that GPIO mode ··· 344 344 vmmc-supply = <&vio_1v8>; 345 345 vqmmc-supply = <&vio_1v8>; 346 346 bus-width = <8>; 347 + non-removable; 347 348 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v"; 348 349 pinctrl-0 = <&mmc2_pins_default>; 349 350 pinctrl-1 = <&mmc2_pins_default>;