Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/i915/display: Disintegrate sink alpm enable from psr with lobf

Make a generic alpm enable function for sink which can be used for
PSR2/PR/Lobf.

v1: Initial version.
v2: Move code comment to intel_psr_needs_alpm(). [Jouni]

Signed-off-by: Animesh Manna <animesh.manna@intel.com>
Reviewed-by: Jouni Högander <jouni.hogander@intel.com>
Link: https://lore.kernel.org/r/20250423092334.2294483-12-animesh.manna@intel.com

+24 -24
+20 -1
drivers/gpu/drm/i915/display/intel_alpm.c
··· 426 426 } 427 427 } 428 428 429 + static void intel_alpm_enable_sink(struct intel_dp *intel_dp, 430 + const struct intel_crtc_state *crtc_state) 431 + { 432 + u8 val; 433 + 434 + if (!intel_psr_needs_alpm(intel_dp, crtc_state) && !crtc_state->has_lobf) 435 + return; 436 + 437 + val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE; 438 + 439 + if (crtc_state->has_panel_replay || (crtc_state->has_lobf && 440 + intel_alpm_aux_less_wake_supported(intel_dp))) 441 + val |= DP_ALPM_MODE_AUX_LESS; 442 + 443 + drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val); 444 + } 445 + 429 446 void intel_alpm_post_plane_update(struct intel_atomic_state *state, 430 447 struct intel_crtc *crtc) 431 448 { ··· 466 449 467 450 intel_dp = enc_to_intel_dp(encoder); 468 451 469 - if (intel_dp_is_edp(intel_dp)) 452 + if (intel_dp_is_edp(intel_dp)) { 453 + intel_alpm_enable_sink(intel_dp, crtc_state); 470 454 intel_alpm_configure(intel_dp, crtc_state); 455 + } 471 456 } 472 457 } 473 458
+4 -23
drivers/gpu/drm/i915/display/intel_psr.c
··· 796 796 drm_dp_dpcd_writeb(&intel_dp->aux, DP_PSR_EN_CFG, val); 797 797 } 798 798 799 - static void intel_psr_enable_sink_alpm(struct intel_dp *intel_dp, 800 - const struct intel_crtc_state *crtc_state) 801 - { 802 - u8 val; 803 - 804 - /* 805 - * eDP Panel Replay uses always ALPM 806 - * PSR2 uses ALPM but PSR1 doesn't 807 - */ 808 - if (!intel_dp_is_edp(intel_dp) || (!crtc_state->has_panel_replay && 809 - !crtc_state->has_sel_update)) 810 - return; 811 - 812 - val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE; 813 - 814 - if (crtc_state->has_panel_replay) 815 - val |= DP_ALPM_MODE_AUX_LESS; 816 - 817 - drm_dp_dpcd_writeb(&intel_dp->aux, DP_RECEIVER_ALPM_CONFIG, val); 818 - } 819 - 820 799 static void intel_psr_enable_sink(struct intel_dp *intel_dp, 821 800 const struct intel_crtc_state *crtc_state) 822 801 { 823 - intel_psr_enable_sink_alpm(intel_dp, crtc_state); 824 - 825 802 crtc_state->has_panel_replay ? 826 803 _panel_replay_enable_sink(intel_dp, crtc_state) : 827 804 _psr_enable_sink(intel_dp, crtc_state); ··· 4172 4195 4173 4196 bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) 4174 4197 { 4198 + /* 4199 + * eDP Panel Replay uses always ALPM 4200 + * PSR2 uses ALPM but PSR1 doesn't 4201 + */ 4175 4202 return intel_dp_is_edp(intel_dp) && (crtc_state->has_sel_update || 4176 4203 crtc_state->has_panel_replay); 4177 4204 }