Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[ARM] 4151/1: AT91 / AVR32: Move at91_pdc.h to linux/atmel_pdc.h

The Atmel AT91 and AVR32 processor architectures share many of the same
peripherals. The PDC (Peripheral Data Controller) registers are also
implemented within in a number of the on-chip peripherals (eg, USART,
MMC, SPI, SSC, etc).

In a attempt not to duplicate the register definitions in each
peripheral, or in each architecture, the at91_pdc.h header in
asm-arm/arch-at91 and asm-avr32/arch-at32ap has been replaced with
linux/atmel_pdc.h.

The definitions have also been renamed from AT91_PDC_* to ATMEL_PDC_*,
and the drivers updated accordingly.

Original patch from Nicolas Ferre.

Signed-off-by: Andrew Victor <andrew@sanpeople.com>
Acked-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Andrew Victor and committed by
Russell King
93a3ddc2 da11d02c

+61 -96
+23 -23
drivers/mmc/at91_mci.c
··· 64 64 #include <linux/err.h> 65 65 #include <linux/dma-mapping.h> 66 66 #include <linux/clk.h> 67 + #include <linux/atmel_pdc.h> 67 68 68 69 #include <linux/mmc/host.h> 69 70 #include <linux/mmc/protocol.h> ··· 76 75 #include <asm/arch/cpu.h> 77 76 #include <asm/arch/gpio.h> 78 77 #include <asm/arch/at91_mci.h> 79 - #include <asm/arch/at91_pdc.h> 80 78 81 79 #define DRIVER_NAME "at91_mci" 82 80 ··· 211 211 212 212 /* Check to see if this needs filling */ 213 213 if (i == 0) { 214 - if (at91_mci_read(host, AT91_PDC_RCR) != 0) { 214 + if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) { 215 215 pr_debug("Transfer active in current\n"); 216 216 continue; 217 217 } 218 218 } 219 219 else { 220 - if (at91_mci_read(host, AT91_PDC_RNCR) != 0) { 220 + if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) { 221 221 pr_debug("Transfer active in next\n"); 222 222 continue; 223 223 } ··· 234 234 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length); 235 235 236 236 if (i == 0) { 237 - at91_mci_write(host, AT91_PDC_RPR, sg->dma_address); 238 - at91_mci_write(host, AT91_PDC_RCR, sg->length / 4); 237 + at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address); 238 + at91_mci_write(host, ATMEL_PDC_RCR, sg->length / 4); 239 239 } 240 240 else { 241 - at91_mci_write(host, AT91_PDC_RNPR, sg->dma_address); 242 - at91_mci_write(host, AT91_PDC_RNCR, sg->length / 4); 241 + at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address); 242 + at91_mci_write(host, ATMEL_PDC_RNCR, sg->length / 4); 243 243 } 244 244 } 245 245 ··· 303 303 at91mci_pre_dma_read(host); 304 304 else { 305 305 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF); 306 - at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); 306 + at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 307 307 } 308 308 309 309 pr_debug("post dma read done\n"); ··· 320 320 pr_debug("Handling the transmit\n"); 321 321 322 322 /* Disable the transfer */ 323 - at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); 323 + at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 324 324 325 325 /* Now wait for cmd ready */ 326 326 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE); ··· 431 431 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR)); 432 432 433 433 if (!data) { 434 - at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTDIS | AT91_PDC_RXTDIS); 435 - at91_mci_write(host, AT91_PDC_RPR, 0); 436 - at91_mci_write(host, AT91_PDC_RCR, 0); 437 - at91_mci_write(host, AT91_PDC_RNPR, 0); 438 - at91_mci_write(host, AT91_PDC_RNCR, 0); 439 - at91_mci_write(host, AT91_PDC_TPR, 0); 440 - at91_mci_write(host, AT91_PDC_TCR, 0); 441 - at91_mci_write(host, AT91_PDC_TNPR, 0); 442 - at91_mci_write(host, AT91_PDC_TNCR, 0); 434 + at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS); 435 + at91_mci_write(host, ATMEL_PDC_RPR, 0); 436 + at91_mci_write(host, ATMEL_PDC_RCR, 0); 437 + at91_mci_write(host, ATMEL_PDC_RNPR, 0); 438 + at91_mci_write(host, ATMEL_PDC_RNCR, 0); 439 + at91_mci_write(host, ATMEL_PDC_TPR, 0); 440 + at91_mci_write(host, ATMEL_PDC_TCR, 0); 441 + at91_mci_write(host, ATMEL_PDC_TNPR, 0); 442 + at91_mci_write(host, ATMEL_PDC_TNCR, 0); 443 443 444 444 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg); 445 445 at91_mci_write(host, AT91_MCI_CMDR, cmdr); ··· 452 452 /* 453 453 * Disable the PDC controller 454 454 */ 455 - at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTDIS | AT91_PDC_TXTDIS); 455 + at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 456 456 457 457 if (cmdr & AT91_MCI_TRCMD_START) { 458 458 data->bytes_xfered = 0; ··· 481 481 482 482 pr_debug("Transmitting %d bytes\n", host->total_length); 483 483 484 - at91_mci_write(host, AT91_PDC_TPR, host->physical_address); 485 - at91_mci_write(host, AT91_PDC_TCR, host->total_length / 4); 484 + at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address); 485 + at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4); 486 486 ier = AT91_MCI_TXBUFE; 487 487 } 488 488 } ··· 497 497 498 498 if (cmdr & AT91_MCI_TRCMD_START) { 499 499 if (cmdr & AT91_MCI_TRDIR) 500 - at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_RXTEN); 500 + at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN); 501 501 else 502 - at91_mci_write(host, AT91_PDC_PTCR, AT91_PDC_TXTEN); 502 + at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN); 503 503 } 504 504 return ier; 505 505 }
+2 -1
drivers/serial/atmel_serial.c
··· 33 33 #include <linux/sysrq.h> 34 34 #include <linux/tty_flip.h> 35 35 #include <linux/platform_device.h> 36 + #include <linux/atmel_pdc.h> 36 37 37 38 #include <asm/io.h> 38 39 39 40 #include <asm/mach/serial_at91.h> 40 41 #include <asm/arch/board.h> 41 - #include <asm/arch/at91_pdc.h> 42 + 42 43 #ifdef CONFIG_ARM 43 44 #include <asm/arch/cpu.h> 44 45 #include <asm/arch/gpio.h>
-36
include/asm-arm/arch-at91/at91_pdc.h
··· 1 - /* 2 - * include/asm-arm/arch-at91/at91_pdc.h 3 - * 4 - * Copyright (C) 2005 Ivan Kokshaysky 5 - * Copyright (C) SAN People 6 - * 7 - * Peripheral Data Controller (PDC) registers. 8 - * Based on AT91RM9200 datasheet revision E. 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - */ 15 - 16 - #ifndef AT91_PDC_H 17 - #define AT91_PDC_H 18 - 19 - #define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ 20 - #define AT91_PDC_RCR 0x104 /* Receive Counter Register */ 21 - #define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ 22 - #define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ 23 - #define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ 24 - #define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ 25 - #define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ 26 - #define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ 27 - 28 - #define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ 29 - #define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ 30 - #define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ 31 - #define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ 32 - #define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ 33 - 34 - #define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ 35 - 36 - #endif
-36
include/asm-avr32/arch-at32ap/at91_pdc.h
··· 1 - /* 2 - * include/asm-arm/arch-at91/at91_pdc.h 3 - * 4 - * Copyright (C) 2005 Ivan Kokshaysky 5 - * Copyright (C) SAN People 6 - * 7 - * Peripheral Data Controller (PDC) registers. 8 - * Based on AT91RM9200 datasheet revision E. 9 - * 10 - * This program is free software; you can redistribute it and/or modify 11 - * it under the terms of the GNU General Public License as published by 12 - * the Free Software Foundation; either version 2 of the License, or 13 - * (at your option) any later version. 14 - */ 15 - 16 - #ifndef AT91_PDC_H 17 - #define AT91_PDC_H 18 - 19 - #define AT91_PDC_RPR 0x100 /* Receive Pointer Register */ 20 - #define AT91_PDC_RCR 0x104 /* Receive Counter Register */ 21 - #define AT91_PDC_TPR 0x108 /* Transmit Pointer Register */ 22 - #define AT91_PDC_TCR 0x10c /* Transmit Counter Register */ 23 - #define AT91_PDC_RNPR 0x110 /* Receive Next Pointer Register */ 24 - #define AT91_PDC_RNCR 0x114 /* Receive Next Counter Register */ 25 - #define AT91_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ 26 - #define AT91_PDC_TNCR 0x11c /* Transmit Next Counter Register */ 27 - 28 - #define AT91_PDC_PTCR 0x120 /* Transfer Control Register */ 29 - #define AT91_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ 30 - #define AT91_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ 31 - #define AT91_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ 32 - #define AT91_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ 33 - 34 - #define AT91_PDC_PTSR 0x124 /* Transfer Status Register */ 35 - 36 - #endif
+36
include/linux/atmel_pdc.h
··· 1 + /* 2 + * include/linux/atmel_pdc.h 3 + * 4 + * Copyright (C) 2005 Ivan Kokshaysky 5 + * Copyright (C) SAN People 6 + * 7 + * Peripheral Data Controller (PDC) registers. 8 + * Based on AT91RM9200 datasheet revision E. 9 + * 10 + * This program is free software; you can redistribute it and/or modify 11 + * it under the terms of the GNU General Public License as published by 12 + * the Free Software Foundation; either version 2 of the License, or 13 + * (at your option) any later version. 14 + */ 15 + 16 + #ifndef ATMEL_PDC_H 17 + #define ATMEL_PDC_H 18 + 19 + #define ATMEL_PDC_RPR 0x100 /* Receive Pointer Register */ 20 + #define ATMEL_PDC_RCR 0x104 /* Receive Counter Register */ 21 + #define ATMEL_PDC_TPR 0x108 /* Transmit Pointer Register */ 22 + #define ATMEL_PDC_TCR 0x10c /* Transmit Counter Register */ 23 + #define ATMEL_PDC_RNPR 0x110 /* Receive Next Pointer Register */ 24 + #define ATMEL_PDC_RNCR 0x114 /* Receive Next Counter Register */ 25 + #define ATMEL_PDC_TNPR 0x118 /* Transmit Next Pointer Register */ 26 + #define ATMEL_PDC_TNCR 0x11c /* Transmit Next Counter Register */ 27 + 28 + #define ATMEL_PDC_PTCR 0x120 /* Transfer Control Register */ 29 + #define ATMEL_PDC_RXTEN (1 << 0) /* Receiver Transfer Enable */ 30 + #define ATMEL_PDC_RXTDIS (1 << 1) /* Receiver Transfer Disable */ 31 + #define ATMEL_PDC_TXTEN (1 << 8) /* Transmitter Transfer Enable */ 32 + #define ATMEL_PDC_TXTDIS (1 << 9) /* Transmitter Transfer Disable */ 33 + 34 + #define ATMEL_PDC_PTSR 0x124 /* Transfer Status Register */ 35 + 36 + #endif