[MIPS] Malta: Fix build errors for 64-bit kernels

Fix 64-bit Malta by using CKSEG0ADDR and correct casts.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by Thomas Bogendoerfer and committed by Ralf Baechle 938b2b14 1f34f2e4

+4 -4
+2 -2
arch/mips/mips-boards/generic/amon.c
··· 28 29 int amon_cpu_avail(int cpu) 30 { 31 - struct cpulaunch *launch = (struct cpulaunch *)KSEG0ADDR(CPULAUNCH); 32 33 if (cpu < 0 || cpu >= NCPULAUNCH) { 34 pr_debug("avail: cpu%d is out of range\n", cpu); ··· 53 unsigned long gp, unsigned long a0) 54 { 55 volatile struct cpulaunch *launch = 56 - (struct cpulaunch *)KSEG0ADDR(CPULAUNCH); 57 58 if (!amon_cpu_avail(cpu)) 59 return;
··· 28 29 int amon_cpu_avail(int cpu) 30 { 31 + struct cpulaunch *launch = (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); 32 33 if (cpu < 0 || cpu >= NCPULAUNCH) { 34 pr_debug("avail: cpu%d is out of range\n", cpu); ··· 53 unsigned long gp, unsigned long a0) 54 { 55 volatile struct cpulaunch *launch = 56 + (struct cpulaunch *)CKSEG0ADDR(CPULAUNCH); 57 58 if (!amon_cpu_avail(cpu)) 59 return;
+2 -2
include/asm-mips/gic.h
··· 24 25 #define MSK(n) ((1 << (n)) - 1) 26 #define REG32(addr) (*(volatile unsigned int *) (addr)) 27 - #define REG(base, offs) REG32((unsigned int)(base) + offs##_##OFS) 28 - #define REGP(base, phys) REG32((unsigned int)(base) + (phys)) 29 30 /* Accessors */ 31 #define GIC_REG(segment, offset) \
··· 24 25 #define MSK(n) ((1 << (n)) - 1) 26 #define REG32(addr) (*(volatile unsigned int *) (addr)) 27 + #define REG(base, offs) REG32((unsigned long)(base) + offs##_##OFS) 28 + #define REGP(base, phys) REG32((unsigned long)(base) + (phys)) 29 30 /* Accessors */ 31 #define GIC_REG(segment, offset) \