Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/radeon/kms: Clean up errors in smu7_fusion.h

Fix the following errors reported by checkpatch:

ERROR: open brace '{' following struct go on the same line
ERROR: space prohibited before open square bracket '['

Signed-off-by: GuoHua Chen <chenguohua_716@163.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

GuoHua Chen and committed by
Alex Deucher
93709fa0 848da192

+16 -26
+16 -26
drivers/gpu/drm/radeon/smu7_fusion.h
··· 36 36 #define SMU7_NUM_NON_TES 2 37 37 38 38 // All 'soft registers' should be uint32_t. 39 - struct SMU7_SoftRegisters 40 - { 39 + struct SMU7_SoftRegisters { 41 40 uint32_t RefClockFrequency; 42 41 uint32_t PmTimerP; 43 42 uint32_t FeatureEnables; ··· 79 80 80 81 typedef struct SMU7_SoftRegisters SMU7_SoftRegisters; 81 82 82 - struct SMU7_Fusion_GraphicsLevel 83 - { 83 + struct SMU7_Fusion_GraphicsLevel { 84 84 uint32_t MinVddNb; 85 85 86 86 uint32_t SclkFrequency; ··· 109 111 110 112 typedef struct SMU7_Fusion_GraphicsLevel SMU7_Fusion_GraphicsLevel; 111 113 112 - struct SMU7_Fusion_GIOLevel 113 - { 114 + struct SMU7_Fusion_GIOLevel { 114 115 uint8_t EnabledForActivity; 115 116 uint8_t LclkDid; 116 117 uint8_t Vid; ··· 134 137 typedef struct SMU7_Fusion_GIOLevel SMU7_Fusion_GIOLevel; 135 138 136 139 // UVD VCLK/DCLK state (level) definition. 137 - struct SMU7_Fusion_UvdLevel 138 - { 140 + struct SMU7_Fusion_UvdLevel { 139 141 uint32_t VclkFrequency; 140 142 uint32_t DclkFrequency; 141 143 uint16_t MinVddNb; ··· 151 155 typedef struct SMU7_Fusion_UvdLevel SMU7_Fusion_UvdLevel; 152 156 153 157 // Clocks for other external blocks (VCE, ACP, SAMU). 154 - struct SMU7_Fusion_ExtClkLevel 155 - { 158 + struct SMU7_Fusion_ExtClkLevel { 156 159 uint32_t Frequency; 157 160 uint16_t MinVoltage; 158 161 uint8_t Divider; ··· 161 166 }; 162 167 typedef struct SMU7_Fusion_ExtClkLevel SMU7_Fusion_ExtClkLevel; 163 168 164 - struct SMU7_Fusion_ACPILevel 165 - { 169 + struct SMU7_Fusion_ACPILevel { 166 170 uint32_t Flags; 167 171 uint32_t MinVddNb; 168 172 uint32_t SclkFrequency; ··· 175 181 176 182 typedef struct SMU7_Fusion_ACPILevel SMU7_Fusion_ACPILevel; 177 183 178 - struct SMU7_Fusion_NbDpm 179 - { 184 + struct SMU7_Fusion_NbDpm { 180 185 uint8_t DpmXNbPsHi; 181 186 uint8_t DpmXNbPsLo; 182 187 uint8_t Dpm0PgNbPsHi; ··· 190 197 191 198 typedef struct SMU7_Fusion_NbDpm SMU7_Fusion_NbDpm; 192 199 193 - struct SMU7_Fusion_StateInfo 194 - { 200 + struct SMU7_Fusion_StateInfo { 195 201 uint32_t SclkFrequency; 196 202 uint32_t LclkFrequency; 197 203 uint32_t VclkFrequency; ··· 206 214 207 215 typedef struct SMU7_Fusion_StateInfo SMU7_Fusion_StateInfo; 208 216 209 - struct SMU7_Fusion_DpmTable 210 - { 217 + struct SMU7_Fusion_DpmTable { 211 218 uint32_t SystemFlags; 212 219 213 220 SMU7_PIDController GraphicsPIDController; ··· 221 230 uint8_t SamuLevelCount; 222 231 uint16_t FpsHighT; 223 232 224 - SMU7_Fusion_GraphicsLevel GraphicsLevel [SMU__NUM_SCLK_DPM_STATE]; 233 + SMU7_Fusion_GraphicsLevel GraphicsLevel[SMU__NUM_SCLK_DPM_STATE]; 225 234 SMU7_Fusion_ACPILevel ACPILevel; 226 - SMU7_Fusion_UvdLevel UvdLevel [SMU7_MAX_LEVELS_UVD]; 227 - SMU7_Fusion_ExtClkLevel VceLevel [SMU7_MAX_LEVELS_VCE]; 228 - SMU7_Fusion_ExtClkLevel AcpLevel [SMU7_MAX_LEVELS_ACP]; 229 - SMU7_Fusion_ExtClkLevel SamuLevel [SMU7_MAX_LEVELS_SAMU]; 235 + SMU7_Fusion_UvdLevel UvdLevel[SMU7_MAX_LEVELS_UVD]; 236 + SMU7_Fusion_ExtClkLevel VceLevel[SMU7_MAX_LEVELS_VCE]; 237 + SMU7_Fusion_ExtClkLevel AcpLevel[SMU7_MAX_LEVELS_ACP]; 238 + SMU7_Fusion_ExtClkLevel SamuLevel[SMU7_MAX_LEVELS_SAMU]; 230 239 231 240 uint8_t UvdBootLevel; 232 241 uint8_t VceBootLevel; ··· 257 266 258 267 }; 259 268 260 - struct SMU7_Fusion_GIODpmTable 261 - { 269 + struct SMU7_Fusion_GIODpmTable { 262 270 263 - SMU7_Fusion_GIOLevel GIOLevel [SMU7_MAX_LEVELS_GIO]; 271 + SMU7_Fusion_GIOLevel GIOLevel[SMU7_MAX_LEVELS_GIO]; 264 272 265 273 SMU7_PIDController GioPIDController; 266 274