Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm: Switch to %p4cc format modifier

Switch DRM drivers from drm_get_format_name() to %p4cc. This gets rid of a
large number of temporary variables at the same time.

Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Reviewed-by: Petr Mladek <pmladek@suse.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Thomas Zimmermann <tzimmermann@suse.de>
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20210216155723.17109-4-sakari.ailus@linux.intel.com

authored by

Sakari Ailus and committed by
Thomas Zimmermann
92f1d09c e927e1e0

+69 -137
+2 -3
drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
··· 1862 1862 u32 tmp, viewport_w, viewport_h; 1863 1863 int r; 1864 1864 bool bypass_lut = false; 1865 - struct drm_format_name_buf format_name; 1866 1865 1867 1866 /* no fb bound */ 1868 1867 if (!atomic && !crtc->primary->fb) { ··· 1980 1981 #endif 1981 1982 break; 1982 1983 default: 1983 - DRM_ERROR("Unsupported screen format %s\n", 1984 - drm_get_format_name(target_fb->format->format, &format_name)); 1984 + DRM_ERROR("Unsupported screen format %p4cc\n", 1985 + &target_fb->format->format); 1985 1986 return -EINVAL; 1986 1987 } 1987 1988
+2 -3
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
··· 1904 1904 u32 tmp, viewport_w, viewport_h; 1905 1905 int r; 1906 1906 bool bypass_lut = false; 1907 - struct drm_format_name_buf format_name; 1908 1907 1909 1908 /* no fb bound */ 1910 1909 if (!atomic && !crtc->primary->fb) { ··· 2022 2023 #endif 2023 2024 break; 2024 2025 default: 2025 - DRM_ERROR("Unsupported screen format %s\n", 2026 - drm_get_format_name(target_fb->format->format, &format_name)); 2026 + DRM_ERROR("Unsupported screen format %p4cc\n", 2027 + &target_fb->format->format); 2027 2028 return -EINVAL; 2028 2029 } 2029 2030
+2 -3
drivers/gpu/drm/amd/amdgpu/dce_v6_0.c
··· 1820 1820 u32 viewport_w, viewport_h; 1821 1821 int r; 1822 1822 bool bypass_lut = false; 1823 - struct drm_format_name_buf format_name; 1824 1823 1825 1824 /* no fb bound */ 1826 1825 if (!atomic && !crtc->primary->fb) { ··· 1928 1929 #endif 1929 1930 break; 1930 1931 default: 1931 - DRM_ERROR("Unsupported screen format %s\n", 1932 - drm_get_format_name(target_fb->format->format, &format_name)); 1932 + DRM_ERROR("Unsupported screen format %p4cc\n", 1933 + &target_fb->format->format); 1933 1934 return -EINVAL; 1934 1935 } 1935 1936
+2 -3
drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
··· 1791 1791 u32 viewport_w, viewport_h; 1792 1792 int r; 1793 1793 bool bypass_lut = false; 1794 - struct drm_format_name_buf format_name; 1795 1794 1796 1795 /* no fb bound */ 1797 1796 if (!atomic && !crtc->primary->fb) { ··· 1901 1902 #endif 1902 1903 break; 1903 1904 default: 1904 - DRM_ERROR("Unsupported screen format %s\n", 1905 - drm_get_format_name(target_fb->format->format, &format_name)); 1905 + DRM_ERROR("Unsupported screen format %p4cc\n", 1906 + &target_fb->format->format); 1906 1907 return -EINVAL; 1907 1908 } 1908 1909
+2 -3
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
··· 4505 4505 const struct drm_framebuffer *fb = plane_state->fb; 4506 4506 const struct amdgpu_framebuffer *afb = 4507 4507 to_amdgpu_framebuffer(plane_state->fb); 4508 - struct drm_format_name_buf format_name; 4509 4508 int ret; 4510 4509 4511 4510 memset(plane_info, 0, sizeof(*plane_info)); ··· 4552 4553 break; 4553 4554 default: 4554 4555 DRM_ERROR( 4555 - "Unsupported screen format %s\n", 4556 - drm_get_format_name(fb->format->format, &format_name)); 4556 + "Unsupported screen format %p4cc\n", 4557 + &fb->format->format); 4557 4558 return -EINVAL; 4558 4559 } 4559 4560
-11
drivers/gpu/drm/arm/display/komeda/komeda_format_caps.h
··· 82 82 83 83 extern u64 komeda_supported_modifiers[]; 84 84 85 - static inline const char *komeda_get_format_name(u32 fourcc, u64 modifier) 86 - { 87 - struct drm_format_name_buf buf; 88 - static char name[64]; 89 - 90 - snprintf(name, sizeof(name), "%s with modifier: 0x%llx.", 91 - drm_get_format_name(fourcc, &buf), modifier); 92 - 93 - return name; 94 - } 95 - 96 85 const struct komeda_format_caps * 97 86 komeda_get_format_caps(struct komeda_format_caps_table *table, 98 87 u32 fourcc, u64 modifier);
+2 -2
drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
··· 276 276 supported = komeda_format_mod_supported(&mdev->fmt_tbl, layer_type, 277 277 fourcc, modifier, rot); 278 278 if (!supported) 279 - DRM_DEBUG_ATOMIC("Layer TYPE: %d doesn't support fb FMT: %s.\n", 280 - layer_type, komeda_get_format_name(fourcc, modifier)); 279 + DRM_DEBUG_ATOMIC("Layer TYPE: %d doesn't support fb FMT: %p4cc with modifier: 0x%llx.\n", 280 + layer_type, &fourcc, modifier); 281 281 282 282 return supported; 283 283 }
+2 -4
drivers/gpu/drm/arm/display/komeda/komeda_plane.c
··· 49 49 50 50 dflow->rot = drm_rotation_simplify(st->rotation, caps->supported_rots); 51 51 if (!has_bits(dflow->rot, caps->supported_rots)) { 52 - DRM_DEBUG_ATOMIC("rotation(0x%x) isn't supported by %s.\n", 53 - dflow->rot, 54 - komeda_get_format_name(caps->fourcc, 55 - fb->modifier)); 52 + DRM_DEBUG_ATOMIC("rotation(0x%x) isn't supported by %p4cc with modifier: 0x%llx.\n", 53 + dflow->rot, &caps->fourcc, fb->modifier); 56 54 return -EINVAL; 57 55 } 58 56
+2 -5
drivers/gpu/drm/arm/malidp_mw.c
··· 151 151 malidp_hw_get_format_id(&malidp->dev->hw->map, SE_MEMWRITE, 152 152 fb->format->format, !!fb->modifier); 153 153 if (mw_state->format == MALIDP_INVALID_FORMAT_ID) { 154 - struct drm_format_name_buf format_name; 155 - 156 - DRM_DEBUG_KMS("Invalid pixel format %s\n", 157 - drm_get_format_name(fb->format->format, 158 - &format_name)); 154 + DRM_DEBUG_KMS("Invalid pixel format %p4cc\n", 155 + &fb->format->format); 159 156 return -EINVAL; 160 157 } 161 158
+2 -6
drivers/gpu/drm/drm_atomic.c
··· 617 617 ret = drm_plane_check_pixel_format(plane, fb->format->format, 618 618 fb->modifier); 619 619 if (ret) { 620 - struct drm_format_name_buf format_name; 621 - 622 - DRM_DEBUG_ATOMIC("[PLANE:%d:%s] invalid pixel format %s, modifier 0x%llx\n", 620 + DRM_DEBUG_ATOMIC("[PLANE:%d:%s] invalid pixel format %p4cc, modifier 0x%llx\n", 623 621 plane->base.id, plane->name, 624 - drm_get_format_name(fb->format->format, 625 - &format_name), 626 - fb->modifier); 622 + &fb->format->format, fb->modifier); 627 623 return ret; 628 624 } 629 625
+2 -5
drivers/gpu/drm/drm_crtc.c
··· 735 735 fb->format->format, 736 736 fb->modifier); 737 737 if (ret) { 738 - struct drm_format_name_buf format_name; 739 - 740 - DRM_DEBUG_KMS("Invalid pixel format %s, modifier 0x%llx\n", 741 - drm_get_format_name(fb->format->format, 742 - &format_name), 738 + DRM_DEBUG_KMS("Invalid pixel format %p4cc, modifier 0x%llx\n", 739 + &fb->format->format, 743 740 fb->modifier); 744 741 goto out; 745 742 }
+3 -8
drivers/gpu/drm/drm_framebuffer.c
··· 177 177 178 178 /* check if the format is supported at all */ 179 179 if (!__drm_format_info(r->pixel_format)) { 180 - struct drm_format_name_buf format_name; 181 - 182 - DRM_DEBUG_KMS("bad framebuffer format %s\n", 183 - drm_get_format_name(r->pixel_format, 184 - &format_name)); 180 + DRM_DEBUG_KMS("bad framebuffer format %p4cc\n", 181 + &r->pixel_format); 185 182 return -EINVAL; 186 183 } 187 184 ··· 1157 1160 void drm_framebuffer_print_info(struct drm_printer *p, unsigned int indent, 1158 1161 const struct drm_framebuffer *fb) 1159 1162 { 1160 - struct drm_format_name_buf format_name; 1161 1163 unsigned int i; 1162 1164 1163 1165 drm_printf_indent(p, indent, "allocated by = %s\n", fb->comm); 1164 1166 drm_printf_indent(p, indent, "refcount=%u\n", 1165 1167 drm_framebuffer_read_refcount(fb)); 1166 - drm_printf_indent(p, indent, "format=%s\n", 1167 - drm_get_format_name(fb->format->format, &format_name)); 1168 + drm_printf_indent(p, indent, "format=%p4cc\n", &fb->format->format); 1168 1169 drm_printf_indent(p, indent, "modifier=0x%llx\n", fb->modifier); 1169 1170 drm_printf_indent(p, indent, "size=%ux%u\n", fb->width, fb->height); 1170 1171 drm_printf_indent(p, indent, "layers:\n");
+2 -3
drivers/gpu/drm/drm_mipi_dbi.c
··· 203 203 struct drm_gem_object *gem = drm_gem_fb_get_obj(fb, 0); 204 204 struct drm_gem_cma_object *cma_obj = to_drm_gem_cma_obj(gem); 205 205 struct dma_buf_attachment *import_attach = gem->import_attach; 206 - struct drm_format_name_buf format_name; 207 206 void *src = cma_obj->vaddr; 208 207 int ret = 0; 209 208 ··· 224 225 drm_fb_xrgb8888_to_rgb565(dst, src, fb, clip, swap); 225 226 break; 226 227 default: 227 - drm_err_once(fb->dev, "Format is not supported: %s\n", 228 - drm_get_format_name(fb->format->format, &format_name)); 228 + drm_err_once(fb->dev, "Format is not supported: %p4cc\n", 229 + &fb->format->format); 229 230 return -EINVAL; 230 231 } 231 232
+2 -6
drivers/gpu/drm/drm_plane.c
··· 769 769 ret = drm_plane_check_pixel_format(plane, fb->format->format, 770 770 fb->modifier); 771 771 if (ret) { 772 - struct drm_format_name_buf format_name; 773 - 774 - DRM_DEBUG_KMS("Invalid pixel format %s, modifier 0x%llx\n", 775 - drm_get_format_name(fb->format->format, 776 - &format_name), 777 - fb->modifier); 772 + DRM_DEBUG_KMS("Invalid pixel format %p4cc, modifier 0x%llx\n", 773 + &fb->format->format, fb->modifier); 778 774 return ret; 779 775 } 780 776
+2 -3
drivers/gpu/drm/hisilicon/kirin/kirin_drm_ade.c
··· 549 549 u32 ch, u32 y, u32 in_h, u32 fmt) 550 550 { 551 551 struct drm_gem_cma_object *obj = drm_fb_cma_get_gem_obj(fb, 0); 552 - struct drm_format_name_buf format_name; 553 552 u32 reg_ctrl, reg_addr, reg_size, reg_stride, reg_space, reg_en; 554 553 u32 stride = fb->pitches[0]; 555 554 u32 addr = (u32)obj->paddr + y * stride; 556 555 557 556 DRM_DEBUG_DRIVER("rdma%d: (y=%d, height=%d), stride=%d, paddr=0x%x\n", 558 557 ch + 1, y, in_h, stride, (u32)obj->paddr); 559 - DRM_DEBUG_DRIVER("addr=0x%x, fb:%dx%d, pixel_format=%d(%s)\n", 558 + DRM_DEBUG_DRIVER("addr=0x%x, fb:%dx%d, pixel_format=%d(%p4cc)\n", 560 559 addr, fb->width, fb->height, fmt, 561 - drm_get_format_name(fb->format->format, &format_name)); 560 + &fb->format->format); 562 561 563 562 /* get reg offset */ 564 563 reg_ctrl = RD_CH_CTRL(ch);
+4 -10
drivers/gpu/drm/i915/display/intel_display.c
··· 12238 12238 struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); 12239 12239 struct drm_i915_private *i915 = to_i915(plane->base.dev); 12240 12240 const struct drm_framebuffer *fb = plane_state->hw.fb; 12241 - struct drm_format_name_buf format_name; 12242 12241 12243 12242 if (!fb) { 12244 12243 drm_dbg_kms(&i915->drm, ··· 12248 12249 } 12249 12250 12250 12251 drm_dbg_kms(&i915->drm, 12251 - "[PLANE:%d:%s] fb: [FB:%d] %ux%u format = %s modifier = 0x%llx, visible: %s\n", 12252 + "[PLANE:%d:%s] fb: [FB:%d] %ux%u format = %p4cc modifier = 0x%llx, visible: %s\n", 12252 12253 plane->base.base.id, plane->base.name, 12253 - fb->base.id, fb->width, fb->height, 12254 - drm_get_format_name(fb->format->format, &format_name), 12254 + fb->base.id, fb->width, fb->height, &fb->format->format, 12255 12255 fb->modifier, yesno(plane_state->uapi.visible)); 12256 12256 drm_dbg_kms(&i915->drm, "\trotation: 0x%x, scaler: %d\n", 12257 12257 plane_state->hw.rotation, plane_state->scaler_id); ··· 16450 16452 if (!drm_any_plane_has_format(&dev_priv->drm, 16451 16453 mode_cmd->pixel_format, 16452 16454 mode_cmd->modifier[0])) { 16453 - struct drm_format_name_buf format_name; 16454 - 16455 16455 drm_dbg_kms(&dev_priv->drm, 16456 - "unsupported pixel format %s / modifier 0x%llx\n", 16457 - drm_get_format_name(mode_cmd->pixel_format, 16458 - &format_name), 16459 - mode_cmd->modifier[0]); 16456 + "unsupported pixel format %p4cc / modifier 0x%llx\n", 16457 + &mode_cmd->pixel_format, mode_cmd->modifier[0]); 16460 16458 goto err; 16461 16459 } 16462 16460
+13 -17
drivers/gpu/drm/i915/display/intel_display_debugfs.c
··· 772 772 const struct intel_plane_state *plane_state = 773 773 to_intel_plane_state(plane->base.state); 774 774 const struct drm_framebuffer *fb = plane_state->uapi.fb; 775 - struct drm_format_name_buf format_name; 776 775 struct drm_rect src, dst; 777 776 char rot_str[48]; 778 777 779 778 src = drm_plane_state_src(&plane_state->uapi); 780 779 dst = drm_plane_state_dest(&plane_state->uapi); 781 780 782 - if (fb) 783 - drm_get_format_name(fb->format->format, &format_name); 784 - 785 781 plane_rotation(rot_str, sizeof(rot_str), 786 782 plane_state->uapi.rotation); 787 783 788 - seq_printf(m, "\t\tuapi: [FB:%d] %s,0x%llx,%dx%d, visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 789 - fb ? fb->base.id : 0, fb ? format_name.str : "n/a", 790 - fb ? fb->modifier : 0, 791 - fb ? fb->width : 0, fb ? fb->height : 0, 792 - plane_visibility(plane_state), 793 - DRM_RECT_FP_ARG(&src), 794 - DRM_RECT_ARG(&dst), 795 - rot_str); 784 + seq_puts(m, "\t\tuapi: [FB:"); 785 + if (fb) 786 + seq_printf(m, "%d] %p4cc,0x%llx,%dx%d", fb->base.id, 787 + &fb->format->format, fb->modifier, fb->width, 788 + fb->height); 789 + else 790 + seq_puts(m, "0] n/a,0x0,0x0,"); 791 + seq_printf(m, ", visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT 792 + ", rotation=%s\n", plane_visibility(plane_state), 793 + DRM_RECT_FP_ARG(&src), DRM_RECT_ARG(&dst), rot_str); 796 794 797 795 if (plane_state->planar_linked_plane) 798 796 seq_printf(m, "\t\tplanar: Linked to [PLANE:%d:%s] as a %s\n", ··· 803 805 const struct intel_plane_state *plane_state = 804 806 to_intel_plane_state(plane->base.state); 805 807 const struct drm_framebuffer *fb = plane_state->hw.fb; 806 - struct drm_format_name_buf format_name; 807 808 char rot_str[48]; 808 809 809 810 if (!fb) 810 811 return; 811 812 812 - drm_get_format_name(fb->format->format, &format_name); 813 - 814 813 plane_rotation(rot_str, sizeof(rot_str), 815 814 plane_state->hw.rotation); 816 815 817 - seq_printf(m, "\t\thw: [FB:%d] %s,0x%llx,%dx%d, visible=%s, src=" DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 818 - fb->base.id, format_name.str, 816 + seq_printf(m, "\t\thw: [FB:%d] %p4cc,0x%llx,%dx%d, visible=%s, src=" 817 + DRM_RECT_FP_FMT ", dst=" DRM_RECT_FMT ", rotation=%s\n", 818 + fb->base.id, &fb->format->format, 819 819 fb->modifier, fb->width, fb->height, 820 820 yesno(plane_state->uapi.visible), 821 821 DRM_RECT_FP_ARG(&plane_state->uapi.src),
+2 -4
drivers/gpu/drm/i915/display/intel_sprite.c
··· 2301 2301 struct drm_i915_private *dev_priv = to_i915(plane->base.dev); 2302 2302 const struct drm_framebuffer *fb = plane_state->hw.fb; 2303 2303 unsigned int rotation = plane_state->hw.rotation; 2304 - struct drm_format_name_buf format_name; 2305 2304 2306 2305 if (!fb) 2307 2306 return 0; ··· 2348 2349 case DRM_FORMAT_XVYU12_16161616: 2349 2350 case DRM_FORMAT_XVYU16161616: 2350 2351 drm_dbg_kms(&dev_priv->drm, 2351 - "Unsupported pixel format %s for 90/270!\n", 2352 - drm_get_format_name(fb->format->format, 2353 - &format_name)); 2352 + "Unsupported pixel format %p4cc for 90/270!\n", 2353 + &fb->format->format); 2354 2354 return -EINVAL; 2355 2355 default: 2356 2356 break;
+2 -4
drivers/gpu/drm/mcde/mcde_display.c
··· 1161 1161 int dsi_pkt_size; 1162 1162 int fifo_wtrmrk; 1163 1163 int cpp = fb->format->cpp[0]; 1164 - struct drm_format_name_buf tmp; 1165 1164 u32 dsi_formatter_frame; 1166 1165 u32 val; 1167 1166 int ret; ··· 1172 1173 return; 1173 1174 } 1174 1175 1175 - dev_info(drm->dev, "enable MCDE, %d x %d format %s\n", 1176 - mode->hdisplay, mode->vdisplay, 1177 - drm_get_format_name(format, &tmp)); 1176 + dev_info(drm->dev, "enable MCDE, %d x %d format %p4cc\n", 1177 + mode->hdisplay, mode->vdisplay, &format); 1178 1178 1179 1179 1180 1180 /* Clear any pending interrupts */
+2 -4
drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
··· 71 71 { 72 72 struct dpu_hw_mixer *lm = mixer->hw_lm; 73 73 uint32_t blend_op; 74 - struct drm_format_name_buf format_name; 75 74 76 75 /* default to opaque blending */ 77 76 blend_op = DPU_BLEND_FG_ALPHA_FG_CONST | ··· 86 87 lm->ops.setup_blend_config(lm, pstate->stage, 87 88 0xFF, 0, blend_op); 88 89 89 - DPU_DEBUG("format:%s, alpha_en:%u blend_op:0x%x\n", 90 - drm_get_format_name(format->base.pixel_format, &format_name), 91 - format->alpha_enable, blend_op); 90 + DPU_DEBUG("format:%p4cc, alpha_en:%u blend_op:0x%x\n", 91 + &format->base.pixel_format, format->alpha_enable, blend_op); 92 92 } 93 93 94 94 static void _dpu_crtc_program_lm_output_roi(struct drm_crtc *crtc)
+3 -6
drivers/gpu/drm/nouveau/nouveau_display.c
··· 322 322 mode_cmd->pitches[0] >= 0x10000 || /* at most 64k pitch */ 323 323 (mode_cmd->pitches[1] && /* pitches for planes must match */ 324 324 mode_cmd->pitches[0] != mode_cmd->pitches[1]))) { 325 - struct drm_format_name_buf format_name; 326 - DRM_DEBUG_KMS("Unsuitable framebuffer: format: %s; pitches: 0x%x\n 0x%x\n", 327 - drm_get_format_name(mode_cmd->pixel_format, 328 - &format_name), 329 - mode_cmd->pitches[0], 330 - mode_cmd->pitches[1]); 325 + DRM_DEBUG_KMS("Unsuitable framebuffer: format: %p4cc; pitches: 0x%x\n 0x%x\n", 326 + &mode_cmd->pixel_format, 327 + mode_cmd->pitches[0], mode_cmd->pitches[1]); 331 328 return -EINVAL; 332 329 } 333 330
+4 -6
drivers/gpu/drm/radeon/atombios_crtc.c
··· 1157 1157 u32 tmp, viewport_w, viewport_h; 1158 1158 int r; 1159 1159 bool bypass_lut = false; 1160 - struct drm_format_name_buf format_name; 1161 1160 1162 1161 /* no fb bound */ 1163 1162 if (!atomic && !crtc->primary->fb) { ··· 1266 1267 #endif 1267 1268 break; 1268 1269 default: 1269 - DRM_ERROR("Unsupported screen format %s\n", 1270 - drm_get_format_name(target_fb->format->format, &format_name)); 1270 + DRM_ERROR("Unsupported screen format %p4cc\n", 1271 + &target_fb->format->format); 1271 1272 return -EINVAL; 1272 1273 } 1273 1274 ··· 1477 1478 u32 viewport_w, viewport_h; 1478 1479 int r; 1479 1480 bool bypass_lut = false; 1480 - struct drm_format_name_buf format_name; 1481 1481 1482 1482 /* no fb bound */ 1483 1483 if (!atomic && !crtc->primary->fb) { ··· 1577 1579 #endif 1578 1580 break; 1579 1581 default: 1580 - DRM_ERROR("Unsupported screen format %s\n", 1581 - drm_get_format_name(target_fb->format->format, &format_name)); 1582 + DRM_ERROR("Unsupported screen format %p4cc\n", 1583 + &target_fb->format->format); 1582 1584 return -EINVAL; 1583 1585 } 1584 1586
+2 -4
drivers/gpu/drm/sun4i/sun4i_backend.c
··· 510 510 struct sun4i_layer_state *layer_state = 511 511 state_to_sun4i_layer_state(plane_state); 512 512 struct drm_framebuffer *fb = plane_state->fb; 513 - struct drm_format_name_buf format_name; 514 513 515 514 if (!sun4i_backend_plane_is_supported(plane_state, 516 515 &layer_state->uses_frontend)) ··· 526 527 } 527 528 } 528 529 529 - DRM_DEBUG_DRIVER("Plane FB format is %s\n", 530 - drm_get_format_name(fb->format->format, 531 - &format_name)); 530 + DRM_DEBUG_DRIVER("Plane FB format is %p4cc\n", 531 + &fb->format->format); 532 532 if (fb->format->has_alpha || (plane_state->alpha != DRM_BLEND_ALPHA_OPAQUE)) 533 533 num_alpha_planes++; 534 534
+2 -5
drivers/gpu/drm/vkms/vkms_writeback.c
··· 42 42 } 43 43 44 44 if (fb->format->format != vkms_wb_formats[0]) { 45 - struct drm_format_name_buf format_name; 46 - 47 - DRM_DEBUG_KMS("Invalid pixel format %s\n", 48 - drm_get_format_name(fb->format->format, 49 - &format_name)); 45 + DRM_DEBUG_KMS("Invalid pixel format %p4cc\n", 46 + &fb->format->format); 50 47 return -EINVAL; 51 48 } 52 49
+6 -9
drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
··· 890 890 struct vmw_framebuffer_surface *vfbs; 891 891 enum SVGA3dSurfaceFormat format; 892 892 int ret; 893 - struct drm_format_name_buf format_name; 894 893 895 894 /* 3D is only supported on HWv8 and newer hosts */ 896 895 if (dev_priv->active_display_unit == vmw_du_legacy) ··· 927 928 format = SVGA3D_A1R5G5B5; 928 929 break; 929 930 default: 930 - DRM_ERROR("Invalid pixel format: %s\n", 931 - drm_get_format_name(mode_cmd->pixel_format, &format_name)); 931 + DRM_ERROR("Invalid pixel format: %p4cc\n", 932 + &mode_cmd->pixel_format); 932 933 return -EINVAL; 933 934 } 934 935 ··· 1143 1144 uint32_t format; 1144 1145 struct vmw_resource *res; 1145 1146 unsigned int bytes_pp; 1146 - struct drm_format_name_buf format_name; 1147 1147 int ret; 1148 1148 1149 1149 switch (mode_cmd->pixel_format) { ··· 1164 1166 break; 1165 1167 1166 1168 default: 1167 - DRM_ERROR("Invalid framebuffer format %s\n", 1168 - drm_get_format_name(mode_cmd->pixel_format, &format_name)); 1169 + DRM_ERROR("Invalid framebuffer format %p4cc\n", 1170 + &mode_cmd->pixel_format); 1169 1171 return -EINVAL; 1170 1172 } 1171 1173 ··· 1209 1211 struct drm_device *dev = &dev_priv->drm; 1210 1212 struct vmw_framebuffer_bo *vfbd; 1211 1213 unsigned int requested_size; 1212 - struct drm_format_name_buf format_name; 1213 1214 int ret; 1214 1215 1215 1216 requested_size = mode_cmd->height * mode_cmd->pitches[0]; ··· 1228 1231 case DRM_FORMAT_RGB565: 1229 1232 break; 1230 1233 default: 1231 - DRM_ERROR("Invalid pixel format: %s\n", 1232 - drm_get_format_name(mode_cmd->pixel_format, &format_name)); 1234 + DRM_ERROR("Invalid pixel format: %p4cc\n", 1235 + &mode_cmd->pixel_format); 1233 1236 return -EINVAL; 1234 1237 } 1235 1238 }