tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge branch 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
ARM: mach-shmobile: INTC interrupt priority level demux fix
ARM: mach-shmobile: fix compile warning in mm/init.c

Linus Torvalds 92d7c9b2 9e0afb94

+27 -5
unified split
+26 -4
arch/arm/mach-shmobile/include/mach/entry-macro.S
··· 1 /* 2 * Copyright (C) 2008 Renesas Solutions Corp. 3 * 4 * This program is free software; you can redistribute it and/or modify ··· 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 17 */ 18 - #include <mach/hardware.h> 19 #include <mach/irqs.h> 20 21 .macro disable_fiq 22 .endm 23 24 .macro get_irqnr_preamble, base, tmp 25 - ldr \base, =INTFLGA 26 .endm 27 28 .macro arch_ret_to_user, tmp1, tmp2 29 .endm 30 31 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 32 - ldr \irqnr, [\base] 33 cmp \irqnr, #0 34 beq 1000f 35 - /* intevt to irq number */ 36 lsr \irqnr, \irqnr, #0x5 37 subs \irqnr, \irqnr, #16 38
··· 1 /* 2 + * Copyright (C) 2010 Magnus Damm 3 * Copyright (C) 2008 Renesas Solutions Corp. 4 * 5 * This program is free software; you can redistribute it and/or modify ··· 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA 16 */ 17 #include <mach/irqs.h> 18 + 19 + #define INTCA_BASE 0xe6980000 20 + #define INTFLGA_OFFS 0x00000018 /* accept pending interrupt */ 21 + #define INTEVTA_OFFS 0x00000020 /* vector number of accepted interrupt */ 22 + #define INTLVLA_OFFS 0x00000030 /* priority level of accepted interrupt */ 23 + #define INTLVLB_OFFS 0x00000034 /* previous priority level */ 24 25 .macro disable_fiq 26 .endm 27 28 .macro get_irqnr_preamble, base, tmp 29 + ldr \base, =INTCA_BASE 30 .endm 31 32 .macro arch_ret_to_user, tmp1, tmp2 33 .endm 34 35 .macro get_irqnr_and_base, irqnr, irqstat, base, tmp 36 + /* The single INTFLGA read access below results in the following: 37 + * 38 + * 1. INTLVLB is updated with old priority value from INTLVLA 39 + * 2. Highest priority interrupt is accepted 40 + * 3. INTLVLA is updated to contain priority of accepted interrupt 41 + * 4. Accepted interrupt vector is stored in INTFLGA and INTEVTA 42 + */ 43 + ldr \irqnr, [\base, #INTFLGA_OFFS] 44 + 45 + /* Restore INTLVLA with the value saved in INTLVLB. 46 + * This is required to support interrupt priorities properly. 47 + */ 48 + ldrb \tmp, [\base, #INTLVLB_OFFS] 49 + strb \tmp, [\base, #INTLVLA_OFFS] 50 + 51 + /* Handle invalid vector number case */ 52 cmp \irqnr, #0 53 beq 1000f 54 + 55 + /* Convert vector to irq number, same as the evt2irq() macro */ 56 lsr \irqnr, \irqnr, #0x5 57 subs \irqnr, \irqnr, #16 58
+1 -1
arch/arm/mach-shmobile/include/mach/vmalloc.h
··· 2 #define __ASM_MACH_VMALLOC_H 3 4 /* Vmalloc at ... - 0xe5ffffff */ 5 - #define VMALLOC_END 0xe6000000 6 7 #endif /* __ASM_MACH_VMALLOC_H */
··· 2 #define __ASM_MACH_VMALLOC_H 3 4 /* Vmalloc at ... - 0xe5ffffff */ 5 + #define VMALLOC_END 0xe6000000UL 6 7 #endif /* __ASM_MACH_VMALLOC_H */