Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'regulator-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator

Pull regulator updates from Mark Brown:
"A couple of nice new features this month, the ability to map
regulators in order to allow voltage control by external coprocessors
is something people have been asking for for a long time.

- improved support for switch only "regulators", allowing current
state to be read from the parent regulator but no setting.

- support for obtaining the register access method used to set
voltages, for use in systems which can offload control of this to a
coprocessor (typically for DVFS).

- support for Active-Semi AC8846, Dialog DA9211 and Texas Instruments
TPS65917"

* tag 'regulator-v3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator: (58 commits)
regulator: act8865: fix build when OF is not enabled
regulator: act8865: add act8846 to DT binding documentation
regulator: act8865: add support for act8846
regulator: act8865: prepare support for other act88xx devices
regulator: act8865: set correct number of regulators in pdata
regulator: act8865: Remove error variable in act8865_pmic_probe
regulator: act8865: fix parsing of platform data
regulator: tps65090: Set voltage for fixed regulators
regulator: core: Allow to get voltage count and list from parent
regulator: core: Get voltage from parent if not available
regulator: Add missing statics and inlines for stub functions
regulator: lp872x: Don't set constraints within the regulator driver
regmap: Fix return code for stub regmap_get_device()
regulator: s2mps11: Update module description and Kconfig to add S2MPU02 support
regulator: Add helpers for low-level register access
regmap: Allow regmap_get_device() to be used by modules
regmap: Add regmap_get_device
regulator: da9211: Remove unnecessary devm_regulator_unregister() calls
regulator: Add DT bindings for tps65218 PMIC regulators.
regulator: da9211: new regulator driver
...

+3134 -837
+2
Documentation/devicetree/bindings/mfd/palmas.txt
··· 6 6 tps65913 (palmas) 7 7 tps65914 (palmas) 8 8 tps659038 9 + tps65917 9 10 10 11 Required properties: 11 12 - compatible : Should be from the list ··· 17 16 ti,tps65914 18 17 ti,tps80036 19 18 ti,tps659038 19 + ti,tps65917 20 20 and also the generic series names 21 21 ti,palmas 22 22 - interrupt-controller : palmas has its own internal IRQs
+5 -2
Documentation/devicetree/bindings/regulator/act8865-regulator.txt
··· 1 - ACT8865 regulator 1 + ACT88xx regulators 2 2 ------------------- 3 3 4 4 Required properties: 5 - - compatible: "active-semi,act8865" 5 + - compatible: "active-semi,act8846" or "active-semi,act8865" 6 6 - reg: I2C slave address 7 7 8 8 Any standard regulator properties can be used to configure the single regulator. 9 9 10 10 The valid names for regulators are: 11 + - for act8846: 12 + REG1, REG2, REG3, REG4, REG5, REG6, REG7, REG8, REG9, REG10, REG11, REG12 13 + - for act8865: 11 14 DCDC_REG1, DCDC_REG2, DCDC_REG3, LDO_REG1, LDO_REG2, LDO_REG3, LDO_REG4. 12 15 13 16 Example:
+1
Documentation/devicetree/bindings/regulator/palmas-pmic.txt
··· 7 7 ti,twl6037-pmic 8 8 ti,tps65913-pmic 9 9 ti,tps65914-pmic 10 + ti,tps65917-pmic 10 11 and also the generic series names 11 12 ti,palmas-pmic 12 13 - interrupt-parent : The parent interrupt controller which is palmas.
+23
Documentation/devicetree/bindings/regulator/tps65218.txt
··· 1 + TPS65218 family of regulators 2 + 3 + Required properties: 4 + For tps65218 regulators/LDOs 5 + - compatible: 6 + - "ti,tps65218-dcdc1" for DCDC1 7 + - "ti,tps65218-dcdc2" for DCDC2 8 + - "ti,tps65218-dcdc3" for DCDC3 9 + - "ti,tps65218-dcdc4" for DCDC4 10 + - "ti,tps65218-dcdc5" for DCDC5 11 + - "ti,tps65218-dcdc6" for DCDC6 12 + - "ti,tps65218-ldo1" for LDO1 13 + 14 + Optional properties: 15 + - Any optional property defined in bindings/regulator/regulator.txt 16 + 17 + Example: 18 + 19 + xyz: regulator@0 { 20 + compatible = "ti,tps65218-dcdc1"; 21 + regulator-min-microvolt = <1000000>; 22 + regulator-max-microvolt = <3000000>; 23 + };
+35
Documentation/power/regulator/consumer.txt
··· 180 180 181 181 Regulators use the kernel notifier framework to send event to their interested 182 182 consumers. 183 + 184 + 7. Regulator Direct Register Access 185 + =================================== 186 + Some kinds of power management hardware or firmware are designed such that 187 + they need to do low-level hardware access to regulators, with no involvement 188 + from the kernel. Examples of such devices are: 189 + 190 + - clocksource with a voltage-controlled oscillator and control logic to change 191 + the supply voltage over I2C to achieve a desired output clock rate 192 + - thermal management firmware that can issue an arbitrary I2C transaction to 193 + perform system poweroff during overtemperature conditions 194 + 195 + To set up such a device/firmware, various parameters like I2C address of the 196 + regulator, addresses of various regulator registers etc. need to be configured 197 + to it. The regulator framework provides the following helpers for querying 198 + these details. 199 + 200 + Bus-specific details, like I2C addresses or transfer rates are handled by the 201 + regmap framework. To get the regulator's regmap (if supported), use :- 202 + 203 + struct regmap *regulator_get_regmap(struct regulator *regulator); 204 + 205 + To obtain the hardware register offset and bitmask for the regulator's voltage 206 + selector register, use :- 207 + 208 + int regulator_get_hardware_vsel_register(struct regulator *regulator, 209 + unsigned *vsel_reg, 210 + unsigned *vsel_mask); 211 + 212 + To convert a regulator framework voltage selector code (used by 213 + regulator_list_voltage) to a hardware-specific voltage selector that can be 214 + directly written to the voltage selector register, use :- 215 + 216 + int regulator_list_hardware_vsel(struct regulator *regulator, 217 + unsigned selector);
+13
drivers/base/regmap/regmap.c
··· 1073 1073 } 1074 1074 EXPORT_SYMBOL_GPL(dev_get_regmap); 1075 1075 1076 + /** 1077 + * regmap_get_device(): Obtain the device from a regmap 1078 + * 1079 + * @map: Register map to operate on. 1080 + * 1081 + * Returns the underlying device that the regmap has been created for. 1082 + */ 1083 + struct device *regmap_get_device(struct regmap *map) 1084 + { 1085 + return map->dev; 1086 + } 1087 + EXPORT_SYMBOL_GPL(regmap_get_device); 1088 + 1076 1089 static int _regmap_select_page(struct regmap *map, unsigned int *reg, 1077 1090 struct regmap_range_node *range, 1078 1091 unsigned int val_num)
+176 -57
drivers/mfd/palmas.c
··· 25 25 #include <linux/mfd/palmas.h> 26 26 #include <linux/of_device.h> 27 27 28 - #define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 | \ 29 - PALMAS_EXT_CONTROL_ENABLE2 | \ 30 - PALMAS_EXT_CONTROL_NSLEEP) 31 - 32 - struct palmas_sleep_requestor_info { 33 - int id; 34 - int reg_offset; 35 - int bit_pos; 36 - }; 37 - 38 - #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ 39 - [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ 40 - .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ 41 - .reg_offset = _offset, \ 42 - .bit_pos = _pos, \ 43 - } 44 - 45 - static struct palmas_sleep_requestor_info sleep_req_info[] = { 46 - EXTERNAL_REQUESTOR(REGEN1, 0, 0), 47 - EXTERNAL_REQUESTOR(REGEN2, 0, 1), 48 - EXTERNAL_REQUESTOR(SYSEN1, 0, 2), 49 - EXTERNAL_REQUESTOR(SYSEN2, 0, 3), 50 - EXTERNAL_REQUESTOR(CLK32KG, 0, 4), 51 - EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), 52 - EXTERNAL_REQUESTOR(REGEN3, 0, 6), 53 - EXTERNAL_REQUESTOR(SMPS12, 1, 0), 54 - EXTERNAL_REQUESTOR(SMPS3, 1, 1), 55 - EXTERNAL_REQUESTOR(SMPS45, 1, 2), 56 - EXTERNAL_REQUESTOR(SMPS6, 1, 3), 57 - EXTERNAL_REQUESTOR(SMPS7, 1, 4), 58 - EXTERNAL_REQUESTOR(SMPS8, 1, 5), 59 - EXTERNAL_REQUESTOR(SMPS9, 1, 6), 60 - EXTERNAL_REQUESTOR(SMPS10, 1, 7), 61 - EXTERNAL_REQUESTOR(LDO1, 2, 0), 62 - EXTERNAL_REQUESTOR(LDO2, 2, 1), 63 - EXTERNAL_REQUESTOR(LDO3, 2, 2), 64 - EXTERNAL_REQUESTOR(LDO4, 2, 3), 65 - EXTERNAL_REQUESTOR(LDO5, 2, 4), 66 - EXTERNAL_REQUESTOR(LDO6, 2, 5), 67 - EXTERNAL_REQUESTOR(LDO7, 2, 6), 68 - EXTERNAL_REQUESTOR(LDO8, 2, 7), 69 - EXTERNAL_REQUESTOR(LDO9, 3, 0), 70 - EXTERNAL_REQUESTOR(LDOLN, 3, 1), 71 - EXTERNAL_REQUESTOR(LDOUSB, 3, 2), 72 - }; 73 - 74 28 static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = { 75 29 { 76 30 .reg_bits = 8, ··· 43 89 .val_bits = 8, 44 90 .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE, 45 91 PALMAS_GPADC_TRIM16), 92 + }, 93 + }; 94 + 95 + static const struct regmap_irq tps65917_irqs[] = { 96 + /* INT1 IRQs */ 97 + [TPS65917_RESERVED1] = { 98 + .mask = TPS65917_RESERVED, 99 + }, 100 + [TPS65917_PWRON_IRQ] = { 101 + .mask = TPS65917_INT1_STATUS_PWRON, 102 + }, 103 + [TPS65917_LONG_PRESS_KEY_IRQ] = { 104 + .mask = TPS65917_INT1_STATUS_LONG_PRESS_KEY, 105 + }, 106 + [TPS65917_RESERVED2] = { 107 + .mask = TPS65917_RESERVED, 108 + }, 109 + [TPS65917_PWRDOWN_IRQ] = { 110 + .mask = TPS65917_INT1_STATUS_PWRDOWN, 111 + }, 112 + [TPS65917_HOTDIE_IRQ] = { 113 + .mask = TPS65917_INT1_STATUS_HOTDIE, 114 + }, 115 + [TPS65917_VSYS_MON_IRQ] = { 116 + .mask = TPS65917_INT1_STATUS_VSYS_MON, 117 + }, 118 + [TPS65917_RESERVED3] = { 119 + .mask = TPS65917_RESERVED, 120 + }, 121 + /* INT2 IRQs*/ 122 + [TPS65917_RESERVED4] = { 123 + .mask = TPS65917_RESERVED, 124 + .reg_offset = 1, 125 + }, 126 + [TPS65917_OTP_ERROR_IRQ] = { 127 + .mask = TPS65917_INT2_STATUS_OTP_ERROR, 128 + .reg_offset = 1, 129 + }, 130 + [TPS65917_WDT_IRQ] = { 131 + .mask = TPS65917_INT2_STATUS_WDT, 132 + .reg_offset = 1, 133 + }, 134 + [TPS65917_RESERVED5] = { 135 + .mask = TPS65917_RESERVED, 136 + .reg_offset = 1, 137 + }, 138 + [TPS65917_RESET_IN_IRQ] = { 139 + .mask = TPS65917_INT2_STATUS_RESET_IN, 140 + .reg_offset = 1, 141 + }, 142 + [TPS65917_FSD_IRQ] = { 143 + .mask = TPS65917_INT2_STATUS_FSD, 144 + .reg_offset = 1, 145 + }, 146 + [TPS65917_SHORT_IRQ] = { 147 + .mask = TPS65917_INT2_STATUS_SHORT, 148 + .reg_offset = 1, 149 + }, 150 + [TPS65917_RESERVED6] = { 151 + .mask = TPS65917_RESERVED, 152 + .reg_offset = 1, 153 + }, 154 + /* INT3 IRQs */ 155 + [TPS65917_GPADC_AUTO_0_IRQ] = { 156 + .mask = TPS65917_INT3_STATUS_GPADC_AUTO_0, 157 + .reg_offset = 2, 158 + }, 159 + [TPS65917_GPADC_AUTO_1_IRQ] = { 160 + .mask = TPS65917_INT3_STATUS_GPADC_AUTO_1, 161 + .reg_offset = 2, 162 + }, 163 + [TPS65917_GPADC_EOC_SW_IRQ] = { 164 + .mask = TPS65917_INT3_STATUS_GPADC_EOC_SW, 165 + .reg_offset = 2, 166 + }, 167 + [TPS65917_RESREVED6] = { 168 + .mask = TPS65917_RESERVED6, 169 + .reg_offset = 2, 170 + }, 171 + [TPS65917_RESERVED7] = { 172 + .mask = TPS65917_RESERVED, 173 + .reg_offset = 2, 174 + }, 175 + [TPS65917_RESERVED8] = { 176 + .mask = TPS65917_RESERVED, 177 + .reg_offset = 2, 178 + }, 179 + [TPS65917_RESERVED9] = { 180 + .mask = TPS65917_RESERVED, 181 + .reg_offset = 2, 182 + }, 183 + [TPS65917_VBUS_IRQ] = { 184 + .mask = TPS65917_INT3_STATUS_VBUS, 185 + .reg_offset = 2, 186 + }, 187 + /* INT4 IRQs */ 188 + [TPS65917_GPIO_0_IRQ] = { 189 + .mask = TPS65917_INT4_STATUS_GPIO_0, 190 + .reg_offset = 3, 191 + }, 192 + [TPS65917_GPIO_1_IRQ] = { 193 + .mask = TPS65917_INT4_STATUS_GPIO_1, 194 + .reg_offset = 3, 195 + }, 196 + [TPS65917_GPIO_2_IRQ] = { 197 + .mask = TPS65917_INT4_STATUS_GPIO_2, 198 + .reg_offset = 3, 199 + }, 200 + [TPS65917_GPIO_3_IRQ] = { 201 + .mask = TPS65917_INT4_STATUS_GPIO_3, 202 + .reg_offset = 3, 203 + }, 204 + [TPS65917_GPIO_4_IRQ] = { 205 + .mask = TPS65917_INT4_STATUS_GPIO_4, 206 + .reg_offset = 3, 207 + }, 208 + [TPS65917_GPIO_5_IRQ] = { 209 + .mask = TPS65917_INT4_STATUS_GPIO_5, 210 + .reg_offset = 3, 211 + }, 212 + [TPS65917_GPIO_6_IRQ] = { 213 + .mask = TPS65917_INT4_STATUS_GPIO_6, 214 + .reg_offset = 3, 215 + }, 216 + [TPS65917_RESERVED10] = { 217 + .mask = TPS65917_RESERVED10, 218 + .reg_offset = 3, 46 219 }, 47 220 }; 48 221 ··· 313 232 PALMAS_INT1_MASK), 314 233 }; 315 234 235 + static struct regmap_irq_chip tps65917_irq_chip = { 236 + .name = "tps65917", 237 + .irqs = tps65917_irqs, 238 + .num_irqs = ARRAY_SIZE(tps65917_irqs), 239 + 240 + .num_regs = 4, 241 + .irq_reg_stride = 5, 242 + .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, 243 + PALMAS_INT1_STATUS), 244 + .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, 245 + PALMAS_INT1_MASK), 246 + }; 247 + 316 248 int palmas_ext_control_req_config(struct palmas *palmas, 317 249 enum palmas_external_requestor_id id, int ext_ctrl, bool enable) 318 250 { 251 + struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata; 319 252 int preq_mask_bit = 0; 320 253 int reg_add = 0; 321 - int bit_pos; 322 - int ret; 254 + int bit_pos, ret; 323 255 324 256 if (!(ext_ctrl & PALMAS_EXT_REQ)) 325 257 return 0; ··· 351 257 preq_mask_bit = 2; 352 258 } 353 259 354 - bit_pos = sleep_req_info[id].bit_pos; 355 - reg_add += sleep_req_info[id].reg_offset; 260 + bit_pos = pmic_ddata->sleep_req_info[id].bit_pos; 261 + reg_add += pmic_ddata->sleep_req_info[id].reg_offset; 356 262 if (enable) 357 263 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 358 264 reg_add, BIT(bit_pos), BIT(bit_pos)); ··· 451 357 static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST; 452 358 static unsigned int tps659038_features; 453 359 360 + struct palmas_driver_data { 361 + unsigned int *features; 362 + struct regmap_irq_chip *irq_chip; 363 + }; 364 + 365 + static struct palmas_driver_data palmas_data = { 366 + .features = &palmas_features, 367 + .irq_chip = &palmas_irq_chip, 368 + }; 369 + 370 + static struct palmas_driver_data tps659038_data = { 371 + .features = &tps659038_features, 372 + .irq_chip = &palmas_irq_chip, 373 + }; 374 + 375 + static struct palmas_driver_data tps65917_data = { 376 + .features = &tps659038_features, 377 + .irq_chip = &tps65917_irq_chip, 378 + }; 379 + 454 380 static const struct of_device_id of_palmas_match_tbl[] = { 455 381 { 456 382 .compatible = "ti,palmas", 457 - .data = &palmas_features, 383 + .data = &palmas_data, 458 384 }, 459 385 { 460 386 .compatible = "ti,tps659038", 461 - .data = &tps659038_features, 387 + .data = &tps659038_data, 388 + }, 389 + { 390 + .compatible = "ti,tps65917", 391 + .data = &tps65917_data, 462 392 }, 463 393 { }, 464 394 }; ··· 493 375 { 494 376 struct palmas *palmas; 495 377 struct palmas_platform_data *pdata; 378 + struct palmas_driver_data *driver_data; 496 379 struct device_node *node = i2c->dev.of_node; 497 380 int ret = 0, i; 498 - unsigned int reg, addr, *features; 381 + unsigned int reg, addr; 499 382 int slave; 500 383 const struct of_device_id *match; 501 384 ··· 527 408 if (!match) 528 409 return -ENODATA; 529 410 530 - features = (unsigned int *)match->data; 531 - palmas->features = *features; 411 + driver_data = (struct palmas_driver_data *)match->data; 412 + palmas->features = *driver_data->features; 532 413 533 414 for (i = 0; i < PALMAS_NUM_CLIENTS; i++) { 534 415 if (i == 0) ··· 582 463 regmap_write(palmas->regmap[slave], addr, reg); 583 464 584 465 ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq, 585 - IRQF_ONESHOT | pdata->irq_flags, 0, &palmas_irq_chip, 586 - &palmas->irq_data); 466 + IRQF_ONESHOT | pdata->irq_flags, 0, 467 + driver_data->irq_chip, &palmas->irq_data); 587 468 if (ret < 0) 588 469 goto err_i2c; 589 470
-1
drivers/regulator/88pm800.c
··· 52 52 #define PM800_BUCK1_3 (0x3F) 53 53 #define PM800_BUCK2 (0x40) 54 54 #define PM800_BUCK3 (0x41) 55 - #define PM800_BUCK3 (0x41) 56 55 #define PM800_BUCK4 (0x42) 57 56 #define PM800_BUCK4_1 (0x43) 58 57 #define PM800_BUCK4_2 (0x44)
+12 -2
drivers/regulator/Kconfig
··· 198 198 converter 12A DC-DC Buck controlled through an I2C 199 199 interface. 200 200 201 + config REGULATOR_DA9211 202 + tristate "Dialog Semiconductor DA9211/DA9212 regulator" 203 + depends on I2C 204 + select REGMAP_I2C 205 + help 206 + Say y here to support for the Dialog Semiconductor DA9211/DA9212. 207 + The DA9211/DA9212 is a multi-phase synchronous step down 208 + converter 12A DC-DC Buck controlled through an I2C 209 + interface. 210 + 201 211 config REGULATOR_DBX500_PRCMU 202 212 bool 203 213 ··· 467 457 via I2C bus. S2MPA01 has 10 Bucks and 26 LDO outputs. 468 458 469 459 config REGULATOR_S2MPS11 470 - tristate "Samsung S2MPS11/S2MPS14 voltage regulator" 460 + tristate "Samsung S2MPS11/S2MPS14/S2MPU02 voltage regulator" 471 461 depends on MFD_SEC_CORE 472 462 help 473 - This driver supports a Samsung S2MPS11/S2MPS14 voltage output 463 + This driver supports a Samsung S2MPS11/S2MPS14/S2MPU02 voltage output 474 464 regulator via I2C bus. The chip is comprised of high efficient Buck 475 465 converters including Dual-Phase Buck converter, Buck-Boost converter, 476 466 various LDOs.
+1
drivers/regulator/Makefile
··· 27 27 obj-$(CONFIG_REGULATOR_DA9055) += da9055-regulator.o 28 28 obj-$(CONFIG_REGULATOR_DA9063) += da9063-regulator.o 29 29 obj-$(CONFIG_REGULATOR_DA9210) += da9210-regulator.o 30 + obj-$(CONFIG_REGULATOR_DA9211) += da9211-regulator.o 30 31 obj-$(CONFIG_REGULATOR_DBX500_PRCMU) += dbx500-prcmu.o 31 32 obj-$(CONFIG_REGULATOR_DB8500_PRCMU) += db8500-prcmu.o 32 33 obj-$(CONFIG_REGULATOR_FAN53555) += fan53555.o
+9 -29
drivers/regulator/ab8500.c
··· 3037 3037 return 0; 3038 3038 } 3039 3039 3040 - static int 3041 - ab8500_regulator_of_probe(struct platform_device *pdev, 3042 - struct device_node *np) 3043 - { 3044 - struct of_regulator_match *match = abx500_regulator.match; 3045 - int err, i; 3046 - 3047 - for (i = 0; i < abx500_regulator.info_size; i++) { 3048 - err = ab8500_regulator_register( 3049 - pdev, match[i].init_data, i, match[i].of_node); 3050 - if (err) 3051 - return err; 3052 - } 3053 - 3054 - return 0; 3055 - } 3056 - 3057 3040 static int ab8500_regulator_probe(struct platform_device *pdev) 3058 3041 { 3059 3042 struct ab8500 *ab8500 = dev_get_drvdata(pdev->dev.parent); 3060 3043 struct device_node *np = pdev->dev.of_node; 3061 - int err; 3044 + struct of_regulator_match *match; 3045 + int err, i; 3062 3046 3063 3047 if (!ab8500) { 3064 3048 dev_err(&pdev->dev, "null mfd parent\n"); ··· 3059 3075 "Error parsing regulator init data: %d\n", err); 3060 3076 return err; 3061 3077 } 3062 - return ab8500_regulator_of_probe(pdev, np); 3063 - } 3064 3078 3065 - static int ab8500_regulator_remove(struct platform_device *pdev) 3066 - { 3067 - int err; 3068 - 3069 - /* remove regulator debug */ 3070 - err = ab8500_regulator_debug_exit(pdev); 3071 - if (err) 3072 - return err; 3079 + match = abx500_regulator.match; 3080 + for (i = 0; i < abx500_regulator.info_size; i++) { 3081 + err = ab8500_regulator_register(pdev, match[i].init_data, i, 3082 + match[i].of_node); 3083 + if (err) 3084 + return err; 3085 + } 3073 3086 3074 3087 return 0; 3075 3088 } 3076 3089 3077 3090 static struct platform_driver ab8500_regulator_driver = { 3078 3091 .probe = ab8500_regulator_probe, 3079 - .remove = ab8500_regulator_remove, 3080 3092 .driver = { 3081 3093 .name = "ab8500-regulator", 3082 3094 .owner = THIS_MODULE,
+190 -141
drivers/regulator/act8865-regulator.c
··· 1 1 /* 2 - * act8865-regulator.c - Voltage regulation for the active-semi ACT8865 3 - * http://www.active-semi.com/sheets/ACT8865_Datasheet.pdf 2 + * act8865-regulator.c - Voltage regulation for active-semi ACT88xx PMUs 3 + * 4 + * http://www.active-semi.com/products/power-management-units/act88xx/ 4 5 * 5 6 * Copyright (C) 2013 Atmel Corporation 6 7 * ··· 27 26 #include <linux/of_device.h> 28 27 #include <linux/regulator/of_regulator.h> 29 28 #include <linux/regmap.h> 29 + 30 + /* 31 + * ACT8846 Global Register Map. 32 + */ 33 + #define ACT8846_SYS0 0x00 34 + #define ACT8846_SYS1 0x01 35 + #define ACT8846_REG1_VSET 0x10 36 + #define ACT8846_REG1_CTRL 0x12 37 + #define ACT8846_REG2_VSET0 0x20 38 + #define ACT8846_REG2_VSET1 0x21 39 + #define ACT8846_REG2_CTRL 0x22 40 + #define ACT8846_REG3_VSET0 0x30 41 + #define ACT8846_REG3_VSET1 0x31 42 + #define ACT8846_REG3_CTRL 0x32 43 + #define ACT8846_REG4_VSET0 0x40 44 + #define ACT8846_REG4_VSET1 0x41 45 + #define ACT8846_REG4_CTRL 0x42 46 + #define ACT8846_REG5_VSET 0x50 47 + #define ACT8846_REG5_CTRL 0x51 48 + #define ACT8846_REG6_VSET 0x58 49 + #define ACT8846_REG6_CTRL 0x59 50 + #define ACT8846_REG7_VSET 0x60 51 + #define ACT8846_REG7_CTRL 0x61 52 + #define ACT8846_REG8_VSET 0x68 53 + #define ACT8846_REG8_CTRL 0x69 54 + #define ACT8846_REG9_VSET 0x70 55 + #define ACT8846_REG9_CTRL 0x71 56 + #define ACT8846_REG10_VSET 0x80 57 + #define ACT8846_REG10_CTRL 0x81 58 + #define ACT8846_REG11_VSET 0x90 59 + #define ACT8846_REG11_CTRL 0x91 60 + #define ACT8846_REG12_VSET 0xa0 61 + #define ACT8846_REG12_CTRL 0xa1 62 + #define ACT8846_REG13_CTRL 0xb1 30 63 31 64 /* 32 65 * ACT8865 Global Register Map. ··· 105 70 .val_bits = 8, 106 71 }; 107 72 108 - static const struct regulator_linear_range act8865_volatge_ranges[] = { 73 + static const struct regulator_linear_range act8865_voltage_ranges[] = { 109 74 REGULATOR_LINEAR_RANGE(600000, 0, 23, 25000), 110 75 REGULATOR_LINEAR_RANGE(1200000, 24, 47, 50000), 111 76 REGULATOR_LINEAR_RANGE(2400000, 48, 63, 100000), ··· 121 86 .is_enabled = regulator_is_enabled_regmap, 122 87 }; 123 88 124 - static const struct regulator_desc act8865_reg[] = { 125 - { 126 - .name = "DCDC_REG1", 127 - .id = ACT8865_ID_DCDC1, 128 - .ops = &act8865_ops, 129 - .type = REGULATOR_VOLTAGE, 130 - .n_voltages = ACT8865_VOLTAGE_NUM, 131 - .linear_ranges = act8865_volatge_ranges, 132 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 133 - .vsel_reg = ACT8865_DCDC1_VSET1, 134 - .vsel_mask = ACT8865_VSEL_MASK, 135 - .enable_reg = ACT8865_DCDC1_CTRL, 136 - .enable_mask = ACT8865_ENA, 137 - .owner = THIS_MODULE, 138 - }, 139 - { 140 - .name = "DCDC_REG2", 141 - .id = ACT8865_ID_DCDC2, 142 - .ops = &act8865_ops, 143 - .type = REGULATOR_VOLTAGE, 144 - .n_voltages = ACT8865_VOLTAGE_NUM, 145 - .linear_ranges = act8865_volatge_ranges, 146 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 147 - .vsel_reg = ACT8865_DCDC2_VSET1, 148 - .vsel_mask = ACT8865_VSEL_MASK, 149 - .enable_reg = ACT8865_DCDC2_CTRL, 150 - .enable_mask = ACT8865_ENA, 151 - .owner = THIS_MODULE, 152 - }, 153 - { 154 - .name = "DCDC_REG3", 155 - .id = ACT8865_ID_DCDC3, 156 - .ops = &act8865_ops, 157 - .type = REGULATOR_VOLTAGE, 158 - .n_voltages = ACT8865_VOLTAGE_NUM, 159 - .linear_ranges = act8865_volatge_ranges, 160 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 161 - .vsel_reg = ACT8865_DCDC3_VSET1, 162 - .vsel_mask = ACT8865_VSEL_MASK, 163 - .enable_reg = ACT8865_DCDC3_CTRL, 164 - .enable_mask = ACT8865_ENA, 165 - .owner = THIS_MODULE, 166 - }, 167 - { 168 - .name = "LDO_REG1", 169 - .id = ACT8865_ID_LDO1, 170 - .ops = &act8865_ops, 171 - .type = REGULATOR_VOLTAGE, 172 - .n_voltages = ACT8865_VOLTAGE_NUM, 173 - .linear_ranges = act8865_volatge_ranges, 174 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 175 - .vsel_reg = ACT8865_LDO1_VSET, 176 - .vsel_mask = ACT8865_VSEL_MASK, 177 - .enable_reg = ACT8865_LDO1_CTRL, 178 - .enable_mask = ACT8865_ENA, 179 - .owner = THIS_MODULE, 180 - }, 181 - { 182 - .name = "LDO_REG2", 183 - .id = ACT8865_ID_LDO2, 184 - .ops = &act8865_ops, 185 - .type = REGULATOR_VOLTAGE, 186 - .n_voltages = ACT8865_VOLTAGE_NUM, 187 - .linear_ranges = act8865_volatge_ranges, 188 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 189 - .vsel_reg = ACT8865_LDO2_VSET, 190 - .vsel_mask = ACT8865_VSEL_MASK, 191 - .enable_reg = ACT8865_LDO2_CTRL, 192 - .enable_mask = ACT8865_ENA, 193 - .owner = THIS_MODULE, 194 - }, 195 - { 196 - .name = "LDO_REG3", 197 - .id = ACT8865_ID_LDO3, 198 - .ops = &act8865_ops, 199 - .type = REGULATOR_VOLTAGE, 200 - .n_voltages = ACT8865_VOLTAGE_NUM, 201 - .linear_ranges = act8865_volatge_ranges, 202 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 203 - .vsel_reg = ACT8865_LDO3_VSET, 204 - .vsel_mask = ACT8865_VSEL_MASK, 205 - .enable_reg = ACT8865_LDO3_CTRL, 206 - .enable_mask = ACT8865_ENA, 207 - .owner = THIS_MODULE, 208 - }, 209 - { 210 - .name = "LDO_REG4", 211 - .id = ACT8865_ID_LDO4, 212 - .ops = &act8865_ops, 213 - .type = REGULATOR_VOLTAGE, 214 - .n_voltages = ACT8865_VOLTAGE_NUM, 215 - .linear_ranges = act8865_volatge_ranges, 216 - .n_linear_ranges = ARRAY_SIZE(act8865_volatge_ranges), 217 - .vsel_reg = ACT8865_LDO4_VSET, 218 - .vsel_mask = ACT8865_VSEL_MASK, 219 - .enable_reg = ACT8865_LDO4_CTRL, 220 - .enable_mask = ACT8865_ENA, 221 - .owner = THIS_MODULE, 222 - }, 89 + #define ACT88xx_REG(_name, _family, _id, _vsel_reg) \ 90 + [_family##_ID_##_id] = { \ 91 + .name = _name, \ 92 + .id = _family##_ID_##_id, \ 93 + .type = REGULATOR_VOLTAGE, \ 94 + .ops = &act8865_ops, \ 95 + .n_voltages = ACT8865_VOLTAGE_NUM, \ 96 + .linear_ranges = act8865_voltage_ranges, \ 97 + .n_linear_ranges = ARRAY_SIZE(act8865_voltage_ranges), \ 98 + .vsel_reg = _family##_##_id##_##_vsel_reg, \ 99 + .vsel_mask = ACT8865_VSEL_MASK, \ 100 + .enable_reg = _family##_##_id##_CTRL, \ 101 + .enable_mask = ACT8865_ENA, \ 102 + .owner = THIS_MODULE, \ 103 + } 104 + 105 + static const struct regulator_desc act8846_regulators[] = { 106 + ACT88xx_REG("REG1", ACT8846, REG1, VSET), 107 + ACT88xx_REG("REG2", ACT8846, REG2, VSET0), 108 + ACT88xx_REG("REG3", ACT8846, REG3, VSET0), 109 + ACT88xx_REG("REG4", ACT8846, REG4, VSET0), 110 + ACT88xx_REG("REG5", ACT8846, REG5, VSET), 111 + ACT88xx_REG("REG6", ACT8846, REG6, VSET), 112 + ACT88xx_REG("REG7", ACT8846, REG7, VSET), 113 + ACT88xx_REG("REG8", ACT8846, REG8, VSET), 114 + ACT88xx_REG("REG9", ACT8846, REG9, VSET), 115 + ACT88xx_REG("REG10", ACT8846, REG10, VSET), 116 + ACT88xx_REG("REG11", ACT8846, REG11, VSET), 117 + ACT88xx_REG("REG12", ACT8846, REG12, VSET), 118 + }; 119 + 120 + static const struct regulator_desc act8865_regulators[] = { 121 + ACT88xx_REG("DCDC_REG1", ACT8865, DCDC1, VSET1), 122 + ACT88xx_REG("DCDC_REG2", ACT8865, DCDC2, VSET1), 123 + ACT88xx_REG("DCDC_REG3", ACT8865, DCDC3, VSET1), 124 + ACT88xx_REG("LDO_REG1", ACT8865, LDO1, VSET), 125 + ACT88xx_REG("LDO_REG2", ACT8865, LDO2, VSET), 126 + ACT88xx_REG("LDO_REG3", ACT8865, LDO3, VSET), 127 + ACT88xx_REG("LDO_REG4", ACT8865, LDO4, VSET), 223 128 }; 224 129 225 130 #ifdef CONFIG_OF 226 131 static const struct of_device_id act8865_dt_ids[] = { 227 - { .compatible = "active-semi,act8865" }, 132 + { .compatible = "active-semi,act8846", .data = (void *)ACT8846 }, 133 + { .compatible = "active-semi,act8865", .data = (void *)ACT8865 }, 228 134 { } 229 135 }; 230 136 MODULE_DEVICE_TABLE(of, act8865_dt_ids); 137 + 138 + static struct of_regulator_match act8846_matches[] = { 139 + [ACT8846_ID_REG1] = { .name = "REG1" }, 140 + [ACT8846_ID_REG2] = { .name = "REG2" }, 141 + [ACT8846_ID_REG3] = { .name = "REG3" }, 142 + [ACT8846_ID_REG4] = { .name = "REG4" }, 143 + [ACT8846_ID_REG5] = { .name = "REG5" }, 144 + [ACT8846_ID_REG6] = { .name = "REG6" }, 145 + [ACT8846_ID_REG7] = { .name = "REG7" }, 146 + [ACT8846_ID_REG8] = { .name = "REG8" }, 147 + [ACT8846_ID_REG9] = { .name = "REG9" }, 148 + [ACT8846_ID_REG10] = { .name = "REG10" }, 149 + [ACT8846_ID_REG11] = { .name = "REG11" }, 150 + [ACT8846_ID_REG12] = { .name = "REG12" }, 151 + }; 231 152 232 153 static struct of_regulator_match act8865_matches[] = { 233 154 [ACT8865_ID_DCDC1] = { .name = "DCDC_REG1"}, ··· 197 206 198 207 static int act8865_pdata_from_dt(struct device *dev, 199 208 struct device_node **of_node, 200 - struct act8865_platform_data *pdata) 209 + struct act8865_platform_data *pdata, 210 + unsigned long type) 201 211 { 202 - int matched, i; 212 + int matched, i, num_matches; 203 213 struct device_node *np; 204 214 struct act8865_regulator_data *regulator; 215 + struct of_regulator_match *matches; 205 216 206 217 np = of_get_child_by_name(dev->of_node, "regulators"); 207 218 if (!np) { ··· 211 218 return -EINVAL; 212 219 } 213 220 214 - matched = of_regulator_match(dev, np, 215 - act8865_matches, ARRAY_SIZE(act8865_matches)); 221 + switch (type) { 222 + case ACT8846: 223 + matches = act8846_matches; 224 + num_matches = ARRAY_SIZE(act8846_matches); 225 + break; 226 + case ACT8865: 227 + matches = act8865_matches; 228 + num_matches = ARRAY_SIZE(act8865_matches); 229 + break; 230 + default: 231 + dev_err(dev, "invalid device id %lu\n", type); 232 + return -EINVAL; 233 + } 234 + 235 + matched = of_regulator_match(dev, np, matches, num_matches); 216 236 of_node_put(np); 217 237 if (matched <= 0) 218 238 return matched; 219 239 220 240 pdata->regulators = devm_kzalloc(dev, 221 - sizeof(struct act8865_regulator_data) * 222 - ARRAY_SIZE(act8865_matches), GFP_KERNEL); 241 + sizeof(struct act8865_regulator_data) * 242 + num_matches, GFP_KERNEL); 223 243 if (!pdata->regulators) 224 244 return -ENOMEM; 225 245 226 - pdata->num_regulators = matched; 246 + pdata->num_regulators = num_matches; 227 247 regulator = pdata->regulators; 228 248 229 - for (i = 0; i < ARRAY_SIZE(act8865_matches); i++) { 249 + for (i = 0; i < num_matches; i++) { 230 250 regulator->id = i; 231 - regulator->name = act8865_matches[i].name; 232 - regulator->platform_data = act8865_matches[i].init_data; 233 - of_node[i] = act8865_matches[i].of_node; 251 + regulator->name = matches[i].name; 252 + regulator->platform_data = matches[i].init_data; 253 + of_node[i] = matches[i].of_node; 234 254 regulator++; 235 255 } 236 256 ··· 252 246 #else 253 247 static inline int act8865_pdata_from_dt(struct device *dev, 254 248 struct device_node **of_node, 255 - struct act8865_platform_data *pdata) 249 + struct act8865_platform_data *pdata, 250 + unsigned long type) 256 251 { 257 252 return 0; 258 253 } 259 254 #endif 260 255 261 - static int act8865_pmic_probe(struct i2c_client *client, 262 - const struct i2c_device_id *i2c_id) 256 + static struct regulator_init_data 257 + *act8865_get_init_data(int id, struct act8865_platform_data *pdata) 263 258 { 264 - struct regulator_dev *rdev; 259 + int i; 260 + 261 + if (!pdata) 262 + return NULL; 263 + 264 + for (i = 0; i < pdata->num_regulators; i++) { 265 + if (pdata->regulators[i].id == id) 266 + return pdata->regulators[i].platform_data; 267 + } 268 + 269 + return NULL; 270 + } 271 + 272 + static int act8865_pmic_probe(struct i2c_client *client, 273 + const struct i2c_device_id *i2c_id) 274 + { 275 + static const struct regulator_desc *regulators; 276 + struct act8865_platform_data pdata_of, *pdata; 265 277 struct device *dev = &client->dev; 266 - struct act8865_platform_data *pdata = dev_get_platdata(dev); 267 - struct regulator_config config = { }; 278 + struct device_node **of_node; 279 + int i, ret, num_regulators; 268 280 struct act8865 *act8865; 269 - struct device_node *of_node[ACT8865_REG_NUM]; 270 - int i, id; 271 - int ret = -EINVAL; 272 - int error; 281 + unsigned long type; 282 + 283 + pdata = dev_get_platdata(dev); 273 284 274 285 if (dev->of_node && !pdata) { 275 286 const struct of_device_id *id; 276 - struct act8865_platform_data pdata_of; 277 287 278 288 id = of_match_device(of_match_ptr(act8865_dt_ids), dev); 279 289 if (!id) 280 290 return -ENODEV; 281 291 282 - ret = act8865_pdata_from_dt(dev, of_node, &pdata_of); 292 + type = (unsigned long) id->data; 293 + } else { 294 + type = i2c_id->driver_data; 295 + } 296 + 297 + switch (type) { 298 + case ACT8846: 299 + regulators = act8846_regulators; 300 + num_regulators = ARRAY_SIZE(act8846_regulators); 301 + break; 302 + case ACT8865: 303 + regulators = act8865_regulators; 304 + num_regulators = ARRAY_SIZE(act8865_regulators); 305 + break; 306 + default: 307 + dev_err(dev, "invalid device id %lu\n", type); 308 + return -EINVAL; 309 + } 310 + 311 + of_node = devm_kzalloc(dev, sizeof(struct device_node *) * 312 + num_regulators, GFP_KERNEL); 313 + if (!of_node) 314 + return -ENOMEM; 315 + 316 + if (dev->of_node && !pdata) { 317 + ret = act8865_pdata_from_dt(dev, of_node, &pdata_of, type); 283 318 if (ret < 0) 284 319 return ret; 285 320 286 321 pdata = &pdata_of; 287 322 } 288 323 289 - if (pdata->num_regulators > ACT8865_REG_NUM) { 290 - dev_err(dev, "Too many regulators found!\n"); 324 + if (pdata->num_regulators > num_regulators) { 325 + dev_err(dev, "too many regulators: %d\n", 326 + pdata->num_regulators); 291 327 return -EINVAL; 292 328 } 293 329 ··· 339 291 340 292 act8865->regmap = devm_regmap_init_i2c(client, &act8865_regmap_config); 341 293 if (IS_ERR(act8865->regmap)) { 342 - error = PTR_ERR(act8865->regmap); 294 + ret = PTR_ERR(act8865->regmap); 343 295 dev_err(&client->dev, "Failed to allocate register map: %d\n", 344 - error); 345 - return error; 296 + ret); 297 + return ret; 346 298 } 347 299 348 300 /* Finally register devices */ 349 - for (i = 0; i < ACT8865_REG_NUM; i++) { 350 - 351 - id = pdata->regulators[i].id; 301 + for (i = 0; i < num_regulators; i++) { 302 + const struct regulator_desc *desc = &regulators[i]; 303 + struct regulator_config config = { }; 304 + struct regulator_dev *rdev; 352 305 353 306 config.dev = dev; 354 - config.init_data = pdata->regulators[i].platform_data; 307 + config.init_data = act8865_get_init_data(desc->id, pdata); 355 308 config.of_node = of_node[i]; 356 309 config.driver_data = act8865; 357 310 config.regmap = act8865->regmap; 358 311 359 - rdev = devm_regulator_register(&client->dev, &act8865_reg[i], 360 - &config); 312 + rdev = devm_regulator_register(&client->dev, desc, &config); 361 313 if (IS_ERR(rdev)) { 362 - dev_err(dev, "failed to register %s\n", 363 - act8865_reg[id].name); 314 + dev_err(dev, "failed to register %s\n", desc->name); 364 315 return PTR_ERR(rdev); 365 316 } 366 317 } 367 318 368 319 i2c_set_clientdata(client, act8865); 320 + devm_kfree(dev, of_node); 369 321 370 322 return 0; 371 323 } 372 324 373 325 static const struct i2c_device_id act8865_ids[] = { 374 - { "act8865", 0 }, 326 + { .name = "act8846", .driver_data = ACT8846 }, 327 + { .name = "act8865", .driver_data = ACT8865 }, 375 328 { }, 376 329 }; 377 330 MODULE_DEVICE_TABLE(i2c, act8865_ids); ··· 388 339 389 340 module_i2c_driver(act8865_pmic_driver); 390 341 391 - MODULE_DESCRIPTION("active-semi act8865 voltage regulator driver"); 342 + MODULE_DESCRIPTION("active-semi act88xx voltage regulator driver"); 392 343 MODULE_AUTHOR("Wenyou Yang <wenyou.yang@atmel.com>"); 393 344 MODULE_LICENSE("GPL v2");
-2
drivers/regulator/arizona-ldo1.c
··· 143 143 .map_voltage = regulator_map_voltage_linear, 144 144 .get_voltage_sel = regulator_get_voltage_sel_regmap, 145 145 .set_voltage_sel = regulator_set_voltage_sel_regmap, 146 - .get_bypass = regulator_get_bypass_regmap, 147 - .set_bypass = regulator_set_bypass_regmap, 148 146 }; 149 147 150 148 static const struct regulator_desc arizona_ldo1 = {
+2 -2
drivers/regulator/as3722-regulator.c
··· 219 219 { 220 220 .regulator_id = AS3722_REGULATOR_ID_LDO3, 221 221 .name = "as3722-ldo3", 222 - .name = "vin-ldo3-4", 222 + .sname = "vin-ldo3-4", 223 223 .vsel_reg = AS3722_LDO3_VOLTAGE_REG, 224 224 .vsel_mask = AS3722_LDO3_VSEL_MASK, 225 225 .enable_reg = AS3722_LDOCONTROL0_REG, ··· 231 231 { 232 232 .regulator_id = AS3722_REGULATOR_ID_LDO4, 233 233 .name = "as3722-ldo4", 234 - .name = "vin-ldo3-4", 234 + .sname = "vin-ldo3-4", 235 235 .vsel_reg = AS3722_LDO4_VOLTAGE_REG, 236 236 .vsel_mask = AS3722_LDO_VSEL_MASK, 237 237 .enable_reg = AS3722_LDOCONTROL0_REG,
+4 -12
drivers/regulator/bcm590xx-regulator.c
··· 331 331 } 332 332 333 333 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); 334 - if (!data) { 335 - dev_err(&pdev->dev, "failed to allocate regulator board data\n"); 334 + if (!data) 336 335 return NULL; 337 - } 338 336 339 337 np = of_node_get(np); 340 338 regulators = of_get_child_by_name(np, "regulators"); ··· 377 379 &bcm590xx_reg_matches); 378 380 379 381 pmu = devm_kzalloc(&pdev->dev, sizeof(*pmu), GFP_KERNEL); 380 - if (!pmu) { 381 - dev_err(&pdev->dev, "Memory allocation failed for pmu\n"); 382 + if (!pmu) 382 383 return -ENOMEM; 383 - } 384 384 385 385 pmu->mfd = bcm590xx; 386 386 ··· 386 390 387 391 pmu->desc = devm_kzalloc(&pdev->dev, BCM590XX_NUM_REGS * 388 392 sizeof(struct regulator_desc), GFP_KERNEL); 389 - if (!pmu->desc) { 390 - dev_err(&pdev->dev, "Memory alloc fails for desc\n"); 393 + if (!pmu->desc) 391 394 return -ENOMEM; 392 - } 393 395 394 396 pmu->info = devm_kzalloc(&pdev->dev, BCM590XX_NUM_REGS * 395 397 sizeof(struct bcm590xx_info *), GFP_KERNEL); 396 - if (!pmu->info) { 397 - dev_err(&pdev->dev, "Memory alloc fails for info\n"); 398 + if (!pmu->info) 398 399 return -ENOMEM; 399 - } 400 400 401 401 info = bcm590xx_regs; 402 402
+108 -18
drivers/regulator/core.c
··· 24 24 #include <linux/suspend.h> 25 25 #include <linux/delay.h> 26 26 #include <linux/gpio.h> 27 + #include <linux/gpio/consumer.h> 27 28 #include <linux/of.h> 28 29 #include <linux/regmap.h> 29 30 #include <linux/regulator/of_regulator.h> ··· 78 77 */ 79 78 struct regulator_enable_gpio { 80 79 struct list_head list; 81 - int gpio; 80 + struct gpio_desc *gpiod; 82 81 u32 enable_count; /* a number of enabled shared GPIO */ 83 82 u32 request_count; /* a number of requested shared GPIO */ 84 83 unsigned int ena_gpio_invert:1; ··· 847 846 rdev->constraints->min_uV == rdev->constraints->max_uV) { 848 847 int current_uV = _regulator_get_voltage(rdev); 849 848 if (current_uV < 0) { 850 - rdev_err(rdev, "failed to get the current voltage\n"); 849 + rdev_err(rdev, 850 + "failed to get the current voltage(%d)\n", 851 + current_uV); 851 852 return current_uV; 852 853 } 853 854 if (current_uV < rdev->constraints->min_uV || ··· 859 856 rdev->constraints->max_uV); 860 857 if (ret < 0) { 861 858 rdev_err(rdev, 862 - "failed to apply %duV constraint\n", 863 - rdev->constraints->min_uV); 859 + "failed to apply %duV constraint(%d)\n", 860 + rdev->constraints->min_uV, ret); 864 861 return ret; 865 862 } 866 863 } ··· 1663 1660 const struct regulator_config *config) 1664 1661 { 1665 1662 struct regulator_enable_gpio *pin; 1663 + struct gpio_desc *gpiod; 1666 1664 int ret; 1667 1665 1666 + gpiod = gpio_to_desc(config->ena_gpio); 1667 + 1668 1668 list_for_each_entry(pin, &regulator_ena_gpio_list, list) { 1669 - if (pin->gpio == config->ena_gpio) { 1669 + if (pin->gpiod == gpiod) { 1670 1670 rdev_dbg(rdev, "GPIO %d is already used\n", 1671 1671 config->ena_gpio); 1672 1672 goto update_ena_gpio_to_rdev; ··· 1688 1682 return -ENOMEM; 1689 1683 } 1690 1684 1691 - pin->gpio = config->ena_gpio; 1685 + pin->gpiod = gpiod; 1692 1686 pin->ena_gpio_invert = config->ena_gpio_invert; 1693 1687 list_add(&pin->list, &regulator_ena_gpio_list); 1694 1688 ··· 1707 1701 1708 1702 /* Free the GPIO only in case of no use */ 1709 1703 list_for_each_entry_safe(pin, n, &regulator_ena_gpio_list, list) { 1710 - if (pin->gpio == rdev->ena_pin->gpio) { 1704 + if (pin->gpiod == rdev->ena_pin->gpiod) { 1711 1705 if (pin->request_count <= 1) { 1712 1706 pin->request_count = 0; 1713 - gpio_free(pin->gpio); 1707 + gpiod_put(pin->gpiod); 1714 1708 list_del(&pin->list); 1715 1709 kfree(pin); 1716 1710 } else { ··· 1738 1732 if (enable) { 1739 1733 /* Enable GPIO at initial use */ 1740 1734 if (pin->enable_count == 0) 1741 - gpio_set_value_cansleep(pin->gpio, 1742 - !pin->ena_gpio_invert); 1735 + gpiod_set_value_cansleep(pin->gpiod, 1736 + !pin->ena_gpio_invert); 1743 1737 1744 1738 pin->enable_count++; 1745 1739 } else { ··· 1750 1744 1751 1745 /* Disable GPIO if not used */ 1752 1746 if (pin->enable_count <= 1) { 1753 - gpio_set_value_cansleep(pin->gpio, 1754 - pin->ena_gpio_invert); 1747 + gpiod_set_value_cansleep(pin->gpiod, 1748 + pin->ena_gpio_invert); 1755 1749 pin->enable_count = 0; 1756 1750 } 1757 1751 } ··· 2186 2180 { 2187 2181 struct regulator_dev *rdev = regulator->rdev; 2188 2182 2189 - return rdev->desc->n_voltages ? : -EINVAL; 2183 + if (rdev->desc->n_voltages) 2184 + return rdev->desc->n_voltages; 2185 + 2186 + if (!rdev->supply) 2187 + return -EINVAL; 2188 + 2189 + return regulator_count_voltages(rdev->supply); 2190 2190 } 2191 2191 EXPORT_SYMBOL_GPL(regulator_count_voltages); 2192 2192 ··· 2215 2203 if (rdev->desc->fixed_uV && rdev->desc->n_voltages == 1 && !selector) 2216 2204 return rdev->desc->fixed_uV; 2217 2205 2218 - if (!ops->list_voltage || selector >= rdev->desc->n_voltages) 2206 + if (ops->list_voltage) { 2207 + if (selector >= rdev->desc->n_voltages) 2208 + return -EINVAL; 2209 + mutex_lock(&rdev->mutex); 2210 + ret = ops->list_voltage(rdev, selector); 2211 + mutex_unlock(&rdev->mutex); 2212 + } else if (rdev->supply) { 2213 + ret = regulator_list_voltage(rdev->supply, selector); 2214 + } else { 2219 2215 return -EINVAL; 2220 - 2221 - mutex_lock(&rdev->mutex); 2222 - ret = ops->list_voltage(rdev, selector); 2223 - mutex_unlock(&rdev->mutex); 2216 + } 2224 2217 2225 2218 if (ret > 0) { 2226 2219 if (ret < rdev->constraints->min_uV) ··· 2237 2220 return ret; 2238 2221 } 2239 2222 EXPORT_SYMBOL_GPL(regulator_list_voltage); 2223 + 2224 + /** 2225 + * regulator_get_regmap - get the regulator's register map 2226 + * @regulator: regulator source 2227 + * 2228 + * Returns the register map for the given regulator, or an ERR_PTR value 2229 + * if the regulator doesn't use regmap. 2230 + */ 2231 + struct regmap *regulator_get_regmap(struct regulator *regulator) 2232 + { 2233 + struct regmap *map = regulator->rdev->regmap; 2234 + 2235 + return map ? map : ERR_PTR(-EOPNOTSUPP); 2236 + } 2237 + 2238 + /** 2239 + * regulator_get_hardware_vsel_register - get the HW voltage selector register 2240 + * @regulator: regulator source 2241 + * @vsel_reg: voltage selector register, output parameter 2242 + * @vsel_mask: mask for voltage selector bitfield, output parameter 2243 + * 2244 + * Returns the hardware register offset and bitmask used for setting the 2245 + * regulator voltage. This might be useful when configuring voltage-scaling 2246 + * hardware or firmware that can make I2C requests behind the kernel's back, 2247 + * for example. 2248 + * 2249 + * On success, the output parameters @vsel_reg and @vsel_mask are filled in 2250 + * and 0 is returned, otherwise a negative errno is returned. 2251 + */ 2252 + int regulator_get_hardware_vsel_register(struct regulator *regulator, 2253 + unsigned *vsel_reg, 2254 + unsigned *vsel_mask) 2255 + { 2256 + struct regulator_dev *rdev = regulator->rdev; 2257 + struct regulator_ops *ops = rdev->desc->ops; 2258 + 2259 + if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap) 2260 + return -EOPNOTSUPP; 2261 + 2262 + *vsel_reg = rdev->desc->vsel_reg; 2263 + *vsel_mask = rdev->desc->vsel_mask; 2264 + 2265 + return 0; 2266 + } 2267 + EXPORT_SYMBOL_GPL(regulator_get_hardware_vsel_register); 2268 + 2269 + /** 2270 + * regulator_list_hardware_vsel - get the HW-specific register value for a selector 2271 + * @regulator: regulator source 2272 + * @selector: identify voltage to list 2273 + * 2274 + * Converts the selector to a hardware-specific voltage selector that can be 2275 + * directly written to the regulator registers. The address of the voltage 2276 + * register can be determined by calling @regulator_get_hardware_vsel_register. 2277 + * 2278 + * On error a negative errno is returned. 2279 + */ 2280 + int regulator_list_hardware_vsel(struct regulator *regulator, 2281 + unsigned selector) 2282 + { 2283 + struct regulator_dev *rdev = regulator->rdev; 2284 + struct regulator_ops *ops = rdev->desc->ops; 2285 + 2286 + if (selector >= rdev->desc->n_voltages) 2287 + return -EINVAL; 2288 + if (ops->set_voltage_sel != regulator_set_voltage_sel_regmap) 2289 + return -EOPNOTSUPP; 2290 + 2291 + return selector; 2292 + } 2293 + EXPORT_SYMBOL_GPL(regulator_list_hardware_vsel); 2240 2294 2241 2295 /** 2242 2296 * regulator_get_linear_step - return the voltage step size between VSEL values ··· 2706 2618 ret = rdev->desc->ops->list_voltage(rdev, 0); 2707 2619 } else if (rdev->desc->fixed_uV && (rdev->desc->n_voltages == 1)) { 2708 2620 ret = rdev->desc->fixed_uV; 2621 + } else if (rdev->supply) { 2622 + ret = regulator_get_voltage(rdev->supply); 2709 2623 } else { 2710 2624 return -EINVAL; 2711 2625 }
+368
drivers/regulator/da9211-regulator.c
··· 1 + /* 2 + * da9211-regulator.c - Regulator device driver for DA9211 3 + * Copyright (C) 2014 Dialog Semiconductor Ltd. 4 + * 5 + * This library is free software; you can redistribute it and/or 6 + * modify it under the terms of the GNU Library General Public 7 + * License as published by the Free Software Foundation; either 8 + * version 2 of the License, or (at your option) any later version. 9 + * 10 + * This library is distributed in the hope that it will be useful, 11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 + * Library General Public License for more details. 14 + */ 15 + 16 + #include <linux/err.h> 17 + #include <linux/gpio.h> 18 + #include <linux/i2c.h> 19 + #include <linux/module.h> 20 + #include <linux/init.h> 21 + #include <linux/slab.h> 22 + #include <linux/regulator/driver.h> 23 + #include <linux/regulator/machine.h> 24 + #include <linux/regmap.h> 25 + #include <linux/irq.h> 26 + #include <linux/interrupt.h> 27 + #include <linux/regulator/da9211.h> 28 + #include "da9211-regulator.h" 29 + 30 + #define DA9211_BUCK_MODE_SLEEP 1 31 + #define DA9211_BUCK_MODE_SYNC 2 32 + #define DA9211_BUCK_MODE_AUTO 3 33 + 34 + /* DA9211 REGULATOR IDs */ 35 + #define DA9211_ID_BUCKA 0 36 + #define DA9211_ID_BUCKB 1 37 + 38 + struct da9211 { 39 + struct device *dev; 40 + struct regmap *regmap; 41 + struct da9211_pdata *pdata; 42 + struct regulator_dev *rdev[DA9211_MAX_REGULATORS]; 43 + int num_regulator; 44 + int chip_irq; 45 + }; 46 + 47 + static const struct regmap_range_cfg da9211_regmap_range[] = { 48 + { 49 + .selector_reg = DA9211_REG_PAGE_CON, 50 + .selector_mask = DA9211_REG_PAGE_MASK, 51 + .selector_shift = DA9211_REG_PAGE_SHIFT, 52 + .window_start = 0, 53 + .window_len = 256, 54 + .range_min = 0, 55 + .range_max = 2*256, 56 + }, 57 + }; 58 + 59 + static const struct regmap_config da9211_regmap_config = { 60 + .reg_bits = 8, 61 + .val_bits = 8, 62 + .max_register = 2 * 256, 63 + .ranges = da9211_regmap_range, 64 + .num_ranges = ARRAY_SIZE(da9211_regmap_range), 65 + }; 66 + 67 + /* Default limits measured in millivolts and milliamps */ 68 + #define DA9211_MIN_MV 300 69 + #define DA9211_MAX_MV 1570 70 + #define DA9211_STEP_MV 10 71 + 72 + /* Current limits for buck (uA) indices corresponds with register values */ 73 + static const int da9211_current_limits[] = { 74 + 2000000, 2200000, 2400000, 2600000, 2800000, 3000000, 3200000, 3400000, 75 + 3600000, 3800000, 4000000, 4200000, 4400000, 4600000, 4800000, 5000000 76 + }; 77 + 78 + static unsigned int da9211_buck_get_mode(struct regulator_dev *rdev) 79 + { 80 + int id = rdev_get_id(rdev); 81 + struct da9211 *chip = rdev_get_drvdata(rdev); 82 + unsigned int data; 83 + int ret, mode = 0; 84 + 85 + ret = regmap_read(chip->regmap, DA9211_REG_BUCKA_CONF+id, &data); 86 + if (ret < 0) 87 + return ret; 88 + 89 + switch (data & 0x03) { 90 + case DA9211_BUCK_MODE_SYNC: 91 + mode = REGULATOR_MODE_FAST; 92 + break; 93 + case DA9211_BUCK_MODE_AUTO: 94 + mode = REGULATOR_MODE_NORMAL; 95 + break; 96 + case DA9211_BUCK_MODE_SLEEP: 97 + mode = REGULATOR_MODE_STANDBY; 98 + break; 99 + } 100 + 101 + return mode; 102 + } 103 + 104 + static int da9211_buck_set_mode(struct regulator_dev *rdev, 105 + unsigned int mode) 106 + { 107 + int id = rdev_get_id(rdev); 108 + struct da9211 *chip = rdev_get_drvdata(rdev); 109 + int val = 0; 110 + 111 + switch (mode) { 112 + case REGULATOR_MODE_FAST: 113 + val = DA9211_BUCK_MODE_SYNC; 114 + break; 115 + case REGULATOR_MODE_NORMAL: 116 + val = DA9211_BUCK_MODE_AUTO; 117 + break; 118 + case REGULATOR_MODE_STANDBY: 119 + val = DA9211_BUCK_MODE_SLEEP; 120 + break; 121 + } 122 + 123 + return regmap_update_bits(chip->regmap, DA9211_REG_BUCKA_CONF+id, 124 + 0x03, val); 125 + } 126 + 127 + static int da9211_set_current_limit(struct regulator_dev *rdev, int min, 128 + int max) 129 + { 130 + int id = rdev_get_id(rdev); 131 + struct da9211 *chip = rdev_get_drvdata(rdev); 132 + int i; 133 + 134 + /* search for closest to maximum */ 135 + for (i = ARRAY_SIZE(da9211_current_limits)-1; i >= 0; i--) { 136 + if (min <= da9211_current_limits[i] && 137 + max >= da9211_current_limits[i]) { 138 + return regmap_update_bits(chip->regmap, 139 + DA9211_REG_BUCK_ILIM, 140 + (0x0F << id*4), (i << id*4)); 141 + } 142 + } 143 + 144 + return -EINVAL; 145 + } 146 + 147 + static int da9211_get_current_limit(struct regulator_dev *rdev) 148 + { 149 + int id = rdev_get_id(rdev); 150 + struct da9211 *chip = rdev_get_drvdata(rdev); 151 + unsigned int data; 152 + int ret; 153 + 154 + ret = regmap_read(chip->regmap, DA9211_REG_BUCK_ILIM, &data); 155 + if (ret < 0) 156 + return ret; 157 + 158 + /* select one of 16 values: 0000 (2000mA) to 1111 (5000mA) */ 159 + data = (data >> id*4) & 0x0F; 160 + return da9211_current_limits[data]; 161 + } 162 + 163 + static struct regulator_ops da9211_buck_ops = { 164 + .get_mode = da9211_buck_get_mode, 165 + .set_mode = da9211_buck_set_mode, 166 + .enable = regulator_enable_regmap, 167 + .disable = regulator_disable_regmap, 168 + .is_enabled = regulator_is_enabled_regmap, 169 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 170 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 171 + .list_voltage = regulator_list_voltage_linear, 172 + .set_current_limit = da9211_set_current_limit, 173 + .get_current_limit = da9211_get_current_limit, 174 + }; 175 + 176 + #define DA9211_BUCK(_id) \ 177 + {\ 178 + .name = #_id,\ 179 + .ops = &da9211_buck_ops,\ 180 + .type = REGULATOR_VOLTAGE,\ 181 + .id = DA9211_ID_##_id,\ 182 + .n_voltages = (DA9211_MAX_MV - DA9211_MIN_MV) / DA9211_STEP_MV + 1,\ 183 + .min_uV = (DA9211_MIN_MV * 1000),\ 184 + .uV_step = (DA9211_STEP_MV * 1000),\ 185 + .enable_reg = DA9211_REG_BUCKA_CONT + DA9211_ID_##_id,\ 186 + .enable_mask = DA9211_BUCKA_EN,\ 187 + .vsel_reg = DA9211_REG_VBUCKA_A + DA9211_ID_##_id * 2,\ 188 + .vsel_mask = DA9211_VBUCK_MASK,\ 189 + .owner = THIS_MODULE,\ 190 + } 191 + 192 + static struct regulator_desc da9211_regulators[] = { 193 + DA9211_BUCK(BUCKA), 194 + DA9211_BUCK(BUCKB), 195 + }; 196 + 197 + static irqreturn_t da9211_irq_handler(int irq, void *data) 198 + { 199 + struct da9211 *chip = data; 200 + int reg_val, err, ret = IRQ_NONE; 201 + 202 + err = regmap_read(chip->regmap, DA9211_REG_EVENT_B, &reg_val); 203 + if (err < 0) 204 + goto error_i2c; 205 + 206 + if (reg_val & DA9211_E_OV_CURR_A) { 207 + regulator_notifier_call_chain(chip->rdev[0], 208 + REGULATOR_EVENT_OVER_CURRENT, 209 + rdev_get_drvdata(chip->rdev[0])); 210 + 211 + err = regmap_write(chip->regmap, DA9211_REG_EVENT_B, 212 + DA9211_E_OV_CURR_A); 213 + if (err < 0) 214 + goto error_i2c; 215 + 216 + ret = IRQ_HANDLED; 217 + } 218 + 219 + if (reg_val & DA9211_E_OV_CURR_B) { 220 + regulator_notifier_call_chain(chip->rdev[1], 221 + REGULATOR_EVENT_OVER_CURRENT, 222 + rdev_get_drvdata(chip->rdev[1])); 223 + 224 + err = regmap_write(chip->regmap, DA9211_REG_EVENT_B, 225 + DA9211_E_OV_CURR_B); 226 + if (err < 0) 227 + goto error_i2c; 228 + 229 + ret = IRQ_HANDLED; 230 + } 231 + 232 + return ret; 233 + 234 + error_i2c: 235 + dev_err(chip->dev, "I2C error : %d\n", err); 236 + return IRQ_NONE; 237 + } 238 + 239 + static int da9211_regulator_init(struct da9211 *chip) 240 + { 241 + struct regulator_config config = { }; 242 + int i, ret; 243 + unsigned int data; 244 + 245 + ret = regmap_read(chip->regmap, DA9211_REG_CONFIG_E, &data); 246 + if (ret < 0) { 247 + dev_err(chip->dev, "Failed to read CONTROL_E reg: %d\n", ret); 248 + return ret; 249 + } 250 + 251 + data &= DA9211_SLAVE_SEL; 252 + /* If configuration for 1/2 bucks is different between platform data 253 + * and the register, driver should exit. 254 + */ 255 + if ((chip->pdata->num_buck == 2 && data == 0x40) 256 + || (chip->pdata->num_buck == 1 && data == 0x00)) { 257 + if (data == 0) 258 + chip->num_regulator = 1; 259 + else 260 + chip->num_regulator = 2; 261 + } else { 262 + dev_err(chip->dev, "Configuration is mismatched\n"); 263 + return -EINVAL; 264 + } 265 + 266 + for (i = 0; i < chip->num_regulator; i++) { 267 + if (chip->pdata) 268 + config.init_data = 269 + &(chip->pdata->init_data[i]); 270 + 271 + config.dev = chip->dev; 272 + config.driver_data = chip; 273 + config.regmap = chip->regmap; 274 + 275 + chip->rdev[i] = devm_regulator_register(chip->dev, 276 + &da9211_regulators[i], &config); 277 + if (IS_ERR(chip->rdev[i])) { 278 + dev_err(chip->dev, 279 + "Failed to register DA9211 regulator\n"); 280 + return PTR_ERR(chip->rdev[i]); 281 + } 282 + 283 + if (chip->chip_irq != 0) { 284 + ret = regmap_update_bits(chip->regmap, 285 + DA9211_REG_MASK_B, DA9211_M_OV_CURR_A << i, 1); 286 + if (ret < 0) { 287 + dev_err(chip->dev, 288 + "Failed to update mask reg: %d\n", ret); 289 + return ret; 290 + } 291 + } 292 + } 293 + 294 + return 0; 295 + } 296 + /* 297 + * I2C driver interface functions 298 + */ 299 + static int da9211_i2c_probe(struct i2c_client *i2c, 300 + const struct i2c_device_id *id) 301 + { 302 + struct da9211 *chip; 303 + int error, ret; 304 + 305 + chip = devm_kzalloc(&i2c->dev, sizeof(struct da9211), GFP_KERNEL); 306 + 307 + chip->dev = &i2c->dev; 308 + chip->regmap = devm_regmap_init_i2c(i2c, &da9211_regmap_config); 309 + if (IS_ERR(chip->regmap)) { 310 + error = PTR_ERR(chip->regmap); 311 + dev_err(&i2c->dev, "Failed to allocate register map: %d\n", 312 + error); 313 + return error; 314 + } 315 + 316 + i2c_set_clientdata(i2c, chip); 317 + 318 + chip->pdata = i2c->dev.platform_data; 319 + if (!chip->pdata) { 320 + dev_err(&i2c->dev, "No platform init data supplied\n"); 321 + return -ENODEV; 322 + } 323 + 324 + chip->chip_irq = i2c->irq; 325 + 326 + if (chip->chip_irq != 0) { 327 + ret = devm_request_threaded_irq(chip->dev, chip->chip_irq, NULL, 328 + da9211_irq_handler, 329 + IRQF_TRIGGER_LOW|IRQF_ONESHOT, 330 + "da9211", chip); 331 + if (ret != 0) { 332 + dev_err(chip->dev, "Failed to request IRQ: %d\n", 333 + chip->chip_irq); 334 + return ret; 335 + } 336 + } else { 337 + dev_warn(chip->dev, "No IRQ configured\n"); 338 + } 339 + 340 + ret = da9211_regulator_init(chip); 341 + 342 + if (ret < 0) 343 + dev_err(&i2c->dev, "Failed to initialize regulator: %d\n", ret); 344 + 345 + return ret; 346 + } 347 + 348 + static const struct i2c_device_id da9211_i2c_id[] = { 349 + {"da9211", 0}, 350 + {}, 351 + }; 352 + 353 + MODULE_DEVICE_TABLE(i2c, da9211_i2c_id); 354 + 355 + static struct i2c_driver da9211_regulator_driver = { 356 + .driver = { 357 + .name = "da9211", 358 + .owner = THIS_MODULE, 359 + }, 360 + .probe = da9211_i2c_probe, 361 + .id_table = da9211_i2c_id, 362 + }; 363 + 364 + module_i2c_driver(da9211_regulator_driver); 365 + 366 + MODULE_AUTHOR("James Ban <James.Ban.opensource@diasemi.com>"); 367 + MODULE_DESCRIPTION("Regulator device driver for Dialog DA9211"); 368 + MODULE_LICENSE("GPL v2");
+271
drivers/regulator/da9211-regulator.h
··· 1 + /* 2 + * da9211-regulator.h - Regulator definitions for DA9211 3 + * Copyright (C) 2014 Dialog Semiconductor Ltd. 4 + * 5 + * This library is free software; you can redistribute it and/or 6 + * modify it under the terms of the GNU Library General Public 7 + * License as published by the Free Software Foundation; either 8 + * version 2 of the License, or (at your option) any later version. 9 + * 10 + * This library is distributed in the hope that it will be useful, 11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 + * Library General Public License for more details. 14 + */ 15 + 16 + #ifndef __DA9211_REGISTERS_H__ 17 + #define __DA9211_REGISTERS_H__ 18 + 19 + /* Page selection */ 20 + #define DA9211_REG_PAGE_CON 0x00 21 + 22 + /* System Control and Event Registers */ 23 + #define DA9211_REG_STATUS_A 0x50 24 + #define DA9211_REG_STATUS_B 0x51 25 + #define DA9211_REG_EVENT_A 0x52 26 + #define DA9211_REG_EVENT_B 0x53 27 + #define DA9211_REG_MASK_A 0x54 28 + #define DA9211_REG_MASK_B 0x55 29 + #define DA9211_REG_CONTROL_A 0x56 30 + 31 + /* GPIO Control Registers */ 32 + #define DA9211_REG_GPIO_0_1 0x58 33 + #define DA9211_REG_GPIO_2_3 0x59 34 + #define DA9211_REG_GPIO_4 0x5A 35 + 36 + /* Regulator Registers */ 37 + #define DA9211_REG_BUCKA_CONT 0x5D 38 + #define DA9211_REG_BUCKB_CONT 0x5E 39 + #define DA9211_REG_BUCK_ILIM 0xD0 40 + #define DA9211_REG_BUCKA_CONF 0xD1 41 + #define DA9211_REG_BUCKB_CONF 0xD2 42 + #define DA9211_REG_BUCK_CONF 0xD3 43 + #define DA9211_REG_VBACKA_MAX 0xD5 44 + #define DA9211_REG_VBACKB_MAX 0xD6 45 + #define DA9211_REG_VBUCKA_A 0xD7 46 + #define DA9211_REG_VBUCKA_B 0xD8 47 + #define DA9211_REG_VBUCKB_A 0xD9 48 + #define DA9211_REG_VBUCKB_B 0xDA 49 + 50 + /* I2C Interface Settings */ 51 + #define DA9211_REG_INTERFACE 0x105 52 + 53 + /* BUCK Phase Selection*/ 54 + #define DA9211_REG_CONFIG_E 0x147 55 + 56 + /* 57 + * Registers bits 58 + */ 59 + /* DA9211_REG_PAGE_CON (addr=0x00) */ 60 + #define DA9211_REG_PAGE_SHIFT 1 61 + #define DA9211_REG_PAGE_MASK 0x02 62 + /* On I2C registers 0x00 - 0xFF */ 63 + #define DA9211_REG_PAGE0 0 64 + /* On I2C registers 0x100 - 0x1FF */ 65 + #define DA9211_REG_PAGE2 2 66 + #define DA9211_PAGE_WRITE_MODE 0x00 67 + #define DA9211_REPEAT_WRITE_MODE 0x40 68 + #define DA9211_PAGE_REVERT 0x80 69 + 70 + /* DA9211_REG_STATUS_A (addr=0x50) */ 71 + #define DA9211_GPI0 0x01 72 + #define DA9211_GPI1 0x02 73 + #define DA9211_GPI2 0x04 74 + #define DA9211_GPI3 0x08 75 + #define DA9211_GPI4 0x10 76 + 77 + /* DA9211_REG_EVENT_A (addr=0x52) */ 78 + #define DA9211_E_GPI0 0x01 79 + #define DA9211_E_GPI1 0x02 80 + #define DA9211_E_GPI2 0x04 81 + #define DA9211_E_GPI3 0x08 82 + #define DA9211_E_GPI4 0x10 83 + #define DA9211_E_UVLO_IO 0x40 84 + 85 + /* DA9211_REG_EVENT_B (addr=0x53) */ 86 + #define DA9211_E_PWRGOOD_A 0x01 87 + #define DA9211_E_PWRGOOD_B 0x02 88 + #define DA9211_E_TEMP_WARN 0x04 89 + #define DA9211_E_TEMP_CRIT 0x08 90 + #define DA9211_E_OV_CURR_A 0x10 91 + #define DA9211_E_OV_CURR_B 0x20 92 + 93 + /* DA9211_REG_MASK_A (addr=0x54) */ 94 + #define DA9211_M_GPI0 0x01 95 + #define DA9211_M_GPI1 0x02 96 + #define DA9211_M_GPI2 0x04 97 + #define DA9211_M_GPI3 0x08 98 + #define DA9211_M_GPI4 0x10 99 + #define DA9211_M_UVLO_IO 0x40 100 + 101 + /* DA9211_REG_MASK_B (addr=0x55) */ 102 + #define DA9211_M_PWRGOOD_A 0x01 103 + #define DA9211_M_PWRGOOD_B 0x02 104 + #define DA9211_M_TEMP_WARN 0x04 105 + #define DA9211_M_TEMP_CRIT 0x08 106 + #define DA9211_M_OV_CURR_A 0x10 107 + #define DA9211_M_OV_CURR_B 0x20 108 + 109 + /* DA9211_REG_CONTROL_A (addr=0x56) */ 110 + #define DA9211_DEBOUNCING_SHIFT 0 111 + #define DA9211_DEBOUNCING_MASK 0x07 112 + #define DA9211_SLEW_RATE_SHIFT 3 113 + #define DA9211_SLEW_RATE_A_MASK 0x18 114 + #define DA9211_SLEW_RATE_B_SHIFT 5 115 + #define DA9211_SLEW_RATE_B_MASK 0x60 116 + #define DA9211_V_LOCK 0x80 117 + 118 + /* DA9211_REG_GPIO_0_1 (addr=0x58) */ 119 + #define DA9211_GPIO0_PIN_SHIFT 0 120 + #define DA9211_GPIO0_PIN_MASK 0x03 121 + #define DA9211_GPIO0_PIN_GPI 0x00 122 + #define DA9211_GPIO0_PIN_GPO_OD 0x02 123 + #define DA9211_GPIO0_PIN_GPO 0x03 124 + #define DA9211_GPIO0_TYPE 0x04 125 + #define DA9211_GPIO0_TYPE_GPI 0x00 126 + #define DA9211_GPIO0_TYPE_GPO 0x04 127 + #define DA9211_GPIO0_MODE 0x08 128 + #define DA9211_GPIO1_PIN_SHIFT 4 129 + #define DA9211_GPIO1_PIN_MASK 0x30 130 + #define DA9211_GPIO1_PIN_GPI 0x00 131 + #define DA9211_GPIO1_PIN_VERROR 0x10 132 + #define DA9211_GPIO1_PIN_GPO_OD 0x20 133 + #define DA9211_GPIO1_PIN_GPO 0x30 134 + #define DA9211_GPIO1_TYPE_SHIFT 0x40 135 + #define DA9211_GPIO1_TYPE_GPI 0x00 136 + #define DA9211_GPIO1_TYPE_GPO 0x40 137 + #define DA9211_GPIO1_MODE 0x80 138 + 139 + /* DA9211_REG_GPIO_2_3 (addr=0x59) */ 140 + #define DA9211_GPIO2_PIN_SHIFT 0 141 + #define DA9211_GPIO2_PIN_MASK 0x03 142 + #define DA9211_GPIO2_PIN_GPI 0x00 143 + #define DA9211_GPIO5_PIN_BUCK_CLK 0x10 144 + #define DA9211_GPIO2_PIN_GPO_OD 0x02 145 + #define DA9211_GPIO2_PIN_GPO 0x03 146 + #define DA9211_GPIO2_TYPE 0x04 147 + #define DA9211_GPIO2_TYPE_GPI 0x00 148 + #define DA9211_GPIO2_TYPE_GPO 0x04 149 + #define DA9211_GPIO2_MODE 0x08 150 + #define DA9211_GPIO3_PIN_SHIFT 4 151 + #define DA9211_GPIO3_PIN_MASK 0x30 152 + #define DA9211_GPIO3_PIN_GPI 0x00 153 + #define DA9211_GPIO3_PIN_IERROR 0x10 154 + #define DA9211_GPIO3_PIN_GPO_OD 0x20 155 + #define DA9211_GPIO3_PIN_GPO 0x30 156 + #define DA9211_GPIO3_TYPE_SHIFT 0x40 157 + #define DA9211_GPIO3_TYPE_GPI 0x00 158 + #define DA9211_GPIO3_TYPE_GPO 0x40 159 + #define DA9211_GPIO3_MODE 0x80 160 + 161 + /* DA9211_REG_GPIO_4 (addr=0x5A) */ 162 + #define DA9211_GPIO4_PIN_SHIFT 0 163 + #define DA9211_GPIO4_PIN_MASK 0x03 164 + #define DA9211_GPIO4_PIN_GPI 0x00 165 + #define DA9211_GPIO4_PIN_GPO_OD 0x02 166 + #define DA9211_GPIO4_PIN_GPO 0x03 167 + #define DA9211_GPIO4_TYPE 0x04 168 + #define DA9211_GPIO4_TYPE_GPI 0x00 169 + #define DA9211_GPIO4_TYPE_GPO 0x04 170 + #define DA9211_GPIO4_MODE 0x08 171 + 172 + /* DA9211_REG_BUCKA_CONT (addr=0x5D) */ 173 + #define DA9211_BUCKA_EN 0x01 174 + #define DA9211_BUCKA_GPI_SHIFT 1 175 + #define DA9211_BUCKA_GPI_MASK 0x06 176 + #define DA9211_BUCKA_GPI_OFF 0x00 177 + #define DA9211_BUCKA_GPI_GPIO0 0x02 178 + #define DA9211_BUCKA_GPI_GPIO1 0x04 179 + #define DA9211_BUCKA_GPI_GPIO3 0x06 180 + #define DA9211_BUCKA_PD_DIS 0x08 181 + #define DA9211_VBUCKA_SEL 0x10 182 + #define DA9211_VBUCKA_SEL_A 0x00 183 + #define DA9211_VBUCKA_SEL_B 0x10 184 + #define DA9211_VBUCKA_GPI_SHIFT 5 185 + #define DA9211_VBUCKA_GPI_MASK 0x60 186 + #define DA9211_VBUCKA_GPI_OFF 0x00 187 + #define DA9211_VBUCKA_GPI_GPIO1 0x20 188 + #define DA9211_VBUCKA_GPI_GPIO2 0x40 189 + #define DA9211_VBUCKA_GPI_GPIO4 0x60 190 + 191 + /* DA9211_REG_BUCKB_CONT (addr=0x5E) */ 192 + #define DA9211_BUCKB_EN 0x01 193 + #define DA9211_BUCKB_GPI_SHIFT 1 194 + #define DA9211_BUCKB_GPI_MASK 0x06 195 + #define DA9211_BUCKB_GPI_OFF 0x00 196 + #define DA9211_BUCKB_GPI_GPIO0 0x02 197 + #define DA9211_BUCKB_GPI_GPIO1 0x04 198 + #define DA9211_BUCKB_GPI_GPIO3 0x06 199 + #define DA9211_BUCKB_PD_DIS 0x08 200 + #define DA9211_VBUCKB_SEL 0x10 201 + #define DA9211_VBUCKB_SEL_A 0x00 202 + #define DA9211_VBUCKB_SEL_B 0x10 203 + #define DA9211_VBUCKB_GPI_SHIFT 5 204 + #define DA9211_VBUCKB_GPI_MASK 0x60 205 + #define DA9211_VBUCKB_GPI_OFF 0x00 206 + #define DA9211_VBUCKB_GPI_GPIO1 0x20 207 + #define DA9211_VBUCKB_GPI_GPIO2 0x40 208 + #define DA9211_VBUCKB_GPI_GPIO4 0x60 209 + 210 + /* DA9211_REG_BUCK_ILIM (addr=0xD0) */ 211 + #define DA9211_BUCKA_ILIM_SHIFT 0 212 + #define DA9211_BUCKA_ILIM_MASK 0x0F 213 + #define DA9211_BUCKB_ILIM_SHIFT 4 214 + #define DA9211_BUCKB_ILIM_MASK 0xF0 215 + 216 + /* DA9211_REG_BUCKA_CONF (addr=0xD1) */ 217 + #define DA9211_BUCKA_MODE_SHIFT 0 218 + #define DA9211_BUCKA_MODE_MASK 0x03 219 + #define DA9211_BUCKA_MODE_MANUAL 0x00 220 + #define DA9211_BUCKA_MODE_SLEEP 0x01 221 + #define DA9211_BUCKA_MODE_SYNC 0x02 222 + #define DA9211_BUCKA_MODE_AUTO 0x03 223 + #define DA9211_BUCKA_UP_CTRL_SHIFT 2 224 + #define DA9211_BUCKA_UP_CTRL_MASK 0x1C 225 + #define DA9211_BUCKA_DOWN_CTRL_SHIFT 5 226 + #define DA9211_BUCKA_DOWN_CTRL_MASK 0xE0 227 + 228 + /* DA9211_REG_BUCKB_CONF (addr=0xD2) */ 229 + #define DA9211_BUCKB_MODE_SHIFT 0 230 + #define DA9211_BUCKB_MODE_MASK 0x03 231 + #define DA9211_BUCKB_MODE_MANUAL 0x00 232 + #define DA9211_BUCKB_MODE_SLEEP 0x01 233 + #define DA9211_BUCKB_MODE_SYNC 0x02 234 + #define DA9211_BUCKB_MODE_AUTO 0x03 235 + #define DA9211_BUCKB_UP_CTRL_SHIFT 2 236 + #define DA9211_BUCKB_UP_CTRL_MASK 0x1C 237 + #define DA9211_BUCKB_DOWN_CTRL_SHIFT 5 238 + #define DA9211_BUCKB_DOWN_CTRL_MASK 0xE0 239 + 240 + /* DA9211_REG_BUCK_CONF (addr=0xD3) */ 241 + #define DA9211_PHASE_SEL_A_SHIFT 0 242 + #define DA9211_PHASE_SEL_A_MASK 0x03 243 + #define DA9211_PHASE_SEL_B_SHIFT 2 244 + #define DA9211_PHASE_SEL_B_MASK 0x04 245 + #define DA9211_PH_SH_EN_A_SHIFT 3 246 + #define DA9211_PH_SH_EN_A_MASK 0x08 247 + #define DA9211_PH_SH_EN_B_SHIFT 4 248 + #define DA9211_PH_SH_EN_B_MASK 0x10 249 + 250 + /* DA9211_REG_VBUCKA_MAX (addr=0xD5) */ 251 + #define DA9211_VBUCKA_BASE_SHIFT 0 252 + #define DA9211_VBUCKA_BASE_MASK 0x7F 253 + 254 + /* DA9211_REG_VBUCKB_MAX (addr=0xD6) */ 255 + #define DA9211_VBUCKB_BASE_SHIFT 0 256 + #define DA9211_VBUCKB_BASE_MASK 0x7F 257 + 258 + /* DA9211_REG_VBUCKA/B_A/B (addr=0xD7/0xD8/0xD9/0xDA) */ 259 + #define DA9211_VBUCK_SHIFT 0 260 + #define DA9211_VBUCK_MASK 0x7F 261 + #define DA9211_VBUCK_BIAS 0 262 + #define DA9211_BUCK_SL 0x80 263 + 264 + /* DA9211_REG_INTERFACE (addr=0x105) */ 265 + #define DA9211_IF_BASE_ADDR_SHIFT 4 266 + #define DA9211_IF_BASE_ADDR_MASK 0xF0 267 + 268 + /* DA9211_REG_CONFIG_E (addr=0x147) */ 269 + #define DA9211_SLAVE_SEL 0x40 270 + 271 + #endif /* __DA9211_REGISTERS_H__ */
-9
drivers/regulator/lp872x.c
··· 845 845 struct device_node *np = dev->of_node; 846 846 struct lp872x_platform_data *pdata; 847 847 struct of_regulator_match *match; 848 - struct regulator_init_data *d; 849 848 int num_matches; 850 849 int count; 851 850 int i; ··· 891 892 pdata->regulator_data[i].id = 892 893 (enum lp872x_regulator_id)match[i].driver_data; 893 894 pdata->regulator_data[i].init_data = match[i].init_data; 894 - 895 - /* Operation mode configuration for buck/buck1/buck2 */ 896 - if (strncmp(match[i].name, "buck", 4)) 897 - continue; 898 - 899 - d = pdata->regulator_data[i].init_data; 900 - d->constraints.valid_modes_mask |= LP872X_VALID_OPMODE; 901 - d->constraints.valid_ops_mask |= REGULATOR_CHANGE_MODE; 902 895 } 903 896 out: 904 897 return pdata;
+6 -17
drivers/regulator/lp8755.c
··· 339 339 rconfig.init_data = pdata->buck_data[buck_num]; 340 340 rconfig.of_node = pchip->dev->of_node; 341 341 pchip->rdev[buck_num] = 342 - regulator_register(&lp8755_regulators[buck_num], &rconfig); 342 + devm_regulator_register(pchip->dev, 343 + &lp8755_regulators[buck_num], &rconfig); 343 344 if (IS_ERR(pchip->rdev[buck_num])) { 344 345 ret = PTR_ERR(pchip->rdev[buck_num]); 345 346 pchip->rdev[buck_num] = NULL; 346 347 dev_err(pchip->dev, "regulator init failed: buck %d\n", 347 348 buck_num); 348 - goto err_buck; 349 + return ret; 349 350 } 350 351 } 351 352 352 353 return 0; 353 - 354 - err_buck: 355 - for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) 356 - regulator_unregister(pchip->rdev[icnt]); 357 - return ret; 358 354 } 359 355 360 356 static irqreturn_t lp8755_irq_handler(int irq, void *data) ··· 486 490 ret = lp8755_regulator_init(pchip); 487 491 if (ret < 0) { 488 492 dev_err(&client->dev, "fail to initialize regulators\n"); 489 - goto err_regulator; 493 + goto err; 490 494 } 491 495 492 496 pchip->irq = client->irq; 493 497 ret = lp8755_int_config(pchip); 494 498 if (ret < 0) { 495 499 dev_err(&client->dev, "fail to irq config\n"); 496 - goto err_irq; 500 + goto err; 497 501 } 498 502 499 503 return ret; 500 504 501 - err_irq: 502 - for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++) 503 - regulator_unregister(pchip->rdev[icnt]); 504 - 505 - err_regulator: 505 + err: 506 506 /* output disable */ 507 507 for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) 508 508 lp8755_write(pchip, icnt, 0x00); ··· 510 518 { 511 519 int icnt; 512 520 struct lp8755_chip *pchip = i2c_get_clientdata(client); 513 - 514 - for (icnt = 0; icnt < mphase_buck[pchip->mphase].nreg; icnt++) 515 - regulator_unregister(pchip->rdev[icnt]); 516 521 517 522 for (icnt = 0; icnt < LP8755_BUCK_MAX; icnt++) 518 523 lp8755_write(pchip, icnt, 0x00);
+1 -1
drivers/regulator/ltc3589.c
··· 377 377 return false; 378 378 } 379 379 380 - struct reg_default ltc3589_reg_defaults[] = { 380 + static struct reg_default ltc3589_reg_defaults[] = { 381 381 { LTC3589_SCR1, 0x00 }, 382 382 { LTC3589_OVEN, 0x00 }, 383 383 { LTC3589_SCR2, 0x00 },
+10 -24
drivers/regulator/max8952.c
··· 229 229 config.ena_gpio_flags |= GPIOF_OUT_INIT_HIGH; 230 230 231 231 rdev = devm_regulator_register(&client->dev, &regulator, &config); 232 - 233 232 if (IS_ERR(rdev)) { 234 233 ret = PTR_ERR(rdev); 235 234 dev_err(&client->dev, "regulator init failed (%d)\n", ret); ··· 240 241 241 242 if (gpio_is_valid(pdata->gpio_vid0) && 242 243 gpio_is_valid(pdata->gpio_vid1)) { 243 - if (!gpio_request(pdata->gpio_vid0, "MAX8952 VID0")) 244 - gpio_direction_output(pdata->gpio_vid0, 245 - (pdata->default_mode) & 0x1); 246 - else 244 + unsigned long gpio_flags; 245 + 246 + gpio_flags = max8952->vid0 ? 247 + GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; 248 + if (devm_gpio_request_one(&client->dev, pdata->gpio_vid0, 249 + gpio_flags, "MAX8952 VID0")) 247 250 err = 1; 248 251 249 - if (!gpio_request(pdata->gpio_vid1, "MAX8952 VID1")) 250 - gpio_direction_output(pdata->gpio_vid1, 251 - (pdata->default_mode >> 1) & 0x1); 252 - else { 253 - if (!err) 254 - gpio_free(pdata->gpio_vid0); 252 + gpio_flags = max8952->vid1 ? 253 + GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; 254 + if (devm_gpio_request_one(&client->dev, pdata->gpio_vid1, 255 + gpio_flags, "MAX8952 VID1")) 255 256 err = 2; 256 - } 257 - 258 257 } else 259 258 err = 3; 260 259 ··· 311 314 return 0; 312 315 } 313 316 314 - static int max8952_pmic_remove(struct i2c_client *client) 315 - { 316 - struct max8952_data *max8952 = i2c_get_clientdata(client); 317 - struct max8952_platform_data *pdata = max8952->pdata; 318 - 319 - gpio_free(pdata->gpio_vid0); 320 - gpio_free(pdata->gpio_vid1); 321 - return 0; 322 - } 323 - 324 317 static const struct i2c_device_id max8952_ids[] = { 325 318 { "max8952", 0 }, 326 319 { }, ··· 319 332 320 333 static struct i2c_driver max8952_pmic_driver = { 321 334 .probe = max8952_pmic_probe, 322 - .remove = max8952_pmic_remove, 323 335 .driver = { 324 336 .name = "max8952", 325 337 .of_match_table = of_match_ptr(max8952_dt_match),
+8 -29
drivers/regulator/mc13xxx-regulator-core.c
··· 33 33 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); 34 34 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; 35 35 int id = rdev_get_id(rdev); 36 - int ret; 37 36 38 37 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); 39 38 40 - mc13xxx_lock(priv->mc13xxx); 41 - ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg, 42 - mc13xxx_regulators[id].enable_bit, 43 - mc13xxx_regulators[id].enable_bit); 44 - mc13xxx_unlock(priv->mc13xxx); 45 - 46 - return ret; 39 + return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg, 40 + mc13xxx_regulators[id].enable_bit, 41 + mc13xxx_regulators[id].enable_bit); 47 42 } 48 43 49 44 static int mc13xxx_regulator_disable(struct regulator_dev *rdev) ··· 46 51 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); 47 52 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; 48 53 int id = rdev_get_id(rdev); 49 - int ret; 50 54 51 55 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); 52 56 53 - mc13xxx_lock(priv->mc13xxx); 54 - ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg, 55 - mc13xxx_regulators[id].enable_bit, 0); 56 - mc13xxx_unlock(priv->mc13xxx); 57 - 58 - return ret; 57 + return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].reg, 58 + mc13xxx_regulators[id].enable_bit, 0); 59 59 } 60 60 61 61 static int mc13xxx_regulator_is_enabled(struct regulator_dev *rdev) ··· 60 70 int ret, id = rdev_get_id(rdev); 61 71 unsigned int val; 62 72 63 - mc13xxx_lock(priv->mc13xxx); 64 73 ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val); 65 - mc13xxx_unlock(priv->mc13xxx); 66 - 67 74 if (ret) 68 75 return ret; 69 76 ··· 73 86 struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); 74 87 struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; 75 88 int id = rdev_get_id(rdev); 76 - int ret; 77 89 78 - mc13xxx_lock(priv->mc13xxx); 79 - ret = mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].vsel_reg, 80 - mc13xxx_regulators[id].vsel_mask, 81 - selector << mc13xxx_regulators[id].vsel_shift); 82 - mc13xxx_unlock(priv->mc13xxx); 83 - 84 - return ret; 90 + return mc13xxx_reg_rmw(priv->mc13xxx, mc13xxx_regulators[id].vsel_reg, 91 + mc13xxx_regulators[id].vsel_mask, 92 + selector << mc13xxx_regulators[id].vsel_shift); 85 93 } 86 94 87 95 static int mc13xxx_regulator_get_voltage(struct regulator_dev *rdev) ··· 88 106 89 107 dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); 90 108 91 - mc13xxx_lock(priv->mc13xxx); 92 109 ret = mc13xxx_reg_read(priv->mc13xxx, 93 110 mc13xxx_regulators[id].vsel_reg, &val); 94 - mc13xxx_unlock(priv->mc13xxx); 95 - 96 111 if (ret) 97 112 return ret; 98 113
-1
drivers/regulator/mc13xxx.h
··· 21 21 int vsel_reg; 22 22 int vsel_shift; 23 23 int vsel_mask; 24 - int hi_bit; 25 24 }; 26 25 27 26 struct mc13xxx_regulator_priv {
+826 -338
drivers/regulator/palmas-regulator.c
··· 27 27 #include <linux/of_platform.h> 28 28 #include <linux/regulator/of_regulator.h> 29 29 30 - struct regs_info { 31 - char *name; 32 - char *sname; 33 - u8 vsel_addr; 34 - u8 ctrl_addr; 35 - u8 tstep_addr; 36 - int sleep_id; 37 - }; 38 - 39 30 static const struct regulator_linear_range smps_low_ranges[] = { 40 31 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0), 41 32 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0), ··· 41 50 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0), 42 51 }; 43 52 44 - static const struct regs_info palmas_regs_info[] = { 53 + static struct palmas_regs_info palmas_generic_regs_info[] = { 45 54 { 46 55 .name = "SMPS12", 47 56 .sname = "smps1-in", ··· 227 236 }, 228 237 }; 229 238 239 + static struct palmas_regs_info tps65917_regs_info[] = { 240 + { 241 + .name = "SMPS1", 242 + .sname = "smps1-in", 243 + .vsel_addr = TPS65917_SMPS1_VOLTAGE, 244 + .ctrl_addr = TPS65917_SMPS1_CTRL, 245 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1, 246 + }, 247 + { 248 + .name = "SMPS2", 249 + .sname = "smps2-in", 250 + .vsel_addr = TPS65917_SMPS2_VOLTAGE, 251 + .ctrl_addr = TPS65917_SMPS2_CTRL, 252 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2, 253 + }, 254 + { 255 + .name = "SMPS3", 256 + .sname = "smps3-in", 257 + .vsel_addr = TPS65917_SMPS3_VOLTAGE, 258 + .ctrl_addr = TPS65917_SMPS3_CTRL, 259 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3, 260 + }, 261 + { 262 + .name = "SMPS4", 263 + .sname = "smps4-in", 264 + .vsel_addr = TPS65917_SMPS4_VOLTAGE, 265 + .ctrl_addr = TPS65917_SMPS4_CTRL, 266 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4, 267 + }, 268 + { 269 + .name = "SMPS5", 270 + .sname = "smps5-in", 271 + .vsel_addr = TPS65917_SMPS5_VOLTAGE, 272 + .ctrl_addr = TPS65917_SMPS5_CTRL, 273 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5, 274 + }, 275 + { 276 + .name = "LDO1", 277 + .sname = "ldo1-in", 278 + .vsel_addr = TPS65917_LDO1_VOLTAGE, 279 + .ctrl_addr = TPS65917_LDO1_CTRL, 280 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1, 281 + }, 282 + { 283 + .name = "LDO2", 284 + .sname = "ldo2-in", 285 + .vsel_addr = TPS65917_LDO2_VOLTAGE, 286 + .ctrl_addr = TPS65917_LDO2_CTRL, 287 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2, 288 + }, 289 + { 290 + .name = "LDO3", 291 + .sname = "ldo3-in", 292 + .vsel_addr = TPS65917_LDO3_VOLTAGE, 293 + .ctrl_addr = TPS65917_LDO3_CTRL, 294 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3, 295 + }, 296 + { 297 + .name = "LDO4", 298 + .sname = "ldo4-in", 299 + .vsel_addr = TPS65917_LDO4_VOLTAGE, 300 + .ctrl_addr = TPS65917_LDO4_CTRL, 301 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4, 302 + }, 303 + { 304 + .name = "LDO5", 305 + .sname = "ldo5-in", 306 + .vsel_addr = TPS65917_LDO5_VOLTAGE, 307 + .ctrl_addr = TPS65917_LDO5_CTRL, 308 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5, 309 + }, 310 + { 311 + .name = "REGEN1", 312 + .ctrl_addr = TPS65917_REGEN1_CTRL, 313 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1, 314 + }, 315 + { 316 + .name = "REGEN2", 317 + .ctrl_addr = TPS65917_REGEN2_CTRL, 318 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2, 319 + }, 320 + { 321 + .name = "REGEN3", 322 + .ctrl_addr = TPS65917_REGEN3_CTRL, 323 + .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3, 324 + }, 325 + }; 326 + 327 + #define EXTERNAL_REQUESTOR(_id, _offset, _pos) \ 328 + [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \ 329 + .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \ 330 + .reg_offset = _offset, \ 331 + .bit_pos = _pos, \ 332 + } 333 + 334 + static struct palmas_sleep_requestor_info palma_sleep_req_info[] = { 335 + EXTERNAL_REQUESTOR(REGEN1, 0, 0), 336 + EXTERNAL_REQUESTOR(REGEN2, 0, 1), 337 + EXTERNAL_REQUESTOR(SYSEN1, 0, 2), 338 + EXTERNAL_REQUESTOR(SYSEN2, 0, 3), 339 + EXTERNAL_REQUESTOR(CLK32KG, 0, 4), 340 + EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5), 341 + EXTERNAL_REQUESTOR(REGEN3, 0, 6), 342 + EXTERNAL_REQUESTOR(SMPS12, 1, 0), 343 + EXTERNAL_REQUESTOR(SMPS3, 1, 1), 344 + EXTERNAL_REQUESTOR(SMPS45, 1, 2), 345 + EXTERNAL_REQUESTOR(SMPS6, 1, 3), 346 + EXTERNAL_REQUESTOR(SMPS7, 1, 4), 347 + EXTERNAL_REQUESTOR(SMPS8, 1, 5), 348 + EXTERNAL_REQUESTOR(SMPS9, 1, 6), 349 + EXTERNAL_REQUESTOR(SMPS10, 1, 7), 350 + EXTERNAL_REQUESTOR(LDO1, 2, 0), 351 + EXTERNAL_REQUESTOR(LDO2, 2, 1), 352 + EXTERNAL_REQUESTOR(LDO3, 2, 2), 353 + EXTERNAL_REQUESTOR(LDO4, 2, 3), 354 + EXTERNAL_REQUESTOR(LDO5, 2, 4), 355 + EXTERNAL_REQUESTOR(LDO6, 2, 5), 356 + EXTERNAL_REQUESTOR(LDO7, 2, 6), 357 + EXTERNAL_REQUESTOR(LDO8, 2, 7), 358 + EXTERNAL_REQUESTOR(LDO9, 3, 0), 359 + EXTERNAL_REQUESTOR(LDOLN, 3, 1), 360 + EXTERNAL_REQUESTOR(LDOUSB, 3, 2), 361 + }; 362 + 363 + #define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \ 364 + [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \ 365 + .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \ 366 + .reg_offset = _offset, \ 367 + .bit_pos = _pos, \ 368 + } 369 + 370 + static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = { 371 + EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0), 372 + EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1), 373 + EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6), 374 + EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0), 375 + EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1), 376 + EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2), 377 + EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3), 378 + EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4), 379 + EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0), 380 + EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1), 381 + EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2), 382 + EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3), 383 + EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4), 384 + }; 385 + 230 386 static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500}; 231 387 232 388 #define SMPS_CTRL_MODE_OFF 0x00 ··· 434 296 435 297 static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode) 436 298 { 437 - struct palmas_pmic *pmic = rdev_get_drvdata(dev); 438 299 int id = rdev_get_id(dev); 300 + struct palmas_pmic *pmic = rdev_get_drvdata(dev); 301 + struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 302 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 439 303 unsigned int reg; 440 304 bool rail_enable = true; 441 305 442 - palmas_smps_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg); 306 + palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, &reg); 307 + 443 308 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 444 309 445 310 if (reg == SMPS_CTRL_MODE_OFF) ··· 464 323 465 324 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 466 325 if (rail_enable) 467 - palmas_smps_write(pmic->palmas, 468 - palmas_regs_info[id].ctrl_addr, reg); 326 + palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg); 469 327 470 328 /* Switch the enable value to ensure this is used for enable */ 471 329 pmic->desc[id].enable_val = pmic->current_reg_mode[id]; ··· 495 355 static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev, 496 356 int ramp_delay) 497 357 { 498 - struct palmas_pmic *pmic = rdev_get_drvdata(rdev); 499 358 int id = rdev_get_id(rdev); 359 + struct palmas_pmic *pmic = rdev_get_drvdata(rdev); 360 + struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 361 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 500 362 unsigned int reg = 0; 501 - unsigned int addr = palmas_regs_info[id].tstep_addr; 502 363 int ret; 503 364 504 365 /* SMPS3 and SMPS7 do not have tstep_addr setting */ ··· 518 377 else 519 378 reg = 1; 520 379 521 - ret = palmas_smps_write(pmic->palmas, addr, reg); 380 + ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg); 522 381 if (ret < 0) { 523 382 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret); 524 383 return ret; ··· 565 424 .get_bypass = regulator_get_bypass_regmap, 566 425 }; 567 426 427 + static struct regulator_ops tps65917_ops_smps = { 428 + .is_enabled = regulator_is_enabled_regmap, 429 + .enable = regulator_enable_regmap, 430 + .disable = regulator_disable_regmap, 431 + .set_mode = palmas_set_mode_smps, 432 + .get_mode = palmas_get_mode_smps, 433 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 434 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 435 + .list_voltage = regulator_list_voltage_linear_range, 436 + .map_voltage = regulator_map_voltage_linear_range, 437 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 438 + }; 439 + 440 + static struct regulator_ops tps65917_ops_ext_control_smps = { 441 + .set_mode = palmas_set_mode_smps, 442 + .get_mode = palmas_get_mode_smps, 443 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 444 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 445 + .list_voltage = regulator_list_voltage_linear_range, 446 + .map_voltage = regulator_map_voltage_linear_range, 447 + }; 448 + 568 449 static int palmas_is_enabled_ldo(struct regulator_dev *dev) 569 450 { 570 - struct palmas_pmic *pmic = rdev_get_drvdata(dev); 571 451 int id = rdev_get_id(dev); 452 + struct palmas_pmic *pmic = rdev_get_drvdata(dev); 453 + struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata; 454 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 572 455 unsigned int reg; 573 456 574 - palmas_ldo_read(pmic->palmas, palmas_regs_info[id].ctrl_addr, &reg); 457 + palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, &reg); 575 458 576 459 reg &= PALMAS_LDO1_CTRL_STATUS; 577 460 ··· 628 463 static struct regulator_ops palmas_ops_ext_control_extreg = { 629 464 }; 630 465 466 + static struct regulator_ops tps65917_ops_ldo = { 467 + .is_enabled = palmas_is_enabled_ldo, 468 + .enable = regulator_enable_regmap, 469 + .disable = regulator_disable_regmap, 470 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 471 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 472 + .list_voltage = regulator_list_voltage_linear, 473 + .map_voltage = regulator_map_voltage_linear, 474 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 475 + }; 476 + 631 477 static int palmas_regulator_config_external(struct palmas *palmas, int id, 632 478 struct palmas_reg_init *reg_init) 633 479 { 634 - int sleep_id = palmas_regs_info[id].sleep_id; 480 + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 481 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 635 482 int ret; 636 483 637 - ret = palmas_ext_control_req_config(palmas, sleep_id, 638 - reg_init->roof_floor, true); 484 + ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id, 485 + reg_init->roof_floor, true); 639 486 if (ret < 0) 640 487 dev_err(palmas->dev, 641 488 "Ext control config for regulator %d failed %d\n", ··· 665 488 struct palmas_reg_init *reg_init) 666 489 { 667 490 unsigned int reg; 668 - unsigned int addr; 669 491 int ret; 670 - 671 - addr = palmas_regs_info[id].ctrl_addr; 492 + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 493 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 494 + unsigned int addr = rinfo->ctrl_addr; 672 495 673 496 ret = palmas_smps_read(palmas, addr, &reg); 674 497 if (ret) ··· 703 526 if (ret) 704 527 return ret; 705 528 706 - if (palmas_regs_info[id].vsel_addr && reg_init->vsel) { 707 - addr = palmas_regs_info[id].vsel_addr; 529 + if (rinfo->vsel_addr && reg_init->vsel) { 708 530 709 531 reg = reg_init->vsel; 710 532 711 - ret = palmas_smps_write(palmas, addr, reg); 533 + ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg); 712 534 if (ret) 713 535 return ret; 714 536 } ··· 715 539 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) && 716 540 (id != PALMAS_REG_SMPS10_OUT2)) { 717 541 /* Enable externally controlled regulator */ 718 - addr = palmas_regs_info[id].ctrl_addr; 719 542 ret = palmas_smps_read(palmas, addr, &reg); 720 543 if (ret < 0) 721 544 return ret; ··· 736 561 unsigned int reg; 737 562 unsigned int addr; 738 563 int ret; 564 + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 565 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 739 566 740 - addr = palmas_regs_info[id].ctrl_addr; 567 + addr = rinfo->ctrl_addr; 741 568 742 569 ret = palmas_ldo_read(palmas, addr, &reg); 743 570 if (ret) ··· 761 584 762 585 if (reg_init->roof_floor) { 763 586 /* Enable externally controlled regulator */ 764 - addr = palmas_regs_info[id].ctrl_addr; 765 587 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE, 766 588 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE, 767 589 PALMAS_LDO1_CTRL_MODE_ACTIVE); ··· 781 605 unsigned int addr; 782 606 int ret; 783 607 unsigned int val = 0; 608 + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 609 + struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id]; 784 610 785 - addr = palmas_regs_info[id].ctrl_addr; 611 + addr = rinfo->ctrl_addr; 786 612 787 613 if (reg_init->mode_sleep) 788 614 val = PALMAS_REGEN1_CTRL_MODE_SLEEP; ··· 799 621 800 622 if (reg_init->roof_floor) { 801 623 /* Enable externally controlled regulator */ 802 - addr = palmas_regs_info[id].ctrl_addr; 803 624 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE, 804 625 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE, 805 626 PALMAS_REGEN1_CTRL_MODE_ACTIVE); ··· 818 641 unsigned int reg; 819 642 unsigned int addr; 820 643 int ret; 644 + struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata; 645 + struct palmas_regs_info *rinfo; 821 646 822 - addr = palmas_regs_info[PALMAS_REG_LDO8].ctrl_addr; 647 + rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8]; 648 + addr = rinfo->ctrl_addr; 823 649 824 650 ret = palmas_ldo_read(palmas, addr, &reg); 825 651 if (ret) { ··· 841 661 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two, 842 662 * and can be set from 0.45 to 1.65 V. 843 663 */ 844 - addr = palmas_regs_info[PALMAS_REG_LDO8].vsel_addr; 664 + addr = rinfo->vsel_addr; 845 665 ret = palmas_ldo_read(palmas, addr, &reg); 846 666 if (ret) { 847 667 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n"); ··· 856 676 return; 857 677 } 858 678 859 - static struct of_regulator_match palmas_matches[] = { 860 - { .name = "smps12", }, 861 - { .name = "smps123", }, 862 - { .name = "smps3", }, 863 - { .name = "smps45", }, 864 - { .name = "smps457", }, 865 - { .name = "smps6", }, 866 - { .name = "smps7", }, 867 - { .name = "smps8", }, 868 - { .name = "smps9", }, 869 - { .name = "smps10_out2", }, 870 - { .name = "smps10_out1", }, 871 - { .name = "ldo1", }, 872 - { .name = "ldo2", }, 873 - { .name = "ldo3", }, 874 - { .name = "ldo4", }, 875 - { .name = "ldo5", }, 876 - { .name = "ldo6", }, 877 - { .name = "ldo7", }, 878 - { .name = "ldo8", }, 879 - { .name = "ldo9", }, 880 - { .name = "ldoln", }, 881 - { .name = "ldousb", }, 882 - { .name = "regen1", }, 883 - { .name = "regen2", }, 884 - { .name = "regen3", }, 885 - { .name = "sysen1", }, 886 - { .name = "sysen2", }, 887 - }; 888 - 889 - static void palmas_dt_to_pdata(struct device *dev, 890 - struct device_node *node, 891 - struct palmas_pmic_platform_data *pdata) 679 + static int palmas_ldo_registration(struct palmas_pmic *pmic, 680 + struct palmas_pmic_driver_data *ddata, 681 + struct palmas_pmic_platform_data *pdata, 682 + const char *pdev_name, 683 + struct regulator_config config) 892 684 { 893 - struct device_node *regulators; 894 - u32 prop; 895 - int idx, ret; 685 + int id, ret; 686 + struct regulator_dev *rdev; 687 + struct palmas_reg_init *reg_init; 688 + struct palmas_regs_info *rinfo; 689 + struct regulator_desc *desc; 896 690 897 - node = of_node_get(node); 898 - regulators = of_get_child_by_name(node, "regulators"); 899 - if (!regulators) { 900 - dev_info(dev, "regulator node not found\n"); 901 - return; 902 - } 691 + for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 692 + if (pdata && pdata->reg_init[id]) 693 + reg_init = pdata->reg_init[id]; 694 + else 695 + reg_init = NULL; 903 696 904 - ret = of_regulator_match(dev, regulators, palmas_matches, 905 - PALMAS_NUM_REGS); 906 - of_node_put(regulators); 907 - if (ret < 0) { 908 - dev_err(dev, "Error parsing regulator init data: %d\n", ret); 909 - return; 910 - } 697 + rinfo = &ddata->palmas_regs_info[id]; 698 + /* Miss out regulators which are not available due 699 + * to alternate functions. 700 + */ 911 701 912 - for (idx = 0; idx < PALMAS_NUM_REGS; idx++) { 913 - if (!palmas_matches[idx].init_data || 914 - !palmas_matches[idx].of_node) 915 - continue; 702 + /* Register the regulators */ 703 + desc = &pmic->desc[id]; 704 + desc->name = rinfo->name; 705 + desc->id = id; 706 + desc->type = REGULATOR_VOLTAGE; 707 + desc->owner = THIS_MODULE; 916 708 917 - pdata->reg_data[idx] = palmas_matches[idx].init_data; 709 + if (id < PALMAS_REG_REGEN1) { 710 + desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 711 + if (reg_init && reg_init->roof_floor) 712 + desc->ops = &palmas_ops_ext_control_ldo; 713 + else 714 + desc->ops = &palmas_ops_ldo; 715 + desc->min_uV = 900000; 716 + desc->uV_step = 50000; 717 + desc->linear_min_sel = 1; 718 + desc->enable_time = 500; 719 + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 720 + rinfo->vsel_addr); 721 + desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 722 + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 723 + rinfo->ctrl_addr); 724 + desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 918 725 919 - pdata->reg_init[idx] = devm_kzalloc(dev, 920 - sizeof(struct palmas_reg_init), GFP_KERNEL); 921 - 922 - pdata->reg_init[idx]->warm_reset = 923 - of_property_read_bool(palmas_matches[idx].of_node, 924 - "ti,warm-reset"); 925 - 926 - ret = of_property_read_u32(palmas_matches[idx].of_node, 927 - "ti,roof-floor", &prop); 928 - /* EINVAL: Property not found */ 929 - if (ret != -EINVAL) { 930 - int econtrol; 931 - 932 - /* use default value, when no value is specified */ 933 - econtrol = PALMAS_EXT_CONTROL_NSLEEP; 934 - if (!ret) { 935 - switch (prop) { 936 - case 1: 937 - econtrol = PALMAS_EXT_CONTROL_ENABLE1; 938 - break; 939 - case 2: 940 - econtrol = PALMAS_EXT_CONTROL_ENABLE2; 941 - break; 942 - case 3: 943 - econtrol = PALMAS_EXT_CONTROL_NSLEEP; 944 - break; 945 - default: 946 - WARN_ON(1); 947 - dev_warn(dev, 948 - "%s: Invalid roof-floor option: %u\n", 949 - palmas_matches[idx].name, prop); 950 - break; 951 - } 726 + /* Check if LDO8 is in tracking mode or not */ 727 + if (pdata && (id == PALMAS_REG_LDO8) && 728 + pdata->enable_ldo8_tracking) { 729 + palmas_enable_ldo8_track(pmic->palmas); 730 + desc->min_uV = 450000; 731 + desc->uV_step = 25000; 952 732 } 953 - pdata->reg_init[idx]->roof_floor = econtrol; 733 + 734 + /* LOD6 in vibrator mode will have enable time 2000us */ 735 + if (pdata && pdata->ldo6_vibrator && 736 + (id == PALMAS_REG_LDO6)) 737 + desc->enable_time = 2000; 738 + } else { 739 + desc->n_voltages = 1; 740 + if (reg_init && reg_init->roof_floor) 741 + desc->ops = &palmas_ops_ext_control_extreg; 742 + else 743 + desc->ops = &palmas_ops_extreg; 744 + desc->enable_reg = 745 + PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 746 + rinfo->ctrl_addr); 747 + desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 954 748 } 955 749 956 - ret = of_property_read_u32(palmas_matches[idx].of_node, 957 - "ti,mode-sleep", &prop); 958 - if (!ret) 959 - pdata->reg_init[idx]->mode_sleep = prop; 750 + if (pdata) 751 + config.init_data = pdata->reg_data[id]; 752 + else 753 + config.init_data = NULL; 960 754 961 - ret = of_property_read_bool(palmas_matches[idx].of_node, 962 - "ti,smps-range"); 963 - if (ret) 964 - pdata->reg_init[idx]->vsel = 965 - PALMAS_SMPS12_VOLTAGE_RANGE; 755 + desc->supply_name = rinfo->sname; 756 + config.of_node = ddata->palmas_matches[id].of_node; 966 757 967 - if (idx == PALMAS_REG_LDO8) 968 - pdata->enable_ldo8_tracking = of_property_read_bool( 969 - palmas_matches[idx].of_node, 970 - "ti,enable-ldo8-tracking"); 758 + rdev = devm_regulator_register(pmic->dev, desc, &config); 759 + if (IS_ERR(rdev)) { 760 + dev_err(pmic->dev, 761 + "failed to register %s regulator\n", 762 + pdev_name); 763 + return PTR_ERR(rdev); 764 + } 765 + 766 + /* Save regulator for cleanup */ 767 + pmic->rdev[id] = rdev; 768 + 769 + /* Initialise sleep/init values from platform data */ 770 + if (pdata) { 771 + reg_init = pdata->reg_init[id]; 772 + if (reg_init) { 773 + if (id <= ddata->ldo_end) 774 + ret = palmas_ldo_init(pmic->palmas, id, 775 + reg_init); 776 + else 777 + ret = palmas_extreg_init(pmic->palmas, 778 + id, reg_init); 779 + if (ret) 780 + return ret; 781 + } 782 + } 971 783 } 972 784 973 - pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); 785 + return 0; 974 786 } 975 787 976 - 977 - static int palmas_regulators_probe(struct platform_device *pdev) 788 + static int tps65917_ldo_registration(struct palmas_pmic *pmic, 789 + struct palmas_pmic_driver_data *ddata, 790 + struct palmas_pmic_platform_data *pdata, 791 + const char *pdev_name, 792 + struct regulator_config config) 978 793 { 979 - struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); 980 - struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev); 981 - struct device_node *node = pdev->dev.of_node; 794 + int id, ret; 982 795 struct regulator_dev *rdev; 983 - struct regulator_config config = { }; 984 - struct palmas_pmic *pmic; 985 796 struct palmas_reg_init *reg_init; 986 - int id = 0, ret; 987 - unsigned int addr, reg; 797 + struct palmas_regs_info *rinfo; 798 + struct regulator_desc *desc; 988 799 989 - if (node && !pdata) { 990 - pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 800 + for (id = ddata->ldo_begin; id < ddata->max_reg; id++) { 801 + if (pdata && pdata->reg_init[id]) 802 + reg_init = pdata->reg_init[id]; 803 + else 804 + reg_init = NULL; 991 805 992 - if (!pdata) 993 - return -ENOMEM; 806 + /* Miss out regulators which are not available due 807 + * to alternate functions. 808 + */ 809 + rinfo = &ddata->palmas_regs_info[id]; 994 810 995 - palmas_dt_to_pdata(&pdev->dev, node, pdata); 811 + /* Register the regulators */ 812 + desc = &pmic->desc[id]; 813 + desc->name = rinfo->name; 814 + desc->id = id; 815 + desc->type = REGULATOR_VOLTAGE; 816 + desc->owner = THIS_MODULE; 817 + 818 + if (id < TPS65917_REG_REGEN1) { 819 + desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES; 820 + if (reg_init && reg_init->roof_floor) 821 + desc->ops = &palmas_ops_ext_control_ldo; 822 + else 823 + desc->ops = &tps65917_ops_ldo; 824 + desc->min_uV = 900000; 825 + desc->uV_step = 50000; 826 + desc->linear_min_sel = 1; 827 + desc->enable_time = 500; 828 + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 829 + rinfo->vsel_addr); 830 + desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK; 831 + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 832 + rinfo->ctrl_addr); 833 + desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE; 834 + /* 835 + * To be confirmed. Discussion on going with PMIC Team. 836 + * It is of the order of ~60mV/uS. 837 + */ 838 + desc->ramp_delay = 2500; 839 + } else { 840 + desc->n_voltages = 1; 841 + if (reg_init && reg_init->roof_floor) 842 + desc->ops = &palmas_ops_ext_control_extreg; 843 + else 844 + desc->ops = &palmas_ops_extreg; 845 + desc->enable_reg = 846 + PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 847 + rinfo->ctrl_addr); 848 + desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE; 849 + } 850 + 851 + if (pdata) 852 + config.init_data = pdata->reg_data[id]; 853 + else 854 + config.init_data = NULL; 855 + 856 + desc->supply_name = rinfo->sname; 857 + config.of_node = ddata->palmas_matches[id].of_node; 858 + 859 + rdev = devm_regulator_register(pmic->dev, desc, &config); 860 + if (IS_ERR(rdev)) { 861 + dev_err(pmic->dev, 862 + "failed to register %s regulator\n", 863 + pdev_name); 864 + return PTR_ERR(rdev); 865 + } 866 + 867 + /* Save regulator for cleanup */ 868 + pmic->rdev[id] = rdev; 869 + 870 + /* Initialise sleep/init values from platform data */ 871 + if (pdata) { 872 + reg_init = pdata->reg_init[id]; 873 + if (reg_init) { 874 + if (id < TPS65917_REG_REGEN1) 875 + ret = palmas_ldo_init(pmic->palmas, 876 + id, reg_init); 877 + else 878 + ret = palmas_extreg_init(pmic->palmas, 879 + id, reg_init); 880 + if (ret) 881 + return ret; 882 + } 883 + } 996 884 } 997 885 998 - pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 999 - if (!pmic) 1000 - return -ENOMEM; 886 + return 0; 887 + } 1001 888 1002 - pmic->dev = &pdev->dev; 1003 - pmic->palmas = palmas; 1004 - palmas->pmic = pmic; 1005 - platform_set_drvdata(pdev, pmic); 889 + static int palmas_smps_registration(struct palmas_pmic *pmic, 890 + struct palmas_pmic_driver_data *ddata, 891 + struct palmas_pmic_platform_data *pdata, 892 + const char *pdev_name, 893 + struct regulator_config config) 894 + { 895 + int id, ret; 896 + unsigned int addr, reg; 897 + struct regulator_dev *rdev; 898 + struct palmas_reg_init *reg_init; 899 + struct palmas_regs_info *rinfo; 900 + struct regulator_desc *desc; 1006 901 1007 - ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg); 1008 - if (ret) 1009 - return ret; 1010 - 1011 - if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) 1012 - pmic->smps123 = 1; 1013 - 1014 - if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) 1015 - pmic->smps457 = 1; 1016 - 1017 - config.regmap = palmas->regmap[REGULATOR_SLAVE]; 1018 - config.dev = &pdev->dev; 1019 - config.driver_data = pmic; 1020 - 1021 - for (id = 0; id < PALMAS_REG_LDO1; id++) { 902 + for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1022 903 bool ramp_delay_support = false; 1023 904 1024 905 /* ··· 1113 872 break; 1114 873 case PALMAS_REG_SMPS10_OUT1: 1115 874 case PALMAS_REG_SMPS10_OUT2: 1116 - if (!PALMAS_PMIC_HAS(palmas, SMPS10_BOOST)) 875 + if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST)) 1117 876 continue; 1118 877 } 878 + rinfo = &ddata->palmas_regs_info[id]; 879 + desc = &pmic->desc[id]; 1119 880 1120 881 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8)) 1121 882 ramp_delay_support = true; 1122 883 1123 884 if (ramp_delay_support) { 1124 - addr = palmas_regs_info[id].tstep_addr; 885 + addr = rinfo->tstep_addr; 1125 886 ret = palmas_smps_read(pmic->palmas, addr, &reg); 1126 887 if (ret < 0) { 1127 - dev_err(&pdev->dev, 888 + dev_err(pmic->dev, 1128 889 "reading TSTEP reg failed: %d\n", ret); 1129 890 return ret; 1130 891 } 1131 - pmic->desc[id].ramp_delay = 1132 - palmas_smps_ramp_delay[reg & 0x3]; 1133 - pmic->ramp_delay[id] = pmic->desc[id].ramp_delay; 892 + desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3]; 893 + pmic->ramp_delay[id] = desc->ramp_delay; 1134 894 } 1135 895 1136 896 /* Initialise sleep/init values from platform data */ 1137 897 if (pdata && pdata->reg_init[id]) { 1138 898 reg_init = pdata->reg_init[id]; 1139 - ret = palmas_smps_init(palmas, id, reg_init); 899 + ret = palmas_smps_init(pmic->palmas, id, reg_init); 1140 900 if (ret) 1141 901 return ret; 1142 902 } else { ··· 1145 903 } 1146 904 1147 905 /* Register the regulators */ 1148 - pmic->desc[id].name = palmas_regs_info[id].name; 1149 - pmic->desc[id].id = id; 906 + desc->name = rinfo->name; 907 + desc->id = id; 1150 908 1151 909 switch (id) { 1152 910 case PALMAS_REG_SMPS10_OUT1: 1153 911 case PALMAS_REG_SMPS10_OUT2: 1154 - pmic->desc[id].n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; 1155 - pmic->desc[id].ops = &palmas_ops_smps10; 1156 - pmic->desc[id].vsel_reg = 1157 - PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1158 - PALMAS_SMPS10_CTRL); 1159 - pmic->desc[id].vsel_mask = SMPS10_VSEL; 1160 - pmic->desc[id].enable_reg = 1161 - PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1162 - PALMAS_SMPS10_CTRL); 912 + desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES; 913 + desc->ops = &palmas_ops_smps10; 914 + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 915 + PALMAS_SMPS10_CTRL); 916 + desc->vsel_mask = SMPS10_VSEL; 917 + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 918 + PALMAS_SMPS10_CTRL); 1163 919 if (id == PALMAS_REG_SMPS10_OUT1) 1164 - pmic->desc[id].enable_mask = SMPS10_SWITCH_EN; 920 + desc->enable_mask = SMPS10_SWITCH_EN; 1165 921 else 1166 - pmic->desc[id].enable_mask = SMPS10_BOOST_EN; 1167 - pmic->desc[id].bypass_reg = 1168 - PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1169 - PALMAS_SMPS10_CTRL); 1170 - pmic->desc[id].bypass_mask = SMPS10_BYPASS_EN; 1171 - pmic->desc[id].min_uV = 3750000; 1172 - pmic->desc[id].uV_step = 1250000; 922 + desc->enable_mask = SMPS10_BOOST_EN; 923 + desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 924 + PALMAS_SMPS10_CTRL); 925 + desc->bypass_mask = SMPS10_BYPASS_EN; 926 + desc->min_uV = 3750000; 927 + desc->uV_step = 1250000; 1173 928 break; 1174 929 default: 1175 930 /* ··· 1175 936 * otherwise we error in probe with unsupportable 1176 937 * ranges. Read the current smps mode for later use. 1177 938 */ 1178 - addr = palmas_regs_info[id].vsel_addr; 1179 - pmic->desc[id].n_linear_ranges = 3; 939 + addr = rinfo->vsel_addr; 940 + desc->n_linear_ranges = 3; 1180 941 1181 942 ret = palmas_smps_read(pmic->palmas, addr, &reg); 1182 943 if (ret) ··· 1184 945 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE) 1185 946 pmic->range[id] = 1; 1186 947 if (pmic->range[id]) 1187 - pmic->desc[id].linear_ranges = smps_high_ranges; 948 + desc->linear_ranges = smps_high_ranges; 1188 949 else 1189 - pmic->desc[id].linear_ranges = smps_low_ranges; 950 + desc->linear_ranges = smps_low_ranges; 1190 951 1191 952 if (reg_init && reg_init->roof_floor) 1192 - pmic->desc[id].ops = 1193 - &palmas_ops_ext_control_smps; 953 + desc->ops = &palmas_ops_ext_control_smps; 1194 954 else 1195 - pmic->desc[id].ops = &palmas_ops_smps; 1196 - pmic->desc[id].n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1197 - pmic->desc[id].vsel_reg = 1198 - PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1199 - palmas_regs_info[id].vsel_addr); 1200 - pmic->desc[id].vsel_mask = 1201 - PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 955 + desc->ops = &palmas_ops_smps; 956 + desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 957 + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 958 + rinfo->vsel_addr); 959 + desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1202 960 1203 961 /* Read the smps mode for later use. */ 1204 - addr = palmas_regs_info[id].ctrl_addr; 962 + addr = rinfo->ctrl_addr; 1205 963 ret = palmas_smps_read(pmic->palmas, addr, &reg); 1206 964 if (ret) 1207 965 return ret; 1208 966 pmic->current_reg_mode[id] = reg & 1209 967 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1210 968 1211 - pmic->desc[id].enable_reg = 1212 - PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1213 - palmas_regs_info[id].ctrl_addr); 1214 - pmic->desc[id].enable_mask = 1215 - PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 969 + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 970 + rinfo->ctrl_addr); 971 + desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1216 972 /* set_mode overrides this value */ 1217 - pmic->desc[id].enable_val = SMPS_CTRL_MODE_ON; 973 + desc->enable_val = SMPS_CTRL_MODE_ON; 1218 974 } 1219 975 1220 - pmic->desc[id].type = REGULATOR_VOLTAGE; 1221 - pmic->desc[id].owner = THIS_MODULE; 976 + desc->type = REGULATOR_VOLTAGE; 977 + desc->owner = THIS_MODULE; 1222 978 1223 979 if (pdata) 1224 980 config.init_data = pdata->reg_data[id]; 1225 981 else 1226 982 config.init_data = NULL; 1227 983 1228 - pmic->desc[id].supply_name = palmas_regs_info[id].sname; 1229 - config.of_node = palmas_matches[id].of_node; 984 + desc->supply_name = rinfo->sname; 985 + config.of_node = ddata->palmas_matches[id].of_node; 1230 986 1231 - rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id], 1232 - &config); 987 + rdev = devm_regulator_register(pmic->dev, desc, &config); 1233 988 if (IS_ERR(rdev)) { 1234 - dev_err(&pdev->dev, 989 + dev_err(pmic->dev, 1235 990 "failed to register %s regulator\n", 1236 - pdev->name); 991 + pdev_name); 1237 992 return PTR_ERR(rdev); 1238 993 } 1239 994 1240 995 /* Save regulator for cleanup */ 1241 996 pmic->rdev[id] = rdev; 1242 997 } 1243 - 1244 - /* Start this loop from the id left from previous loop */ 1245 - for (; id < PALMAS_NUM_REGS; id++) { 1246 - if (pdata && pdata->reg_init[id]) 1247 - reg_init = pdata->reg_init[id]; 1248 - else 1249 - reg_init = NULL; 1250 - 1251 - /* Miss out regulators which are not available due 1252 - * to alternate functions. 1253 - */ 1254 - 1255 - /* Register the regulators */ 1256 - pmic->desc[id].name = palmas_regs_info[id].name; 1257 - pmic->desc[id].id = id; 1258 - pmic->desc[id].type = REGULATOR_VOLTAGE; 1259 - pmic->desc[id].owner = THIS_MODULE; 1260 - 1261 - if (id < PALMAS_REG_REGEN1) { 1262 - pmic->desc[id].n_voltages = PALMAS_LDO_NUM_VOLTAGES; 1263 - if (reg_init && reg_init->roof_floor) 1264 - pmic->desc[id].ops = 1265 - &palmas_ops_ext_control_ldo; 1266 - else 1267 - pmic->desc[id].ops = &palmas_ops_ldo; 1268 - pmic->desc[id].min_uV = 900000; 1269 - pmic->desc[id].uV_step = 50000; 1270 - pmic->desc[id].linear_min_sel = 1; 1271 - pmic->desc[id].enable_time = 500; 1272 - pmic->desc[id].vsel_reg = 1273 - PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1274 - palmas_regs_info[id].vsel_addr); 1275 - pmic->desc[id].vsel_mask = 1276 - PALMAS_LDO1_VOLTAGE_VSEL_MASK; 1277 - pmic->desc[id].enable_reg = 1278 - PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, 1279 - palmas_regs_info[id].ctrl_addr); 1280 - pmic->desc[id].enable_mask = 1281 - PALMAS_LDO1_CTRL_MODE_ACTIVE; 1282 - 1283 - /* Check if LDO8 is in tracking mode or not */ 1284 - if (pdata && (id == PALMAS_REG_LDO8) && 1285 - pdata->enable_ldo8_tracking) { 1286 - palmas_enable_ldo8_track(palmas); 1287 - pmic->desc[id].min_uV = 450000; 1288 - pmic->desc[id].uV_step = 25000; 1289 - } 1290 - 1291 - /* LOD6 in vibrator mode will have enable time 2000us */ 1292 - if (pdata && pdata->ldo6_vibrator && 1293 - (id == PALMAS_REG_LDO6)) 1294 - pmic->desc[id].enable_time = 2000; 1295 - } else { 1296 - pmic->desc[id].n_voltages = 1; 1297 - if (reg_init && reg_init->roof_floor) 1298 - pmic->desc[id].ops = 1299 - &palmas_ops_ext_control_extreg; 1300 - else 1301 - pmic->desc[id].ops = &palmas_ops_extreg; 1302 - pmic->desc[id].enable_reg = 1303 - PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE, 1304 - palmas_regs_info[id].ctrl_addr); 1305 - pmic->desc[id].enable_mask = 1306 - PALMAS_REGEN1_CTRL_MODE_ACTIVE; 1307 - } 1308 - 1309 - if (pdata) 1310 - config.init_data = pdata->reg_data[id]; 1311 - else 1312 - config.init_data = NULL; 1313 - 1314 - pmic->desc[id].supply_name = palmas_regs_info[id].sname; 1315 - config.of_node = palmas_matches[id].of_node; 1316 - 1317 - rdev = devm_regulator_register(&pdev->dev, &pmic->desc[id], 1318 - &config); 1319 - if (IS_ERR(rdev)) { 1320 - dev_err(&pdev->dev, 1321 - "failed to register %s regulator\n", 1322 - pdev->name); 1323 - return PTR_ERR(rdev); 1324 - } 1325 - 1326 - /* Save regulator for cleanup */ 1327 - pmic->rdev[id] = rdev; 1328 - 1329 - /* Initialise sleep/init values from platform data */ 1330 - if (pdata) { 1331 - reg_init = pdata->reg_init[id]; 1332 - if (reg_init) { 1333 - if (id < PALMAS_REG_REGEN1) 1334 - ret = palmas_ldo_init(palmas, 1335 - id, reg_init); 1336 - else 1337 - ret = palmas_extreg_init(palmas, 1338 - id, reg_init); 1339 - if (ret) 1340 - return ret; 1341 - } 1342 - } 1343 - } 1344 - 1345 998 1346 999 return 0; 1347 1000 } 1348 1001 1349 - static const struct of_device_id of_palmas_match_tbl[] = { 1350 - { .compatible = "ti,palmas-pmic", }, 1351 - { .compatible = "ti,twl6035-pmic", }, 1352 - { .compatible = "ti,twl6036-pmic", }, 1353 - { .compatible = "ti,twl6037-pmic", }, 1354 - { .compatible = "ti,tps65913-pmic", }, 1355 - { .compatible = "ti,tps65914-pmic", }, 1356 - { .compatible = "ti,tps80036-pmic", }, 1357 - { .compatible = "ti,tps659038-pmic", }, 1002 + static int tps65917_smps_registration(struct palmas_pmic *pmic, 1003 + struct palmas_pmic_driver_data *ddata, 1004 + struct palmas_pmic_platform_data *pdata, 1005 + const char *pdev_name, 1006 + struct regulator_config config) 1007 + { 1008 + int id, ret; 1009 + unsigned int addr, reg; 1010 + struct regulator_dev *rdev; 1011 + struct palmas_reg_init *reg_init; 1012 + struct palmas_regs_info *rinfo; 1013 + struct regulator_desc *desc; 1014 + 1015 + for (id = ddata->smps_start; id <= ddata->smps_end; id++) { 1016 + /* 1017 + * Miss out regulators which are not available due 1018 + * to slaving configurations. 1019 + */ 1020 + desc = &pmic->desc[id]; 1021 + desc->n_linear_ranges = 3; 1022 + if ((id == TPS65917_REG_SMPS2) && pmic->smps12) 1023 + continue; 1024 + 1025 + /* Initialise sleep/init values from platform data */ 1026 + if (pdata && pdata->reg_init[id]) { 1027 + reg_init = pdata->reg_init[id]; 1028 + ret = palmas_smps_init(pmic->palmas, id, reg_init); 1029 + if (ret) 1030 + return ret; 1031 + } else { 1032 + reg_init = NULL; 1033 + } 1034 + rinfo = &ddata->palmas_regs_info[id]; 1035 + 1036 + /* Register the regulators */ 1037 + desc->name = rinfo->name; 1038 + desc->id = id; 1039 + 1040 + /* 1041 + * Read and store the RANGE bit for later use 1042 + * This must be done before regulator is probed, 1043 + * otherwise we error in probe with unsupportable 1044 + * ranges. Read the current smps mode for later use. 1045 + */ 1046 + addr = rinfo->vsel_addr; 1047 + 1048 + ret = palmas_smps_read(pmic->palmas, addr, &reg); 1049 + if (ret) 1050 + return ret; 1051 + if (reg & TPS65917_SMPS1_VOLTAGE_RANGE) 1052 + pmic->range[id] = 1; 1053 + 1054 + if (pmic->range[id]) 1055 + desc->linear_ranges = smps_high_ranges; 1056 + else 1057 + desc->linear_ranges = smps_low_ranges; 1058 + 1059 + if (reg_init && reg_init->roof_floor) 1060 + desc->ops = &tps65917_ops_ext_control_smps; 1061 + else 1062 + desc->ops = &tps65917_ops_smps; 1063 + desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES; 1064 + desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1065 + rinfo->vsel_addr); 1066 + desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK; 1067 + desc->ramp_delay = 2500; 1068 + 1069 + /* Read the smps mode for later use. */ 1070 + addr = rinfo->ctrl_addr; 1071 + ret = palmas_smps_read(pmic->palmas, addr, &reg); 1072 + if (ret) 1073 + return ret; 1074 + pmic->current_reg_mode[id] = reg & 1075 + PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1076 + desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, 1077 + rinfo->ctrl_addr); 1078 + desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK; 1079 + /* set_mode overrides this value */ 1080 + desc->enable_val = SMPS_CTRL_MODE_ON; 1081 + 1082 + desc->type = REGULATOR_VOLTAGE; 1083 + desc->owner = THIS_MODULE; 1084 + 1085 + if (pdata) 1086 + config.init_data = pdata->reg_data[id]; 1087 + else 1088 + config.init_data = NULL; 1089 + 1090 + desc->supply_name = rinfo->sname; 1091 + config.of_node = ddata->palmas_matches[id].of_node; 1092 + 1093 + rdev = devm_regulator_register(pmic->dev, desc, &config); 1094 + if (IS_ERR(rdev)) { 1095 + dev_err(pmic->dev, 1096 + "failed to register %s regulator\n", 1097 + pdev_name); 1098 + return PTR_ERR(rdev); 1099 + } 1100 + 1101 + /* Save regulator for cleanup */ 1102 + pmic->rdev[id] = rdev; 1103 + } 1104 + 1105 + return 0; 1106 + } 1107 + 1108 + static struct of_regulator_match palmas_matches[] = { 1109 + { .name = "smps12", }, 1110 + { .name = "smps123", }, 1111 + { .name = "smps3", }, 1112 + { .name = "smps45", }, 1113 + { .name = "smps457", }, 1114 + { .name = "smps6", }, 1115 + { .name = "smps7", }, 1116 + { .name = "smps8", }, 1117 + { .name = "smps9", }, 1118 + { .name = "smps10_out2", }, 1119 + { .name = "smps10_out1", }, 1120 + { .name = "ldo1", }, 1121 + { .name = "ldo2", }, 1122 + { .name = "ldo3", }, 1123 + { .name = "ldo4", }, 1124 + { .name = "ldo5", }, 1125 + { .name = "ldo6", }, 1126 + { .name = "ldo7", }, 1127 + { .name = "ldo8", }, 1128 + { .name = "ldo9", }, 1129 + { .name = "ldoln", }, 1130 + { .name = "ldousb", }, 1131 + { .name = "regen1", }, 1132 + { .name = "regen2", }, 1133 + { .name = "regen3", }, 1134 + { .name = "sysen1", }, 1135 + { .name = "sysen2", }, 1136 + }; 1137 + 1138 + static struct of_regulator_match tps65917_matches[] = { 1139 + { .name = "smps1", }, 1140 + { .name = "smps2", }, 1141 + { .name = "smps3", }, 1142 + { .name = "smps4", }, 1143 + { .name = "smps5", }, 1144 + { .name = "ldo1", }, 1145 + { .name = "ldo2", }, 1146 + { .name = "ldo3", }, 1147 + { .name = "ldo4", }, 1148 + { .name = "ldo5", }, 1149 + { .name = "regen1", }, 1150 + { .name = "regen2", }, 1151 + { .name = "regen3", }, 1152 + { .name = "sysen1", }, 1153 + { .name = "sysen2", }, 1154 + }; 1155 + 1156 + static struct palmas_pmic_driver_data palmas_ddata = { 1157 + .smps_start = PALMAS_REG_SMPS12, 1158 + .smps_end = PALMAS_REG_SMPS10_OUT1, 1159 + .ldo_begin = PALMAS_REG_LDO1, 1160 + .ldo_end = PALMAS_REG_LDOUSB, 1161 + .max_reg = PALMAS_NUM_REGS, 1162 + .palmas_regs_info = palmas_generic_regs_info, 1163 + .palmas_matches = palmas_matches, 1164 + .sleep_req_info = palma_sleep_req_info, 1165 + .smps_register = palmas_smps_registration, 1166 + .ldo_register = palmas_ldo_registration, 1167 + }; 1168 + 1169 + static struct palmas_pmic_driver_data tps65917_ddata = { 1170 + .smps_start = TPS65917_REG_SMPS1, 1171 + .smps_end = TPS65917_REG_SMPS5, 1172 + .ldo_begin = TPS65917_REG_LDO1, 1173 + .ldo_end = TPS65917_REG_LDO5, 1174 + .max_reg = TPS65917_NUM_REGS, 1175 + .palmas_regs_info = tps65917_regs_info, 1176 + .palmas_matches = tps65917_matches, 1177 + .sleep_req_info = tps65917_sleep_req_info, 1178 + .smps_register = tps65917_smps_registration, 1179 + .ldo_register = tps65917_ldo_registration, 1180 + }; 1181 + 1182 + static void palmas_dt_to_pdata(struct device *dev, 1183 + struct device_node *node, 1184 + struct palmas_pmic_platform_data *pdata, 1185 + struct palmas_pmic_driver_data *ddata) 1186 + { 1187 + struct device_node *regulators; 1188 + u32 prop; 1189 + int idx, ret; 1190 + 1191 + node = of_node_get(node); 1192 + regulators = of_get_child_by_name(node, "regulators"); 1193 + if (!regulators) { 1194 + dev_info(dev, "regulator node not found\n"); 1195 + return; 1196 + } 1197 + 1198 + ret = of_regulator_match(dev, regulators, ddata->palmas_matches, 1199 + ddata->max_reg); 1200 + of_node_put(regulators); 1201 + if (ret < 0) { 1202 + dev_err(dev, "Error parsing regulator init data: %d\n", ret); 1203 + return; 1204 + } 1205 + 1206 + for (idx = 0; idx < ddata->max_reg; idx++) { 1207 + if (!ddata->palmas_matches[idx].init_data || 1208 + !ddata->palmas_matches[idx].of_node) 1209 + continue; 1210 + 1211 + pdata->reg_data[idx] = ddata->palmas_matches[idx].init_data; 1212 + 1213 + pdata->reg_init[idx] = devm_kzalloc(dev, 1214 + sizeof(struct palmas_reg_init), GFP_KERNEL); 1215 + 1216 + pdata->reg_init[idx]->warm_reset = 1217 + of_property_read_bool(ddata->palmas_matches[idx].of_node, 1218 + "ti,warm-reset"); 1219 + 1220 + ret = of_property_read_u32(ddata->palmas_matches[idx].of_node, 1221 + "ti,roof-floor", &prop); 1222 + /* EINVAL: Property not found */ 1223 + if (ret != -EINVAL) { 1224 + int econtrol; 1225 + 1226 + /* use default value, when no value is specified */ 1227 + econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1228 + if (!ret) { 1229 + switch (prop) { 1230 + case 1: 1231 + econtrol = PALMAS_EXT_CONTROL_ENABLE1; 1232 + break; 1233 + case 2: 1234 + econtrol = PALMAS_EXT_CONTROL_ENABLE2; 1235 + break; 1236 + case 3: 1237 + econtrol = PALMAS_EXT_CONTROL_NSLEEP; 1238 + break; 1239 + default: 1240 + WARN_ON(1); 1241 + dev_warn(dev, 1242 + "%s: Invalid roof-floor option: %u\n", 1243 + palmas_matches[idx].name, prop); 1244 + break; 1245 + } 1246 + } 1247 + pdata->reg_init[idx]->roof_floor = econtrol; 1248 + } 1249 + 1250 + ret = of_property_read_u32(ddata->palmas_matches[idx].of_node, 1251 + "ti,mode-sleep", &prop); 1252 + if (!ret) 1253 + pdata->reg_init[idx]->mode_sleep = prop; 1254 + 1255 + ret = of_property_read_bool(ddata->palmas_matches[idx].of_node, 1256 + "ti,smps-range"); 1257 + if (ret) 1258 + pdata->reg_init[idx]->vsel = 1259 + PALMAS_SMPS12_VOLTAGE_RANGE; 1260 + 1261 + if (idx == PALMAS_REG_LDO8) 1262 + pdata->enable_ldo8_tracking = of_property_read_bool( 1263 + ddata->palmas_matches[idx].of_node, 1264 + "ti,enable-ldo8-tracking"); 1265 + } 1266 + 1267 + pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator"); 1268 + } 1269 + 1270 + static struct of_device_id of_palmas_match_tbl[] = { 1271 + { 1272 + .compatible = "ti,palmas-pmic", 1273 + .data = &palmas_ddata, 1274 + }, 1275 + { 1276 + .compatible = "ti,twl6035-pmic", 1277 + .data = &palmas_ddata, 1278 + }, 1279 + { 1280 + .compatible = "ti,twl6036-pmic", 1281 + .data = &palmas_ddata, 1282 + }, 1283 + { 1284 + .compatible = "ti,twl6037-pmic", 1285 + .data = &palmas_ddata, 1286 + }, 1287 + { 1288 + .compatible = "ti,tps65913-pmic", 1289 + .data = &palmas_ddata, 1290 + }, 1291 + { 1292 + .compatible = "ti,tps65914-pmic", 1293 + .data = &palmas_ddata, 1294 + }, 1295 + { 1296 + .compatible = "ti,tps80036-pmic", 1297 + .data = &palmas_ddata, 1298 + }, 1299 + { 1300 + .compatible = "ti,tps659038-pmic", 1301 + .data = &palmas_ddata, 1302 + }, 1303 + { 1304 + .compatible = "ti,tps65917-pmic", 1305 + .data = &tps65917_ddata, 1306 + }, 1358 1307 { /* end */ } 1359 1308 }; 1309 + 1310 + static int palmas_regulators_probe(struct platform_device *pdev) 1311 + { 1312 + struct palmas *palmas = dev_get_drvdata(pdev->dev.parent); 1313 + struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev); 1314 + struct device_node *node = pdev->dev.of_node; 1315 + struct palmas_pmic_driver_data *driver_data; 1316 + struct regulator_config config = { }; 1317 + struct palmas_pmic *pmic; 1318 + const char *pdev_name; 1319 + const struct of_device_id *match; 1320 + int ret = 0; 1321 + unsigned int reg; 1322 + 1323 + match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev); 1324 + 1325 + if (!match) 1326 + return -ENODATA; 1327 + 1328 + driver_data = (struct palmas_pmic_driver_data *)match->data; 1329 + pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 1330 + if (!pdata) 1331 + return -ENOMEM; 1332 + 1333 + pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL); 1334 + if (!pmic) 1335 + return -ENOMEM; 1336 + 1337 + pmic->dev = &pdev->dev; 1338 + pmic->palmas = palmas; 1339 + palmas->pmic = pmic; 1340 + platform_set_drvdata(pdev, pmic); 1341 + pmic->palmas->pmic_ddata = driver_data; 1342 + 1343 + palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data); 1344 + 1345 + ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, &reg); 1346 + if (ret) 1347 + return ret; 1348 + 1349 + if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) 1350 + pmic->smps123 = 1; 1351 + 1352 + if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN) 1353 + pmic->smps457 = 1; 1354 + 1355 + config.regmap = palmas->regmap[REGULATOR_SLAVE]; 1356 + config.dev = &pdev->dev; 1357 + config.driver_data = pmic; 1358 + pdev_name = pdev->name; 1359 + 1360 + ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name, 1361 + config); 1362 + if (ret) 1363 + return ret; 1364 + 1365 + ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name, 1366 + config); 1367 + 1368 + return ret; 1369 + } 1360 1370 1361 1371 static struct platform_driver palmas_driver = { 1362 1372 .driver = {
+1 -1
drivers/regulator/s2mps11.c
··· 766 766 767 767 /* Module information */ 768 768 MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>"); 769 - MODULE_DESCRIPTION("SAMSUNG S2MPS11/S2MPS14 Regulator Driver"); 769 + MODULE_DESCRIPTION("SAMSUNG S2MPS11/S2MPS14/S2MPU02 Regulator Driver"); 770 770 MODULE_LICENSE("GPL");
+1 -3
drivers/regulator/s5m8767.c
··· 686 686 struct sec_platform_data *pdata = iodev->pdata; 687 687 struct regulator_config config = { }; 688 688 struct s5m8767_info *s5m8767; 689 - int i, ret, size, buck_init; 689 + int i, ret, buck_init; 690 690 691 691 if (!pdata) { 692 692 dev_err(pdev->dev.parent, "Platform data not supplied\n"); ··· 724 724 GFP_KERNEL); 725 725 if (!s5m8767) 726 726 return -ENOMEM; 727 - 728 - size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2); 729 727 730 728 s5m8767->dev = &pdev->dev; 731 729 s5m8767->iodev = iodev;
+40 -32
drivers/regulator/tps65090-regulator.c
··· 192 192 static struct regulator_ops tps65090_ldo_ops = { 193 193 }; 194 194 195 - #define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _ops) \ 195 + #define tps65090_REG_DESC(_id, _sname, _en_reg, _en_bits, _nvolt, _volt, _ops) \ 196 196 { \ 197 197 .name = "TPS65090_RAILS"#_id, \ 198 198 .supply_name = _sname, \ 199 199 .id = TPS65090_REGULATOR_##_id, \ 200 + .n_voltages = _nvolt, \ 200 201 .ops = &_ops, \ 202 + .fixed_uV = _volt, \ 201 203 .enable_reg = _en_reg, \ 202 204 .enable_val = _en_bits, \ 203 205 .enable_mask = _en_bits, \ ··· 207 205 .owner = THIS_MODULE, \ 208 206 } 209 207 208 + #define tps65090_REG_FIXEDV(_id, _sname, en_reg, _en_bits, _volt, _ops) \ 209 + tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 1, _volt, _ops) 210 + 211 + #define tps65090_REG_SWITCH(_id, _sname, en_reg, _en_bits, _ops) \ 212 + tps65090_REG_DESC(_id, _sname, en_reg, _en_bits, 0, 0, _ops) 213 + 210 214 static struct regulator_desc tps65090_regulator_desc[] = { 211 - tps65090_REG_DESC(DCDC1, "vsys1", 0x0C, BIT(CTRL_EN_BIT), 212 - tps65090_reg_control_ops), 213 - tps65090_REG_DESC(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT), 214 - tps65090_reg_control_ops), 215 - tps65090_REG_DESC(DCDC3, "vsys3", 0x0E, BIT(CTRL_EN_BIT), 216 - tps65090_reg_control_ops), 215 + tps65090_REG_FIXEDV(DCDC1, "vsys1", 0x0C, BIT(CTRL_EN_BIT), 5000000, 216 + tps65090_reg_control_ops), 217 + tps65090_REG_FIXEDV(DCDC2, "vsys2", 0x0D, BIT(CTRL_EN_BIT), 3300000, 218 + tps65090_reg_control_ops), 219 + tps65090_REG_SWITCH(DCDC3, "vsys3", 0x0E, BIT(CTRL_EN_BIT), 220 + tps65090_reg_control_ops), 217 221 218 - tps65090_REG_DESC(FET1, "infet1", 0x0F, 219 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 220 - tps65090_fet_control_ops), 221 - tps65090_REG_DESC(FET2, "infet2", 0x10, 222 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 223 - tps65090_fet_control_ops), 224 - tps65090_REG_DESC(FET3, "infet3", 0x11, 225 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 226 - tps65090_fet_control_ops), 227 - tps65090_REG_DESC(FET4, "infet4", 0x12, 228 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 229 - tps65090_fet_control_ops), 230 - tps65090_REG_DESC(FET5, "infet5", 0x13, 231 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 232 - tps65090_fet_control_ops), 233 - tps65090_REG_DESC(FET6, "infet6", 0x14, 234 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 235 - tps65090_fet_control_ops), 236 - tps65090_REG_DESC(FET7, "infet7", 0x15, 237 - BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 238 - tps65090_fet_control_ops), 222 + tps65090_REG_SWITCH(FET1, "infet1", 0x0F, 223 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 224 + tps65090_fet_control_ops), 225 + tps65090_REG_SWITCH(FET2, "infet2", 0x10, 226 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 227 + tps65090_fet_control_ops), 228 + tps65090_REG_SWITCH(FET3, "infet3", 0x11, 229 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 230 + tps65090_fet_control_ops), 231 + tps65090_REG_SWITCH(FET4, "infet4", 0x12, 232 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 233 + tps65090_fet_control_ops), 234 + tps65090_REG_SWITCH(FET5, "infet5", 0x13, 235 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 236 + tps65090_fet_control_ops), 237 + tps65090_REG_SWITCH(FET6, "infet6", 0x14, 238 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 239 + tps65090_fet_control_ops), 240 + tps65090_REG_SWITCH(FET7, "infet7", 0x15, 241 + BIT(CTRL_EN_BIT) | BIT(CTRL_PG_BIT), 242 + tps65090_fet_control_ops), 239 243 240 - tps65090_REG_DESC(LDO1, "vsys-l1", 0, 0, 241 - tps65090_ldo_ops), 242 - tps65090_REG_DESC(LDO2, "vsys-l2", 0, 0, 243 - tps65090_ldo_ops), 244 + tps65090_REG_FIXEDV(LDO1, "vsys-l1", 0, 0, 5000000, 245 + tps65090_ldo_ops), 246 + tps65090_REG_FIXEDV(LDO2, "vsys-l2", 0, 0, 3300000, 247 + tps65090_ldo_ops), 244 248 }; 245 249 246 250 static inline bool is_dcdc(int id)
+2 -2
drivers/regulator/tps65217-regulator.c
··· 68 68 static int tps65217_pmic_enable(struct regulator_dev *dev) 69 69 { 70 70 struct tps65217 *tps = rdev_get_drvdata(dev); 71 - unsigned int rid = rdev_get_id(dev); 71 + int rid = rdev_get_id(dev); 72 72 73 73 if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4) 74 74 return -EINVAL; ··· 82 82 static int tps65217_pmic_disable(struct regulator_dev *dev) 83 83 { 84 84 struct tps65217 *tps = rdev_get_drvdata(dev); 85 - unsigned int rid = rdev_get_id(dev); 85 + int rid = rdev_get_id(dev); 86 86 87 87 if (rid < TPS65217_DCDC_1 || rid > TPS65217_LDO_4) 88 88 return -EINVAL;
+26 -26
drivers/regulator/tps65218-regulator.c
··· 29 29 30 30 enum tps65218_regulators { DCDC1, DCDC2, DCDC3, DCDC4, DCDC5, DCDC6, LDO1 }; 31 31 32 - #define TPS65218_REGULATOR(_name, _id, _ops, _n, _vr, _vm, _er, _em, _t, \ 33 - _lr, _nlr, _delay) \ 32 + #define TPS65218_REGULATOR(_name, _id, _ops, _n, _vr, _vm, _er, _em, \ 33 + _lr, _nlr, _delay, _fuv) \ 34 34 { \ 35 35 .name = _name, \ 36 36 .id = _id, \ ··· 42 42 .vsel_mask = _vm, \ 43 43 .enable_reg = _er, \ 44 44 .enable_mask = _em, \ 45 - .volt_table = _t, \ 45 + .volt_table = NULL, \ 46 46 .linear_ranges = _lr, \ 47 47 .n_linear_ranges = _nlr, \ 48 48 .ramp_delay = _delay, \ 49 + .fixed_uV = _fuv \ 49 50 } \ 50 51 51 52 #define TPS65218_INFO(_id, _nm, _min, _max) \ 52 - { \ 53 + [_id] = { \ 53 54 .id = _id, \ 54 55 .name = _nm, \ 55 56 .min_uV = _min, \ ··· 69 68 70 69 static const struct regulator_linear_range dcdc4_ranges[] = { 71 70 REGULATOR_LINEAR_RANGE(1175000, 0x0, 0xf, 25000), 72 - REGULATOR_LINEAR_RANGE(1550000, 0x10, 0x34, 50000), 71 + REGULATOR_LINEAR_RANGE(1600000, 0x10, 0x34, 50000), 73 72 }; 74 73 75 74 static struct tps_info tps65218_pmic_regs[] = { 76 - TPS65218_INFO(0, "DCDC1", 850000, 167500), 77 - TPS65218_INFO(1, "DCDC2", 850000, 1675000), 78 - TPS65218_INFO(2, "DCDC3", 900000, 3400000), 79 - TPS65218_INFO(3, "DCDC4", 1175000, 3400000), 80 - TPS65218_INFO(4, "DCDC5", 1000000, 1000000), 81 - TPS65218_INFO(5, "DCDC6", 1800000, 1800000), 82 - TPS65218_INFO(6, "LDO1", 900000, 3400000), 75 + TPS65218_INFO(DCDC1, "DCDC1", 850000, 167500), 76 + TPS65218_INFO(DCDC2, "DCDC2", 850000, 1675000), 77 + TPS65218_INFO(DCDC3, "DCDC3", 900000, 3400000), 78 + TPS65218_INFO(DCDC4, "DCDC4", 1175000, 3400000), 79 + TPS65218_INFO(DCDC5, "DCDC5", 1000000, 1000000), 80 + TPS65218_INFO(DCDC6, "DCDC6", 1800000, 1800000), 81 + TPS65218_INFO(LDO1, "LDO1", 900000, 3400000), 83 82 }; 84 83 85 84 #define TPS65218_OF_MATCH(comp, label) \ ··· 128 127 static int tps65218_pmic_enable(struct regulator_dev *dev) 129 128 { 130 129 struct tps65218 *tps = rdev_get_drvdata(dev); 131 - unsigned int rid = rdev_get_id(dev); 130 + int rid = rdev_get_id(dev); 132 131 133 132 if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) 134 133 return -EINVAL; ··· 142 141 static int tps65218_pmic_disable(struct regulator_dev *dev) 143 142 { 144 143 struct tps65218 *tps = rdev_get_drvdata(dev); 145 - unsigned int rid = rdev_get_id(dev); 144 + int rid = rdev_get_id(dev); 146 145 147 146 if (rid < TPS65218_DCDC_1 || rid > TPS65218_LDO_1) 148 147 return -EINVAL; ··· 186 185 TPS65218_REGULATOR("DCDC1", TPS65218_DCDC_1, tps65218_dcdc12_ops, 64, 187 186 TPS65218_REG_CONTROL_DCDC1, 188 187 TPS65218_CONTROL_DCDC1_MASK, 189 - TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC1_EN, NULL, 190 - dcdc1_dcdc2_ranges, 2, 4000), 188 + TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC1_EN, 189 + dcdc1_dcdc2_ranges, 2, 4000, 0), 191 190 TPS65218_REGULATOR("DCDC2", TPS65218_DCDC_2, tps65218_dcdc12_ops, 64, 192 191 TPS65218_REG_CONTROL_DCDC2, 193 192 TPS65218_CONTROL_DCDC2_MASK, 194 - TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC2_EN, NULL, 195 - dcdc1_dcdc2_ranges, 2, 4000), 193 + TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC2_EN, 194 + dcdc1_dcdc2_ranges, 2, 4000, 0), 196 195 TPS65218_REGULATOR("DCDC3", TPS65218_DCDC_3, tps65218_ldo1_dcdc34_ops, 197 196 64, TPS65218_REG_CONTROL_DCDC3, 198 197 TPS65218_CONTROL_DCDC3_MASK, TPS65218_REG_ENABLE1, 199 - TPS65218_ENABLE1_DC3_EN, NULL, 200 - ldo1_dcdc3_ranges, 2, 0), 198 + TPS65218_ENABLE1_DC3_EN, ldo1_dcdc3_ranges, 2, 0, 0), 201 199 TPS65218_REGULATOR("DCDC4", TPS65218_DCDC_4, tps65218_ldo1_dcdc34_ops, 202 200 53, TPS65218_REG_CONTROL_DCDC4, 203 201 TPS65218_CONTROL_DCDC4_MASK, 204 - TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC4_EN, NULL, 205 - dcdc4_ranges, 2, 0), 202 + TPS65218_REG_ENABLE1, TPS65218_ENABLE1_DC4_EN, 203 + dcdc4_ranges, 2, 0, 0), 206 204 TPS65218_REGULATOR("DCDC5", TPS65218_DCDC_5, tps65218_dcdc56_pmic_ops, 207 205 1, -1, -1, TPS65218_REG_ENABLE1, 208 - TPS65218_ENABLE1_DC5_EN, NULL, NULL, 0, 0), 206 + TPS65218_ENABLE1_DC5_EN, NULL, 0, 0, 1000000), 209 207 TPS65218_REGULATOR("DCDC6", TPS65218_DCDC_6, tps65218_dcdc56_pmic_ops, 210 208 1, -1, -1, TPS65218_REG_ENABLE1, 211 - TPS65218_ENABLE1_DC6_EN, NULL, NULL, 0, 0), 209 + TPS65218_ENABLE1_DC6_EN, NULL, 0, 0, 1800000), 212 210 TPS65218_REGULATOR("LDO1", TPS65218_LDO_1, tps65218_ldo1_dcdc34_ops, 64, 213 211 TPS65218_REG_CONTROL_LDO1, 214 212 TPS65218_CONTROL_LDO1_MASK, TPS65218_REG_ENABLE2, 215 - TPS65218_ENABLE2_LDO1_EN, NULL, ldo1_dcdc3_ranges, 216 - 2, 0), 213 + TPS65218_ENABLE2_LDO1_EN, ldo1_dcdc3_ranges, 214 + 2, 0, 0), 217 215 }; 218 216 219 217 static int tps65218_regulator_probe(struct platform_device *pdev)
+68 -61
drivers/regulator/tps6586x-regulator.c
··· 74 74 .disable = regulator_disable_regmap, 75 75 }; 76 76 77 + static struct regulator_ops tps6586x_rw_linear_regulator_ops = { 78 + .list_voltage = regulator_list_voltage_linear, 79 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 80 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 81 + 82 + .is_enabled = regulator_is_enabled_regmap, 83 + .enable = regulator_enable_regmap, 84 + .disable = regulator_disable_regmap, 85 + }; 86 + 77 87 static struct regulator_ops tps6586x_ro_regulator_ops = { 78 88 .list_voltage = regulator_list_voltage_table, 79 89 .map_voltage = regulator_map_voltage_ascend, ··· 101 91 1200000, 1500000, 1800000, 2500000, 2700000, 2850000, 3100000, 3300000, 102 92 }; 103 93 104 - static const unsigned int tps6586x_ldo4_voltages[] = { 105 - 1700000, 1725000, 1750000, 1775000, 1800000, 1825000, 1850000, 1875000, 106 - 1900000, 1925000, 1950000, 1975000, 2000000, 2025000, 2050000, 2075000, 107 - 2100000, 2125000, 2150000, 2175000, 2200000, 2225000, 2250000, 2275000, 108 - 2300000, 2325000, 2350000, 2375000, 2400000, 2425000, 2450000, 2475000, 109 - }; 110 - 111 - #define tps658623_sm2_voltages tps6586x_ldo4_voltages 112 - 113 94 static const unsigned int tps6586x_ldo_voltages[] = { 114 95 1250000, 1500000, 1800000, 2500000, 2700000, 2850000, 3100000, 3300000, 115 96 }; 116 97 117 - static const unsigned int tps6586x_sm2_voltages[] = { 118 - 3000000, 3050000, 3100000, 3150000, 3200000, 3250000, 3300000, 3350000, 119 - 3400000, 3450000, 3500000, 3550000, 3600000, 3650000, 3700000, 3750000, 120 - 3800000, 3850000, 3900000, 3950000, 4000000, 4050000, 4100000, 4150000, 121 - 4200000, 4250000, 4300000, 4350000, 4400000, 4450000, 4500000, 4550000, 122 - }; 123 - 124 - static int tps658640_sm2_voltages[] = { 125 - 2150000, 2200000, 2250000, 2300000, 2350000, 2400000, 2450000, 2500000, 126 - 2550000, 2600000, 2650000, 2700000, 2750000, 2800000, 2850000, 2900000, 127 - 2950000, 3000000, 3050000, 3100000, 3150000, 3200000, 3250000, 3300000, 128 - 3350000, 3400000, 3450000, 3500000, 3550000, 3600000, 3650000, 3700000, 129 - }; 130 - 131 - static const unsigned int tps658643_sm2_voltages[] = { 132 - 1025000, 1050000, 1075000, 1100000, 1125000, 1150000, 1175000, 1200000, 133 - 1225000, 1250000, 1275000, 1300000, 1325000, 1350000, 1375000, 1400000, 134 - 1425000, 1450000, 1475000, 1500000, 1525000, 1550000, 1575000, 1600000, 135 - 1625000, 1650000, 1675000, 1700000, 1725000, 1750000, 1775000, 1800000, 136 - }; 137 - 138 - static const unsigned int tps6586x_dvm_voltages[] = { 139 - 725000, 750000, 775000, 800000, 825000, 850000, 875000, 900000, 140 - 925000, 950000, 975000, 1000000, 1025000, 1050000, 1075000, 1100000, 141 - 1125000, 1150000, 1175000, 1200000, 1225000, 1250000, 1275000, 1300000, 142 - 1325000, 1350000, 1375000, 1400000, 1425000, 1450000, 1475000, 1500000, 143 - }; 144 - 145 - static int tps658640_rtc_voltages[] = { 98 + static const unsigned int tps658640_rtc_voltages[] = { 146 99 2500000, 2850000, 3100000, 3300000, 147 100 }; 148 101 ··· 132 159 .enable_reg[1] = TPS6586X_SUPPLY##ereg1, \ 133 160 .enable_bit[1] = (ebit1), 134 161 162 + #define TPS6586X_REGULATOR_LINEAR(_id, _ops, _pin_name, n_volt, min_uv, \ 163 + uv_step, vreg, shift, nbits, ereg0, \ 164 + ebit0, ereg1, ebit1, goreg, gobit) \ 165 + .desc = { \ 166 + .supply_name = _pin_name, \ 167 + .name = "REG-" #_id, \ 168 + .ops = &tps6586x_## _ops ## _regulator_ops, \ 169 + .type = REGULATOR_VOLTAGE, \ 170 + .id = TPS6586X_ID_##_id, \ 171 + .n_voltages = n_volt, \ 172 + .min_uV = min_uv, \ 173 + .uV_step = uv_step, \ 174 + .owner = THIS_MODULE, \ 175 + .enable_reg = TPS6586X_SUPPLY##ereg0, \ 176 + .enable_mask = 1 << (ebit0), \ 177 + .vsel_reg = TPS6586X_##vreg, \ 178 + .vsel_mask = ((1 << (nbits)) - 1) << (shift), \ 179 + .apply_reg = (goreg), \ 180 + .apply_bit = (gobit), \ 181 + }, \ 182 + .enable_reg[0] = TPS6586X_SUPPLY##ereg0, \ 183 + .enable_bit[0] = (ebit0), \ 184 + .enable_reg[1] = TPS6586X_SUPPLY##ereg1, \ 185 + .enable_bit[1] = (ebit1), 186 + 135 187 #define TPS6586X_LDO(_id, _pname, vdata, vreg, shift, nbits, \ 136 188 ereg0, ebit0, ereg1, ebit1) \ 137 189 { \ 138 190 TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \ 139 191 ereg0, ebit0, ereg1, ebit1, 0, 0) \ 192 + } 193 + 194 + #define TPS6586X_LDO_LINEAR(_id, _pname, n_volt, min_uv, uv_step, vreg, \ 195 + shift, nbits, ereg0, ebit0, ereg1, ebit1) \ 196 + { \ 197 + TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \ 198 + min_uv, uv_step, vreg, shift, nbits, \ 199 + ereg0, ebit0, ereg1, ebit1, 0, 0) \ 140 200 } 141 201 142 202 #define TPS6586X_FIXED_LDO(_id, _pname, vdata, vreg, shift, nbits, \ ··· 179 173 ereg0, ebit0, ereg1, ebit1, 0, 0) \ 180 174 } 181 175 182 - #define TPS6586X_DVM(_id, _pname, vdata, vreg, shift, nbits, \ 183 - ereg0, ebit0, ereg1, ebit1, goreg, gobit) \ 176 + #define TPS6586X_DVM(_id, _pname, n_volt, min_uv, uv_step, vreg, shift, \ 177 + nbits, ereg0, ebit0, ereg1, ebit1, goreg, gobit) \ 184 178 { \ 185 - TPS6586X_REGULATOR(_id, rw, _pname, vdata, vreg, shift, nbits, \ 186 - ereg0, ebit0, ereg1, ebit1, goreg, gobit) \ 179 + TPS6586X_REGULATOR_LINEAR(_id, rw_linear, _pname, n_volt, \ 180 + min_uv, uv_step, vreg, shift, nbits, \ 181 + ereg0, ebit0, ereg1, ebit1, goreg, \ 182 + gobit) \ 187 183 } 188 184 189 185 #define TPS6586X_SYS_REGULATOR() \ ··· 218 210 ENE, 7), 219 211 TPS6586X_LDO(LDO_RTC, "REG-SYS", tps6586x_ldo, SUPPLYV4, 3, 3, V4, 7, 220 212 V4, 7), 221 - TPS6586X_LDO(LDO_1, "vinldo01", tps6586x_dvm, SUPPLYV1, 0, 5, ENC, 1, 222 - END, 1), 223 - TPS6586X_LDO(SM_2, "vin-sm2", tps6586x_sm2, SUPPLYV2, 0, 5, ENC, 7, 224 - END, 7), 225 - 226 - TPS6586X_DVM(LDO_2, "vinldo23", tps6586x_dvm, LDO2BV1, 0, 5, ENA, 3, 227 - ENB, 3, TPS6586X_VCC2, BIT(6)), 228 - TPS6586X_DVM(LDO_4, "vinldo4", tps6586x_ldo4, LDO4V1, 0, 5, ENC, 3, 229 - END, 3, TPS6586X_VCC1, BIT(6)), 230 - TPS6586X_DVM(SM_0, "vin-sm0", tps6586x_dvm, SM0V1, 0, 5, ENA, 1, 231 - ENB, 1, TPS6586X_VCC1, BIT(2)), 232 - TPS6586X_DVM(SM_1, "vin-sm1", tps6586x_dvm, SM1V1, 0, 5, ENA, 0, 233 - ENB, 0, TPS6586X_VCC1, BIT(0)), 213 + TPS6586X_LDO_LINEAR(LDO_1, "vinldo01", 32, 725000, 25000, SUPPLYV1, 214 + 0, 5, ENC, 1, END, 1), 215 + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 3000000, 50000, SUPPLYV2, 216 + 0, 5, ENC, 7, END, 7), 217 + TPS6586X_DVM(LDO_2, "vinldo23", 32, 725000, 25000, LDO2BV1, 0, 5, 218 + ENA, 3, ENB, 3, TPS6586X_VCC2, BIT(6)), 219 + TPS6586X_DVM(LDO_4, "vinldo4", 32, 1700000, 25000, LDO4V1, 0, 5, 220 + ENC, 3, END, 3, TPS6586X_VCC1, BIT(6)), 221 + TPS6586X_DVM(SM_0, "vin-sm0", 32, 725000, 25000, SM0V1, 0, 5, 222 + ENA, 1, ENB, 1, TPS6586X_VCC1, BIT(2)), 223 + TPS6586X_DVM(SM_1, "vin-sm1", 32, 725000, 25000, SM1V1, 0, 5, 224 + ENA, 0, ENB, 0, TPS6586X_VCC1, BIT(0)), 234 225 }; 235 226 236 227 static struct tps6586x_regulator tps658623_regulator[] = { 237 - TPS6586X_LDO(SM_2, "vin-sm2", tps658623_sm2, SUPPLYV2, 0, 5, ENC, 7, 238 - END, 7), 228 + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 1700000, 25000, SUPPLYV2, 229 + 0, 5, ENC, 7, END, 7), 239 230 }; 240 231 241 232 static struct tps6586x_regulator tps658640_regulator[] = { ··· 250 243 ENC, 6, END, 6), 251 244 TPS6586X_LDO(LDO_9, "vinldo9", tps6586x_ldo0, SUPPLYV6, 3, 3, 252 245 ENE, 7, ENE, 7), 253 - TPS6586X_LDO(SM_2, "vin-sm2", tps658640_sm2, SUPPLYV2, 0, 5, 254 - ENC, 7, END, 7), 246 + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 2150000, 50000, SUPPLYV2, 247 + 0, 5, ENC, 7, END, 7), 255 248 256 249 TPS6586X_FIXED_LDO(LDO_RTC, "REG-SYS", tps658640_rtc, SUPPLYV4, 3, 2, 257 250 V4, 7, V4, 7), 258 251 }; 259 252 260 253 static struct tps6586x_regulator tps658643_regulator[] = { 261 - TPS6586X_LDO(SM_2, "vin-sm2", tps658643_sm2, SUPPLYV2, 0, 5, ENC, 7, 262 - END, 7), 254 + TPS6586X_LDO_LINEAR(SM_2, "vin-sm2", 32, 1025000, 25000, SUPPLYV2, 255 + 0, 5, ENC, 7, END, 7), 263 256 }; 264 257 265 258 /*
+1 -12
drivers/regulator/twl-regulator.c
··· 1128 1128 if (!initdata) 1129 1129 return -EINVAL; 1130 1130 1131 - info = kmemdup(template, sizeof(*info), GFP_KERNEL); 1131 + info = devm_kmemdup(&pdev->dev, template, sizeof(*info), GFP_KERNEL); 1132 1132 if (!info) 1133 1133 return -ENOMEM; 1134 1134 ··· 1192 1192 if (IS_ERR(rdev)) { 1193 1193 dev_err(&pdev->dev, "can't register %s, %ld\n", 1194 1194 info->desc.name, PTR_ERR(rdev)); 1195 - kfree(info); 1196 1195 return PTR_ERR(rdev); 1197 1196 } 1198 1197 platform_set_drvdata(pdev, rdev); ··· 1211 1212 return 0; 1212 1213 } 1213 1214 1214 - static int twlreg_remove(struct platform_device *pdev) 1215 - { 1216 - struct regulator_dev *rdev = platform_get_drvdata(pdev); 1217 - struct twlreg_info *info = rdev->reg_data; 1218 - 1219 - kfree(info); 1220 - return 0; 1221 - } 1222 - 1223 1215 MODULE_ALIAS("platform:twl_reg"); 1224 1216 1225 1217 static struct platform_driver twlreg_driver = { 1226 1218 .probe = twlreg_probe, 1227 - .remove = twlreg_remove, 1228 1219 /* NOTE: short name, to work around driver model truncation of 1229 1220 * "twl_regulator.12" (and friends) to "twl_regulator.1". 1230 1221 */
+837
include/linux/mfd/palmas.h
··· 30 30 #define PALMAS_CHIP_ID 0xC035 31 31 #define PALMAS_CHIP_CHARGER_ID 0xC036 32 32 33 + #define TPS65917_RESERVED -1 34 + 33 35 #define is_palmas(a) (((a) == PALMAS_CHIP_OLD_ID) || \ 34 36 ((a) == PALMAS_CHIP_ID)) 35 37 #define is_palmas_charger(a) ((a) == PALMAS_CHIP_CHARGER_ID) ··· 53 51 struct palmas_gpadc; 54 52 struct palmas_resource; 55 53 struct palmas_usb; 54 + struct palmas_pmic_driver_data; 55 + struct palmas_pmic_platform_data; 56 56 57 57 enum palmas_usb_state { 58 58 PALMAS_USB_STATE_DISCONNECT, ··· 78 74 struct mutex irq_lock; 79 75 struct regmap_irq_chip_data *irq_data; 80 76 77 + struct palmas_pmic_driver_data *pmic_ddata; 78 + 81 79 /* Child Devices */ 82 80 struct palmas_pmic *pmic; 83 81 struct palmas_gpadc *gpadc; ··· 90 84 u8 gpio_muxed; 91 85 u8 led_muxed; 92 86 u8 pwm_muxed; 87 + }; 88 + 89 + #define PALMAS_EXT_REQ (PALMAS_EXT_CONTROL_ENABLE1 | \ 90 + PALMAS_EXT_CONTROL_ENABLE2 | \ 91 + PALMAS_EXT_CONTROL_NSLEEP) 92 + 93 + struct palmas_sleep_requestor_info { 94 + int id; 95 + int reg_offset; 96 + int bit_pos; 97 + }; 98 + 99 + struct palmas_regs_info { 100 + char *name; 101 + char *sname; 102 + u8 vsel_addr; 103 + u8 ctrl_addr; 104 + u8 tstep_addr; 105 + int sleep_id; 106 + }; 107 + 108 + struct palmas_pmic_driver_data { 109 + int smps_start; 110 + int smps_end; 111 + int ldo_begin; 112 + int ldo_end; 113 + int max_reg; 114 + struct palmas_regs_info *palmas_regs_info; 115 + struct of_regulator_match *palmas_matches; 116 + struct palmas_sleep_requestor_info *sleep_req_info; 117 + int (*smps_register)(struct palmas_pmic *pmic, 118 + struct palmas_pmic_driver_data *ddata, 119 + struct palmas_pmic_platform_data *pdata, 120 + const char *pdev_name, 121 + struct regulator_config config); 122 + int (*ldo_register)(struct palmas_pmic *pmic, 123 + struct palmas_pmic_driver_data *ddata, 124 + struct palmas_pmic_platform_data *pdata, 125 + const char *pdev_name, 126 + struct regulator_config config); 93 127 }; 94 128 95 129 struct palmas_gpadc_platform_data { ··· 230 184 PALMAS_NUM_REGS, 231 185 }; 232 186 187 + enum tps65917_regulators { 188 + /* SMPS regulators */ 189 + TPS65917_REG_SMPS1, 190 + TPS65917_REG_SMPS2, 191 + TPS65917_REG_SMPS3, 192 + TPS65917_REG_SMPS4, 193 + TPS65917_REG_SMPS5, 194 + /* LDO regulators */ 195 + TPS65917_REG_LDO1, 196 + TPS65917_REG_LDO2, 197 + TPS65917_REG_LDO3, 198 + TPS65917_REG_LDO4, 199 + TPS65917_REG_LDO5, 200 + TPS65917_REG_REGEN1, 201 + TPS65917_REG_REGEN2, 202 + TPS65917_REG_REGEN3, 203 + 204 + /* Total number of regulators */ 205 + TPS65917_NUM_REGS, 206 + }; 207 + 233 208 /* External controll signal name */ 234 209 enum { 235 210 PALMAS_EXT_CONTROL_ENABLE1 = 0x1, ··· 293 226 294 227 /* Last entry */ 295 228 PALMAS_EXTERNAL_REQSTR_ID_MAX, 229 + }; 230 + 231 + enum tps65917_external_requestor_id { 232 + TPS65917_EXTERNAL_REQSTR_ID_REGEN1, 233 + TPS65917_EXTERNAL_REQSTR_ID_REGEN2, 234 + TPS65917_EXTERNAL_REQSTR_ID_REGEN3, 235 + TPS65917_EXTERNAL_REQSTR_ID_SMPS1, 236 + TPS65917_EXTERNAL_REQSTR_ID_SMPS2, 237 + TPS65917_EXTERNAL_REQSTR_ID_SMPS3, 238 + TPS65917_EXTERNAL_REQSTR_ID_SMPS4, 239 + TPS65917_EXTERNAL_REQSTR_ID_SMPS5, 240 + TPS65917_EXTERNAL_REQSTR_ID_LDO1, 241 + TPS65917_EXTERNAL_REQSTR_ID_LDO2, 242 + TPS65917_EXTERNAL_REQSTR_ID_LDO3, 243 + TPS65917_EXTERNAL_REQSTR_ID_LDO4, 244 + TPS65917_EXTERNAL_REQSTR_ID_LDO5, 245 + /* Last entry */ 246 + TPS65917_EXTERNAL_REQSTR_ID_MAX, 296 247 }; 297 248 298 249 struct palmas_pmic_platform_data { ··· 434 349 435 350 #define PALMAS_MAX_CHANNELS 16 436 351 352 + /* Define the tps65917 IRQ numbers */ 353 + enum tps65917_irqs { 354 + /* INT1 registers */ 355 + TPS65917_RESERVED1, 356 + TPS65917_PWRON_IRQ, 357 + TPS65917_LONG_PRESS_KEY_IRQ, 358 + TPS65917_RESERVED2, 359 + TPS65917_PWRDOWN_IRQ, 360 + TPS65917_HOTDIE_IRQ, 361 + TPS65917_VSYS_MON_IRQ, 362 + TPS65917_RESERVED3, 363 + /* INT2 registers */ 364 + TPS65917_RESERVED4, 365 + TPS65917_OTP_ERROR_IRQ, 366 + TPS65917_WDT_IRQ, 367 + TPS65917_RESERVED5, 368 + TPS65917_RESET_IN_IRQ, 369 + TPS65917_FSD_IRQ, 370 + TPS65917_SHORT_IRQ, 371 + TPS65917_RESERVED6, 372 + /* INT3 registers */ 373 + TPS65917_GPADC_AUTO_0_IRQ, 374 + TPS65917_GPADC_AUTO_1_IRQ, 375 + TPS65917_GPADC_EOC_SW_IRQ, 376 + TPS65917_RESREVED6, 377 + TPS65917_RESERVED7, 378 + TPS65917_RESERVED8, 379 + TPS65917_RESERVED9, 380 + TPS65917_VBUS_IRQ, 381 + /* INT4 registers */ 382 + TPS65917_GPIO_0_IRQ, 383 + TPS65917_GPIO_1_IRQ, 384 + TPS65917_GPIO_2_IRQ, 385 + TPS65917_GPIO_3_IRQ, 386 + TPS65917_GPIO_4_IRQ, 387 + TPS65917_GPIO_5_IRQ, 388 + TPS65917_GPIO_6_IRQ, 389 + TPS65917_RESERVED10, 390 + /* Total Number IRQs */ 391 + TPS65917_NUM_IRQ, 392 + }; 393 + 437 394 /* Define the palmas IRQ numbers */ 438 395 enum palmas_irqs { 439 396 /* INT1 registers */ ··· 527 400 528 401 int smps123; 529 402 int smps457; 403 + int smps12; 530 404 531 405 int range[PALMAS_REG_SMPS10_OUT1]; 532 406 unsigned int ramp_delay[PALMAS_REG_SMPS10_OUT1]; ··· 2998 2870 #define PALMAS_GPADC_TRIM14 0x0D 2999 2871 #define PALMAS_GPADC_TRIM15 0x0E 3000 2872 #define PALMAS_GPADC_TRIM16 0x0F 2873 + 2874 + /* TPS65917 Interrupt registers */ 2875 + 2876 + /* Registers for function INTERRUPT */ 2877 + #define TPS65917_INT1_STATUS 0x00 2878 + #define TPS65917_INT1_MASK 0x01 2879 + #define TPS65917_INT1_LINE_STATE 0x02 2880 + #define TPS65917_INT2_STATUS 0x05 2881 + #define TPS65917_INT2_MASK 0x06 2882 + #define TPS65917_INT2_LINE_STATE 0x07 2883 + #define TPS65917_INT3_STATUS 0x0A 2884 + #define TPS65917_INT3_MASK 0x0B 2885 + #define TPS65917_INT3_LINE_STATE 0x0C 2886 + #define TPS65917_INT4_STATUS 0x0F 2887 + #define TPS65917_INT4_MASK 0x10 2888 + #define TPS65917_INT4_LINE_STATE 0x11 2889 + #define TPS65917_INT4_EDGE_DETECT1 0x12 2890 + #define TPS65917_INT4_EDGE_DETECT2 0x13 2891 + #define TPS65917_INT_CTRL 0x14 2892 + 2893 + /* Bit definitions for INT1_STATUS */ 2894 + #define TPS65917_INT1_STATUS_VSYS_MON 0x40 2895 + #define TPS65917_INT1_STATUS_VSYS_MON_SHIFT 0x06 2896 + #define TPS65917_INT1_STATUS_HOTDIE 0x20 2897 + #define TPS65917_INT1_STATUS_HOTDIE_SHIFT 0x05 2898 + #define TPS65917_INT1_STATUS_PWRDOWN 0x10 2899 + #define TPS65917_INT1_STATUS_PWRDOWN_SHIFT 0x04 2900 + #define TPS65917_INT1_STATUS_LONG_PRESS_KEY 0x04 2901 + #define TPS65917_INT1_STATUS_LONG_PRESS_KEY_SHIFT 0x02 2902 + #define TPS65917_INT1_STATUS_PWRON 0x02 2903 + #define TPS65917_INT1_STATUS_PWRON_SHIFT 0x01 2904 + 2905 + /* Bit definitions for INT1_MASK */ 2906 + #define TPS65917_INT1_MASK_VSYS_MON 0x40 2907 + #define TPS65917_INT1_MASK_VSYS_MON_SHIFT 0x06 2908 + #define TPS65917_INT1_MASK_HOTDIE 0x20 2909 + #define TPS65917_INT1_MASK_HOTDIE_SHIFT 0x05 2910 + #define TPS65917_INT1_MASK_PWRDOWN 0x10 2911 + #define TPS65917_INT1_MASK_PWRDOWN_SHIFT 0x04 2912 + #define TPS65917_INT1_MASK_LONG_PRESS_KEY 0x04 2913 + #define TPS65917_INT1_MASK_LONG_PRESS_KEY_SHIFT 0x02 2914 + #define TPS65917_INT1_MASK_PWRON 0x02 2915 + #define TPS65917_INT1_MASK_PWRON_SHIFT 0x01 2916 + 2917 + /* Bit definitions for INT1_LINE_STATE */ 2918 + #define TPS65917_INT1_LINE_STATE_VSYS_MON 0x40 2919 + #define TPS65917_INT1_LINE_STATE_VSYS_MON_SHIFT 0x06 2920 + #define TPS65917_INT1_LINE_STATE_HOTDIE 0x20 2921 + #define TPS65917_INT1_LINE_STATE_HOTDIE_SHIFT 0x05 2922 + #define TPS65917_INT1_LINE_STATE_PWRDOWN 0x10 2923 + #define TPS65917_INT1_LINE_STATE_PWRDOWN_SHIFT 0x04 2924 + #define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY 0x04 2925 + #define TPS65917_INT1_LINE_STATE_LONG_PRESS_KEY_SHIFT 0x02 2926 + #define TPS65917_INT1_LINE_STATE_PWRON 0x02 2927 + #define TPS65917_INT1_LINE_STATE_PWRON_SHIFT 0x01 2928 + 2929 + /* Bit definitions for INT2_STATUS */ 2930 + #define TPS65917_INT2_STATUS_SHORT 0x40 2931 + #define TPS65917_INT2_STATUS_SHORT_SHIFT 0x06 2932 + #define TPS65917_INT2_STATUS_FSD 0x20 2933 + #define TPS65917_INT2_STATUS_FSD_SHIFT 0x05 2934 + #define TPS65917_INT2_STATUS_RESET_IN 0x10 2935 + #define TPS65917_INT2_STATUS_RESET_IN_SHIFT 0x04 2936 + #define TPS65917_INT2_STATUS_WDT 0x04 2937 + #define TPS65917_INT2_STATUS_WDT_SHIFT 0x02 2938 + #define TPS65917_INT2_STATUS_OTP_ERROR 0x02 2939 + #define TPS65917_INT2_STATUS_OTP_ERROR_SHIFT 0x01 2940 + 2941 + /* Bit definitions for INT2_MASK */ 2942 + #define TPS65917_INT2_MASK_SHORT 0x40 2943 + #define TPS65917_INT2_MASK_SHORT_SHIFT 0x06 2944 + #define TPS65917_INT2_MASK_FSD 0x20 2945 + #define TPS65917_INT2_MASK_FSD_SHIFT 0x05 2946 + #define TPS65917_INT2_MASK_RESET_IN 0x10 2947 + #define TPS65917_INT2_MASK_RESET_IN_SHIFT 0x04 2948 + #define TPS65917_INT2_MASK_WDT 0x04 2949 + #define TPS65917_INT2_MASK_WDT_SHIFT 0x02 2950 + #define TPS65917_INT2_MASK_OTP_ERROR_TIMER 0x02 2951 + #define TPS65917_INT2_MASK_OTP_ERROR_SHIFT 0x01 2952 + 2953 + /* Bit definitions for INT2_LINE_STATE */ 2954 + #define TPS65917_INT2_LINE_STATE_SHORT 0x40 2955 + #define TPS65917_INT2_LINE_STATE_SHORT_SHIFT 0x06 2956 + #define TPS65917_INT2_LINE_STATE_FSD 0x20 2957 + #define TPS65917_INT2_LINE_STATE_FSD_SHIFT 0x05 2958 + #define TPS65917_INT2_LINE_STATE_RESET_IN 0x10 2959 + #define TPS65917_INT2_LINE_STATE_RESET_IN_SHIFT 0x04 2960 + #define TPS65917_INT2_LINE_STATE_WDT 0x04 2961 + #define TPS65917_INT2_LINE_STATE_WDT_SHIFT 0x02 2962 + #define TPS65917_INT2_LINE_STATE_OTP_ERROR 0x02 2963 + #define TPS65917_INT2_LINE_STATE_OTP_ERROR_SHIFT 0x01 2964 + 2965 + /* Bit definitions for INT3_STATUS */ 2966 + #define TPS65917_INT3_STATUS_VBUS 0x80 2967 + #define TPS65917_INT3_STATUS_VBUS_SHIFT 0x07 2968 + #define TPS65917_INT3_STATUS_GPADC_EOC_SW 0x04 2969 + #define TPS65917_INT3_STATUS_GPADC_EOC_SW_SHIFT 0x02 2970 + #define TPS65917_INT3_STATUS_GPADC_AUTO_1 0x02 2971 + #define TPS65917_INT3_STATUS_GPADC_AUTO_1_SHIFT 0x01 2972 + #define TPS65917_INT3_STATUS_GPADC_AUTO_0 0x01 2973 + #define TPS65917_INT3_STATUS_GPADC_AUTO_0_SHIFT 0x00 2974 + 2975 + /* Bit definitions for INT3_MASK */ 2976 + #define TPS65917_INT3_MASK_VBUS 0x80 2977 + #define TPS65917_INT3_MASK_VBUS_SHIFT 0x07 2978 + #define TPS65917_INT3_MASK_GPADC_EOC_SW 0x04 2979 + #define TPS65917_INT3_MASK_GPADC_EOC_SW_SHIFT 0x02 2980 + #define TPS65917_INT3_MASK_GPADC_AUTO_1 0x02 2981 + #define TPS65917_INT3_MASK_GPADC_AUTO_1_SHIFT 0x01 2982 + #define TPS65917_INT3_MASK_GPADC_AUTO_0 0x01 2983 + #define TPS65917_INT3_MASK_GPADC_AUTO_0_SHIFT 0x00 2984 + 2985 + /* Bit definitions for INT3_LINE_STATE */ 2986 + #define TPS65917_INT3_LINE_STATE_VBUS 0x80 2987 + #define TPS65917_INT3_LINE_STATE_VBUS_SHIFT 0x07 2988 + #define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW 0x04 2989 + #define TPS65917_INT3_LINE_STATE_GPADC_EOC_SW_SHIFT 0x02 2990 + #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1 0x02 2991 + #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_1_SHIFT 0x01 2992 + #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0 0x01 2993 + #define TPS65917_INT3_LINE_STATE_GPADC_AUTO_0_SHIFT 0x00 2994 + 2995 + /* Bit definitions for INT4_STATUS */ 2996 + #define TPS65917_INT4_STATUS_GPIO_6 0x40 2997 + #define TPS65917_INT4_STATUS_GPIO_6_SHIFT 0x06 2998 + #define TPS65917_INT4_STATUS_GPIO_5 0x20 2999 + #define TPS65917_INT4_STATUS_GPIO_5_SHIFT 0x05 3000 + #define TPS65917_INT4_STATUS_GPIO_4 0x10 3001 + #define TPS65917_INT4_STATUS_GPIO_4_SHIFT 0x04 3002 + #define TPS65917_INT4_STATUS_GPIO_3 0x08 3003 + #define TPS65917_INT4_STATUS_GPIO_3_SHIFT 0x03 3004 + #define TPS65917_INT4_STATUS_GPIO_2 0x04 3005 + #define TPS65917_INT4_STATUS_GPIO_2_SHIFT 0x02 3006 + #define TPS65917_INT4_STATUS_GPIO_1 0x02 3007 + #define TPS65917_INT4_STATUS_GPIO_1_SHIFT 0x01 3008 + #define TPS65917_INT4_STATUS_GPIO_0 0x01 3009 + #define TPS65917_INT4_STATUS_GPIO_0_SHIFT 0x00 3010 + 3011 + /* Bit definitions for INT4_MASK */ 3012 + #define TPS65917_INT4_MASK_GPIO_6 0x40 3013 + #define TPS65917_INT4_MASK_GPIO_6_SHIFT 0x06 3014 + #define TPS65917_INT4_MASK_GPIO_5 0x20 3015 + #define TPS65917_INT4_MASK_GPIO_5_SHIFT 0x05 3016 + #define TPS65917_INT4_MASK_GPIO_4 0x10 3017 + #define TPS65917_INT4_MASK_GPIO_4_SHIFT 0x04 3018 + #define TPS65917_INT4_MASK_GPIO_3 0x08 3019 + #define TPS65917_INT4_MASK_GPIO_3_SHIFT 0x03 3020 + #define TPS65917_INT4_MASK_GPIO_2 0x04 3021 + #define TPS65917_INT4_MASK_GPIO_2_SHIFT 0x02 3022 + #define TPS65917_INT4_MASK_GPIO_1 0x02 3023 + #define TPS65917_INT4_MASK_GPIO_1_SHIFT 0x01 3024 + #define TPS65917_INT4_MASK_GPIO_0 0x01 3025 + #define TPS65917_INT4_MASK_GPIO_0_SHIFT 0x00 3026 + 3027 + /* Bit definitions for INT4_LINE_STATE */ 3028 + #define TPS65917_INT4_LINE_STATE_GPIO_6 0x40 3029 + #define TPS65917_INT4_LINE_STATE_GPIO_6_SHIFT 0x06 3030 + #define TPS65917_INT4_LINE_STATE_GPIO_5 0x20 3031 + #define TPS65917_INT4_LINE_STATE_GPIO_5_SHIFT 0x05 3032 + #define TPS65917_INT4_LINE_STATE_GPIO_4 0x10 3033 + #define TPS65917_INT4_LINE_STATE_GPIO_4_SHIFT 0x04 3034 + #define TPS65917_INT4_LINE_STATE_GPIO_3 0x08 3035 + #define TPS65917_INT4_LINE_STATE_GPIO_3_SHIFT 0x03 3036 + #define TPS65917_INT4_LINE_STATE_GPIO_2 0x04 3037 + #define TPS65917_INT4_LINE_STATE_GPIO_2_SHIFT 0x02 3038 + #define TPS65917_INT4_LINE_STATE_GPIO_1 0x02 3039 + #define TPS65917_INT4_LINE_STATE_GPIO_1_SHIFT 0x01 3040 + #define TPS65917_INT4_LINE_STATE_GPIO_0 0x01 3041 + #define TPS65917_INT4_LINE_STATE_GPIO_0_SHIFT 0x00 3042 + 3043 + /* Bit definitions for INT4_EDGE_DETECT1 */ 3044 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING 0x80 3045 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_RISING_SHIFT 0x07 3046 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING 0x40 3047 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_3_FALLING_SHIFT 0x06 3048 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING 0x20 3049 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_RISING_SHIFT 0x05 3050 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING 0x10 3051 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_2_FALLING_SHIFT 0x04 3052 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING 0x08 3053 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_RISING_SHIFT 0x03 3054 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING 0x04 3055 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_1_FALLING_SHIFT 0x02 3056 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING 0x02 3057 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_RISING_SHIFT 0x01 3058 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING 0x01 3059 + #define TPS65917_INT4_EDGE_DETECT1_GPIO_0_FALLING_SHIFT 0x00 3060 + 3061 + /* Bit definitions for INT4_EDGE_DETECT2 */ 3062 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING 0x20 3063 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_RISING_SHIFT 0x05 3064 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING 0x10 3065 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_6_FALLING_SHIFT 0x04 3066 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING 0x08 3067 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_RISING_SHIFT 0x03 3068 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING 0x04 3069 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_5_FALLING_SHIFT 0x02 3070 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING 0x02 3071 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_RISING_SHIFT 0x01 3072 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING 0x01 3073 + #define TPS65917_INT4_EDGE_DETECT2_GPIO_4_FALLING_SHIFT 0x00 3074 + 3075 + /* Bit definitions for INT_CTRL */ 3076 + #define TPS65917_INT_CTRL_INT_PENDING 0x04 3077 + #define TPS65917_INT_CTRL_INT_PENDING_SHIFT 0x02 3078 + #define TPS65917_INT_CTRL_INT_CLEAR 0x01 3079 + #define TPS65917_INT_CTRL_INT_CLEAR_SHIFT 0x00 3080 + 3081 + /* TPS65917 SMPS Registers */ 3082 + 3083 + /* Registers for function SMPS */ 3084 + #define TPS65917_SMPS1_CTRL 0x00 3085 + #define TPS65917_SMPS1_FORCE 0x02 3086 + #define TPS65917_SMPS1_VOLTAGE 0x03 3087 + #define TPS65917_SMPS2_CTRL 0x04 3088 + #define TPS65917_SMPS2_FORCE 0x06 3089 + #define TPS65917_SMPS2_VOLTAGE 0x07 3090 + #define TPS65917_SMPS3_CTRL 0x0C 3091 + #define TPS65917_SMPS3_FORCE 0x0E 3092 + #define TPS65917_SMPS3_VOLTAGE 0x0F 3093 + #define TPS65917_SMPS4_CTRL 0x10 3094 + #define TPS65917_SMPS4_VOLTAGE 0x13 3095 + #define TPS65917_SMPS5_CTRL 0x18 3096 + #define TPS65917_SMPS5_VOLTAGE 0x1B 3097 + #define TPS65917_SMPS_CTRL 0x24 3098 + #define TPS65917_SMPS_PD_CTRL 0x25 3099 + #define TPS65917_SMPS_THERMAL_EN 0x27 3100 + #define TPS65917_SMPS_THERMAL_STATUS 0x28 3101 + #define TPS65917_SMPS_SHORT_STATUS 0x29 3102 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN 0x2A 3103 + #define TPS65917_SMPS_POWERGOOD_MASK1 0x2B 3104 + #define TPS65917_SMPS_POWERGOOD_MASK2 0x2C 3105 + 3106 + /* Bit definitions for SMPS1_CTRL */ 3107 + #define TPS65917_SMPS1_CTRL_WR_S 0x80 3108 + #define TPS65917_SMPS1_CTRL_WR_S_SHIFT 0x07 3109 + #define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN 0x40 3110 + #define TPS65917_SMPS1_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 3111 + #define TPS65917_SMPS1_CTRL_STATUS_MASK 0x30 3112 + #define TPS65917_SMPS1_CTRL_STATUS_SHIFT 0x04 3113 + #define TPS65917_SMPS1_CTRL_MODE_SLEEP_MASK 0x0C 3114 + #define TPS65917_SMPS1_CTRL_MODE_SLEEP_SHIFT 0x02 3115 + #define TPS65917_SMPS1_CTRL_MODE_ACTIVE_MASK 0x03 3116 + #define TPS65917_SMPS1_CTRL_MODE_ACTIVE_SHIFT 0x00 3117 + 3118 + /* Bit definitions for SMPS1_FORCE */ 3119 + #define TPS65917_SMPS1_FORCE_CMD 0x80 3120 + #define TPS65917_SMPS1_FORCE_CMD_SHIFT 0x07 3121 + #define TPS65917_SMPS1_FORCE_VSEL_MASK 0x7F 3122 + #define TPS65917_SMPS1_FORCE_VSEL_SHIFT 0x00 3123 + 3124 + /* Bit definitions for SMPS1_VOLTAGE */ 3125 + #define TPS65917_SMPS1_VOLTAGE_RANGE 0x80 3126 + #define TPS65917_SMPS1_VOLTAGE_RANGE_SHIFT 0x07 3127 + #define TPS65917_SMPS1_VOLTAGE_VSEL_MASK 0x7F 3128 + #define TPS65917_SMPS1_VOLTAGE_VSEL_SHIFT 0x00 3129 + 3130 + /* Bit definitions for SMPS2_CTRL */ 3131 + #define TPS65917_SMPS2_CTRL_WR_S 0x80 3132 + #define TPS65917_SMPS2_CTRL_WR_S_SHIFT 0x07 3133 + #define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN 0x40 3134 + #define TPS65917_SMPS2_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 3135 + #define TPS65917_SMPS2_CTRL_STATUS_MASK 0x30 3136 + #define TPS65917_SMPS2_CTRL_STATUS_SHIFT 0x04 3137 + #define TPS65917_SMPS2_CTRL_MODE_SLEEP_MASK 0x0C 3138 + #define TPS65917_SMPS2_CTRL_MODE_SLEEP_SHIFT 0x02 3139 + #define TPS65917_SMPS2_CTRL_MODE_ACTIVE_MASK 0x03 3140 + #define TPS65917_SMPS2_CTRL_MODE_ACTIVE_SHIFT 0x00 3141 + 3142 + /* Bit definitions for SMPS2_FORCE */ 3143 + #define TPS65917_SMPS2_FORCE_CMD 0x80 3144 + #define TPS65917_SMPS2_FORCE_CMD_SHIFT 0x07 3145 + #define TPS65917_SMPS2_FORCE_VSEL_MASK 0x7F 3146 + #define TPS65917_SMPS2_FORCE_VSEL_SHIFT 0x00 3147 + 3148 + /* Bit definitions for SMPS2_VOLTAGE */ 3149 + #define TPS65917_SMPS2_VOLTAGE_RANGE 0x80 3150 + #define TPS65917_SMPS2_VOLTAGE_RANGE_SHIFT 0x07 3151 + #define TPS65917_SMPS2_VOLTAGE_VSEL_MASK 0x7F 3152 + #define TPS65917_SMPS2_VOLTAGE_VSEL_SHIFT 0x00 3153 + 3154 + /* Bit definitions for SMPS3_CTRL */ 3155 + #define TPS65917_SMPS3_CTRL_WR_S 0x80 3156 + #define TPS65917_SMPS3_CTRL_WR_S_SHIFT 0x07 3157 + #define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN 0x40 3158 + #define TPS65917_SMPS3_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 3159 + #define TPS65917_SMPS3_CTRL_STATUS_MASK 0x30 3160 + #define TPS65917_SMPS3_CTRL_STATUS_SHIFT 0x04 3161 + #define TPS65917_SMPS3_CTRL_MODE_SLEEP_MASK 0x0C 3162 + #define TPS65917_SMPS3_CTRL_MODE_SLEEP_SHIFT 0x02 3163 + #define TPS65917_SMPS3_CTRL_MODE_ACTIVE_MASK 0x03 3164 + #define TPS65917_SMPS3_CTRL_MODE_ACTIVE_SHIFT 0x00 3165 + 3166 + /* Bit definitions for SMPS3_FORCE */ 3167 + #define TPS65917_SMPS3_FORCE_CMD 0x80 3168 + #define TPS65917_SMPS3_FORCE_CMD_SHIFT 0x07 3169 + #define TPS65917_SMPS3_FORCE_VSEL_MASK 0x7F 3170 + #define TPS65917_SMPS3_FORCE_VSEL_SHIFT 0x00 3171 + 3172 + /* Bit definitions for SMPS3_VOLTAGE */ 3173 + #define TPS65917_SMPS3_VOLTAGE_RANGE 0x80 3174 + #define TPS65917_SMPS3_VOLTAGE_RANGE_SHIFT 0x07 3175 + #define TPS65917_SMPS3_VOLTAGE_VSEL_MASK 0x7F 3176 + #define TPS65917_SMPS3_VOLTAGE_VSEL_SHIFT 0x00 3177 + 3178 + /* Bit definitions for SMPS4_CTRL */ 3179 + #define TPS65917_SMPS4_CTRL_WR_S 0x80 3180 + #define TPS65917_SMPS4_CTRL_WR_S_SHIFT 0x07 3181 + #define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN 0x40 3182 + #define TPS65917_SMPS4_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 3183 + #define TPS65917_SMPS4_CTRL_STATUS_MASK 0x30 3184 + #define TPS65917_SMPS4_CTRL_STATUS_SHIFT 0x04 3185 + #define TPS65917_SMPS4_CTRL_MODE_SLEEP_MASK 0x0C 3186 + #define TPS65917_SMPS4_CTRL_MODE_SLEEP_SHIFT 0x02 3187 + #define TPS65917_SMPS4_CTRL_MODE_ACTIVE_MASK 0x03 3188 + #define TPS65917_SMPS4_CTRL_MODE_ACTIVE_SHIFT 0x00 3189 + 3190 + /* Bit definitions for SMPS4_VOLTAGE */ 3191 + #define TPS65917_SMPS4_VOLTAGE_RANGE 0x80 3192 + #define TPS65917_SMPS4_VOLTAGE_RANGE_SHIFT 0x07 3193 + #define TPS65917_SMPS4_VOLTAGE_VSEL_MASK 0x7F 3194 + #define TPS65917_SMPS4_VOLTAGE_VSEL_SHIFT 0x00 3195 + 3196 + /* Bit definitions for SMPS5_CTRL */ 3197 + #define TPS65917_SMPS5_CTRL_WR_S 0x80 3198 + #define TPS65917_SMPS5_CTRL_WR_S_SHIFT 0x07 3199 + #define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN 0x40 3200 + #define TPS65917_SMPS5_CTRL_ROOF_FLOOR_EN_SHIFT 0x06 3201 + #define TPS65917_SMPS5_CTRL_STATUS_MASK 0x30 3202 + #define TPS65917_SMPS5_CTRL_STATUS_SHIFT 0x04 3203 + #define TPS65917_SMPS5_CTRL_MODE_SLEEP_MASK 0x0C 3204 + #define TPS65917_SMPS5_CTRL_MODE_SLEEP_SHIFT 0x02 3205 + #define TPS65917_SMPS5_CTRL_MODE_ACTIVE_MASK 0x03 3206 + #define TPS65917_SMPS5_CTRL_MODE_ACTIVE_SHIFT 0x00 3207 + 3208 + /* Bit definitions for SMPS5_VOLTAGE */ 3209 + #define TPS65917_SMPS5_VOLTAGE_RANGE 0x80 3210 + #define TPS65917_SMPS5_VOLTAGE_RANGE_SHIFT 0x07 3211 + #define TPS65917_SMPS5_VOLTAGE_VSEL_MASK 0x7F 3212 + #define TPS65917_SMPS5_VOLTAGE_VSEL_SHIFT 0x00 3213 + 3214 + /* Bit definitions for SMPS_CTRL */ 3215 + #define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN 0x10 3216 + #define TPS65917_SMPS_CTRL_SMPS1_SMPS12_EN_SHIFT 0x04 3217 + #define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL 0x03 3218 + #define TPS65917_SMPS_CTRL_SMPS12_PHASE_CTRL_SHIFT 0x00 3219 + 3220 + /* Bit definitions for SMPS_PD_CTRL */ 3221 + #define TPS65917_SMPS_PD_CTRL_SMPS5 0x40 3222 + #define TPS65917_SMPS_PD_CTRL_SMPS5_SHIFT 0x06 3223 + #define TPS65917_SMPS_PD_CTRL_SMPS4 0x10 3224 + #define TPS65917_SMPS_PD_CTRL_SMPS4_SHIFT 0x04 3225 + #define TPS65917_SMPS_PD_CTRL_SMPS3 0x08 3226 + #define TPS65917_SMPS_PD_CTRL_SMPS3_SHIFT 0x03 3227 + #define TPS65917_SMPS_PD_CTRL_SMPS2 0x02 3228 + #define TPS65917_SMPS_PD_CTRL_SMPS2_SHIFT 0x01 3229 + #define TPS65917_SMPS_PD_CTRL_SMPS1 0x01 3230 + #define TPS65917_SMPS_PD_CTRL_SMPS1_SHIFT 0x00 3231 + 3232 + /* Bit definitions for SMPS_THERMAL_EN */ 3233 + #define TPS65917_SMPS_THERMAL_EN_SMPS5 0x40 3234 + #define TPS65917_SMPS_THERMAL_EN_SMPS5_SHIFT 0x06 3235 + #define TPS65917_SMPS_THERMAL_EN_SMPS3 0x08 3236 + #define TPS65917_SMPS_THERMAL_EN_SMPS3_SHIFT 0x03 3237 + #define TPS65917_SMPS_THERMAL_EN_SMPS12 0x01 3238 + #define TPS65917_SMPS_THERMAL_EN_SMPS12_SHIFT 0x00 3239 + 3240 + /* Bit definitions for SMPS_THERMAL_STATUS */ 3241 + #define TPS65917_SMPS_THERMAL_STATUS_SMPS5 0x40 3242 + #define TPS65917_SMPS_THERMAL_STATUS_SMPS5_SHIFT 0x06 3243 + #define TPS65917_SMPS_THERMAL_STATUS_SMPS3 0x08 3244 + #define TPS65917_SMPS_THERMAL_STATUS_SMPS3_SHIFT 0x03 3245 + #define TPS65917_SMPS_THERMAL_STATUS_SMPS12 0x01 3246 + #define TPS65917_SMPS_THERMAL_STATUS_SMPS12_SHIFT 0x00 3247 + 3248 + /* Bit definitions for SMPS_SHORT_STATUS */ 3249 + #define TPS65917_SMPS_SHORT_STATUS_SMPS5 0x40 3250 + #define TPS65917_SMPS_SHORT_STATUS_SMPS5_SHIFT 0x06 3251 + #define TPS65917_SMPS_SHORT_STATUS_SMPS4 0x10 3252 + #define TPS65917_SMPS_SHORT_STATUS_SMPS4_SHIFT 0x04 3253 + #define TPS65917_SMPS_SHORT_STATUS_SMPS3 0x08 3254 + #define TPS65917_SMPS_SHORT_STATUS_SMPS3_SHIFT 0x03 3255 + #define TPS65917_SMPS_SHORT_STATUS_SMPS2 0x02 3256 + #define TPS65917_SMPS_SHORT_STATUS_SMPS2_SHIFT 0x01 3257 + #define TPS65917_SMPS_SHORT_STATUS_SMPS1 0x01 3258 + #define TPS65917_SMPS_SHORT_STATUS_SMPS1_SHIFT 0x00 3259 + 3260 + /* Bit definitions for SMPS_NEGATIVE_CURRENT_LIMIT_EN */ 3261 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5 0x40 3262 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS5_SHIFT 0x06 3263 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4 0x10 3264 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS4_SHIFT 0x04 3265 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3 0x08 3266 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS3_SHIFT 0x03 3267 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2 0x02 3268 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS2_SHIFT 0x01 3269 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1 0x01 3270 + #define TPS65917_SMPS_NEGATIVE_CURRENT_LIMIT_EN_SMPS1_SHIFT 0x00 3271 + 3272 + /* Bit definitions for SMPS_POWERGOOD_MASK1 */ 3273 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5 0x40 3274 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS5_SHIFT 0x06 3275 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4 0x10 3276 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS4_SHIFT 0x04 3277 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3 0x08 3278 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS3_SHIFT 0x03 3279 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2 0x02 3280 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS2_SHIFT 0x01 3281 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1 0x01 3282 + #define TPS65917_SMPS_POWERGOOD_MASK1_SMPS1_SHIFT 0x00 3283 + 3284 + /* Bit definitions for SMPS_POWERGOOD_MASK2 */ 3285 + #define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT 0x80 3286 + #define TPS65917_SMPS_POWERGOOD_MASK2_POWERGOOD_TYPE_SELECT_SHIFT 0x07 3287 + #define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM_SHIFT 0x10 3288 + #define TPS65917_SMPS_POWERGOOD_MASK2_OVC_ALARM 0x04 3289 + 3290 + /* Bit definitions for SMPS_PLL_CTRL */ 3291 + 3292 + #define TPS65917_SMPS_PLL_CTRL_PLL_EN_PLL_BYPASS_SHIFT 0x08 3293 + #define TPS65917_SMPS_PLL_CTRL_PLL_PLL_EN_BYPASS 0x03 3294 + #define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK_SHIFT 0x04 3295 + #define TPS65917_SMPS_PLL_CTRL_PLL_PLL_BYPASS_CLK 0x02 3296 + 3297 + /* Registers for function LDO */ 3298 + #define TPS65917_LDO1_CTRL 0x00 3299 + #define TPS65917_LDO1_VOLTAGE 0x01 3300 + #define TPS65917_LDO2_CTRL 0x02 3301 + #define TPS65917_LDO2_VOLTAGE 0x03 3302 + #define TPS65917_LDO3_CTRL 0x04 3303 + #define TPS65917_LDO3_VOLTAGE 0x05 3304 + #define TPS65917_LDO4_CTRL 0x0E 3305 + #define TPS65917_LDO4_VOLTAGE 0x0F 3306 + #define TPS65917_LDO5_CTRL 0x12 3307 + #define TPS65917_LDO5_VOLTAGE 0x13 3308 + #define TPS65917_LDO_PD_CTRL1 0x1B 3309 + #define TPS65917_LDO_PD_CTRL2 0x1C 3310 + #define TPS65917_LDO_SHORT_STATUS1 0x1D 3311 + #define TPS65917_LDO_SHORT_STATUS2 0x1E 3312 + #define TPS65917_LDO_PD_CTRL3 0x2D 3313 + #define TPS65917_LDO_SHORT_STATUS3 0x2E 3314 + 3315 + /* Bit definitions for LDO1_CTRL */ 3316 + #define TPS65917_LDO1_CTRL_WR_S 0x80 3317 + #define TPS65917_LDO1_CTRL_WR_S_SHIFT 0x07 3318 + #define TPS65917_LDO1_CTRL_BYPASS_EN 0x40 3319 + #define TPS65917_LDO1_CTRL_BYPASS_EN_SHIFT 0x06 3320 + #define TPS65917_LDO1_CTRL_STATUS 0x10 3321 + #define TPS65917_LDO1_CTRL_STATUS_SHIFT 0x04 3322 + #define TPS65917_LDO1_CTRL_MODE_SLEEP 0x04 3323 + #define TPS65917_LDO1_CTRL_MODE_SLEEP_SHIFT 0x02 3324 + #define TPS65917_LDO1_CTRL_MODE_ACTIVE 0x01 3325 + #define TPS65917_LDO1_CTRL_MODE_ACTIVE_SHIFT 0x00 3326 + 3327 + /* Bit definitions for LDO1_VOLTAGE */ 3328 + #define TPS65917_LDO1_VOLTAGE_VSEL_MASK 0x2F 3329 + #define TPS65917_LDO1_VOLTAGE_VSEL_SHIFT 0x00 3330 + 3331 + /* Bit definitions for LDO2_CTRL */ 3332 + #define TPS65917_LDO2_CTRL_WR_S 0x80 3333 + #define TPS65917_LDO2_CTRL_WR_S_SHIFT 0x07 3334 + #define TPS65917_LDO2_CTRL_BYPASS_EN 0x40 3335 + #define TPS65917_LDO2_CTRL_BYPASS_EN_SHIFT 0x06 3336 + #define TPS65917_LDO2_CTRL_STATUS 0x10 3337 + #define TPS65917_LDO2_CTRL_STATUS_SHIFT 0x04 3338 + #define TPS65917_LDO2_CTRL_MODE_SLEEP 0x04 3339 + #define TPS65917_LDO2_CTRL_MODE_SLEEP_SHIFT 0x02 3340 + #define TPS65917_LDO2_CTRL_MODE_ACTIVE 0x01 3341 + #define TPS65917_LDO2_CTRL_MODE_ACTIVE_SHIFT 0x00 3342 + 3343 + /* Bit definitions for LDO2_VOLTAGE */ 3344 + #define TPS65917_LDO2_VOLTAGE_VSEL_MASK 0x2F 3345 + #define TPS65917_LDO2_VOLTAGE_VSEL_SHIFT 0x00 3346 + 3347 + /* Bit definitions for LDO3_CTRL */ 3348 + #define TPS65917_LDO3_CTRL_WR_S 0x80 3349 + #define TPS65917_LDO3_CTRL_WR_S_SHIFT 0x07 3350 + #define TPS65917_LDO3_CTRL_STATUS 0x10 3351 + #define TPS65917_LDO3_CTRL_STATUS_SHIFT 0x04 3352 + #define TPS65917_LDO3_CTRL_MODE_SLEEP 0x04 3353 + #define TPS65917_LDO3_CTRL_MODE_SLEEP_SHIFT 0x02 3354 + #define TPS65917_LDO3_CTRL_MODE_ACTIVE 0x01 3355 + #define TPS65917_LDO3_CTRL_MODE_ACTIVE_SHIFT 0x00 3356 + 3357 + /* Bit definitions for LDO3_VOLTAGE */ 3358 + #define TPS65917_LDO3_VOLTAGE_VSEL_MASK 0x2F 3359 + #define TPS65917_LDO3_VOLTAGE_VSEL_SHIFT 0x00 3360 + 3361 + /* Bit definitions for LDO4_CTRL */ 3362 + #define TPS65917_LDO4_CTRL_WR_S 0x80 3363 + #define TPS65917_LDO4_CTRL_WR_S_SHIFT 0x07 3364 + #define TPS65917_LDO4_CTRL_STATUS 0x10 3365 + #define TPS65917_LDO4_CTRL_STATUS_SHIFT 0x04 3366 + #define TPS65917_LDO4_CTRL_MODE_SLEEP 0x04 3367 + #define TPS65917_LDO4_CTRL_MODE_SLEEP_SHIFT 0x02 3368 + #define TPS65917_LDO4_CTRL_MODE_ACTIVE 0x01 3369 + #define TPS65917_LDO4_CTRL_MODE_ACTIVE_SHIFT 0x00 3370 + 3371 + /* Bit definitions for LDO4_VOLTAGE */ 3372 + #define TPS65917_LDO4_VOLTAGE_VSEL_MASK 0x2F 3373 + #define TPS65917_LDO4_VOLTAGE_VSEL_SHIFT 0x00 3374 + 3375 + /* Bit definitions for LDO5_CTRL */ 3376 + #define TPS65917_LDO5_CTRL_WR_S 0x80 3377 + #define TPS65917_LDO5_CTRL_WR_S_SHIFT 0x07 3378 + #define TPS65917_LDO5_CTRL_STATUS 0x10 3379 + #define TPS65917_LDO5_CTRL_STATUS_SHIFT 0x04 3380 + #define TPS65917_LDO5_CTRL_MODE_SLEEP 0x04 3381 + #define TPS65917_LDO5_CTRL_MODE_SLEEP_SHIFT 0x02 3382 + #define TPS65917_LDO5_CTRL_MODE_ACTIVE 0x01 3383 + #define TPS65917_LDO5_CTRL_MODE_ACTIVE_SHIFT 0x00 3384 + 3385 + /* Bit definitions for LDO5_VOLTAGE */ 3386 + #define TPS65917_LDO5_VOLTAGE_VSEL_MASK 0x2F 3387 + #define TPS65917_LDO5_VOLTAGE_VSEL_SHIFT 0x00 3388 + 3389 + /* Bit definitions for LDO_PD_CTRL1 */ 3390 + #define TPS65917_LDO_PD_CTRL1_LDO4 0x80 3391 + #define TPS65917_LDO_PD_CTRL1_LDO4_SHIFT 0x07 3392 + #define TPS65917_LDO_PD_CTRL1_LDO2 0x02 3393 + #define TPS65917_LDO_PD_CTRL1_LDO2_SHIFT 0x01 3394 + #define TPS65917_LDO_PD_CTRL1_LDO1 0x01 3395 + #define TPS65917_LDO_PD_CTRL1_LDO1_SHIFT 0x00 3396 + 3397 + /* Bit definitions for LDO_PD_CTRL2 */ 3398 + #define TPS65917_LDO_PD_CTRL2_LDO3 0x04 3399 + #define TPS65917_LDO_PD_CTRL2_LDO3_SHIFT 0x02 3400 + #define TPS65917_LDO_PD_CTRL2_LDO5 0x02 3401 + #define TPS65917_LDO_PD_CTRL2_LDO5_SHIFT 0x01 3402 + 3403 + /* Bit definitions for LDO_PD_CTRL3 */ 3404 + #define TPS65917_LDO_PD_CTRL2_LDOVANA 0x80 3405 + #define TPS65917_LDO_PD_CTRL2_LDOVANA_SHIFT 0x07 3406 + 3407 + /* Bit definitions for LDO_SHORT_STATUS1 */ 3408 + #define TPS65917_LDO_SHORT_STATUS1_LDO4 0x80 3409 + #define TPS65917_LDO_SHORT_STATUS1_LDO4_SHIFT 0x07 3410 + #define TPS65917_LDO_SHORT_STATUS1_LDO2 0x02 3411 + #define TPS65917_LDO_SHORT_STATUS1_LDO2_SHIFT 0x01 3412 + #define TPS65917_LDO_SHORT_STATUS1_LDO1 0x01 3413 + #define TPS65917_LDO_SHORT_STATUS1_LDO1_SHIFT 0x00 3414 + 3415 + /* Bit definitions for LDO_SHORT_STATUS2 */ 3416 + #define TPS65917_LDO_SHORT_STATUS2_LDO3 0x04 3417 + #define TPS65917_LDO_SHORT_STATUS2_LDO3_SHIFT 0x02 3418 + #define TPS65917_LDO_SHORT_STATUS2_LDO5 0x02 3419 + #define TPS65917_LDO_SHORT_STATUS2_LDO5_SHIFT 0x01 3420 + 3421 + /* Bit definitions for LDO_SHORT_STATUS2 */ 3422 + #define TPS65917_LDO_SHORT_STATUS2_LDOVANA 0x80 3423 + #define TPS65917_LDO_SHORT_STATUS2_LDOVANA_SHIFT 0x07 3424 + 3425 + /* Bit definitions for REGEN1_CTRL */ 3426 + #define TPS65917_REGEN1_CTRL_STATUS 0x10 3427 + #define TPS65917_REGEN1_CTRL_STATUS_SHIFT 0x04 3428 + #define TPS65917_REGEN1_CTRL_MODE_SLEEP 0x04 3429 + #define TPS65917_REGEN1_CTRL_MODE_SLEEP_SHIFT 0x02 3430 + #define TPS65917_REGEN1_CTRL_MODE_ACTIVE 0x01 3431 + #define TPS65917_REGEN1_CTRL_MODE_ACTIVE_SHIFT 0x00 3432 + 3433 + /* Bit definitions for PLLEN_CTRL */ 3434 + #define TPS65917_PLLEN_CTRL_STATUS 0x10 3435 + #define TPS65917_PLLEN_CTRL_STATUS_SHIFT 0x04 3436 + #define TPS65917_PLLEN_CTRL_MODE_SLEEP 0x04 3437 + #define TPS65917_PLLEN_CTRL_MODE_SLEEP_SHIFT 0x02 3438 + #define TPS65917_PLLEN_CTRL_MODE_ACTIVE 0x01 3439 + #define TPS65917_PLLEN_CTRL_MODE_ACTIVE_SHIFT 0x00 3440 + 3441 + /* Bit definitions for REGEN2_CTRL */ 3442 + #define TPS65917_REGEN2_CTRL_STATUS 0x10 3443 + #define TPS65917_REGEN2_CTRL_STATUS_SHIFT 0x04 3444 + #define TPS65917_REGEN2_CTRL_MODE_SLEEP 0x04 3445 + #define TPS65917_REGEN2_CTRL_MODE_SLEEP_SHIFT 0x02 3446 + #define TPS65917_REGEN2_CTRL_MODE_ACTIVE 0x01 3447 + #define TPS65917_REGEN2_CTRL_MODE_ACTIVE_SHIFT 0x00 3448 + 3449 + /* Bit definitions for NSLEEP_RES_ASSIGN */ 3450 + #define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN 0x08 3451 + #define TPS65917_NSLEEP_RES_ASSIGN_PLL_EN_SHIFT 0x03 3452 + #define TPS65917_NSLEEP_RES_ASSIGN_REGEN3 0x04 3453 + #define TPS65917_NSLEEP_RES_ASSIGN_REGEN3_SHIFT 0x02 3454 + #define TPS65917_NSLEEP_RES_ASSIGN_REGEN2 0x02 3455 + #define TPS65917_NSLEEP_RES_ASSIGN_REGEN2_SHIFT 0x01 3456 + #define TPS65917_NSLEEP_RES_ASSIGN_REGEN1 0x01 3457 + #define TPS65917_NSLEEP_RES_ASSIGN_REGEN1_SHIFT 0x00 3458 + 3459 + /* Bit definitions for NSLEEP_SMPS_ASSIGN */ 3460 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5 0x40 3461 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS5_SHIFT 0x06 3462 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4 0x10 3463 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS4_SHIFT 0x04 3464 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3 0x08 3465 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS3_SHIFT 0x03 3466 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2 0x02 3467 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS2_SHIFT 0x01 3468 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1 0x01 3469 + #define TPS65917_NSLEEP_SMPS_ASSIGN_SMPS1_SHIFT 0x00 3470 + 3471 + /* Bit definitions for NSLEEP_LDO_ASSIGN1 */ 3472 + #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4 0x80 3473 + #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO4_SHIFT 0x07 3474 + #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2 0x02 3475 + #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO2_SHIFT 0x01 3476 + #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1 0x01 3477 + #define TPS65917_NSLEEP_LDO_ASSIGN1_LDO1_SHIFT 0x00 3478 + 3479 + /* Bit definitions for NSLEEP_LDO_ASSIGN2 */ 3480 + #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3 0x04 3481 + #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO3_SHIFT 0x02 3482 + #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5 0x02 3483 + #define TPS65917_NSLEEP_LDO_ASSIGN2_LDO5_SHIFT 0x01 3484 + 3485 + /* Bit definitions for ENABLE1_RES_ASSIGN */ 3486 + #define TPS65917_ENABLE1_RES_ASSIGN_PLLEN 0x08 3487 + #define TPS65917_ENABLE1_RES_ASSIGN_PLLEN_SHIFT 0x03 3488 + #define TPS65917_ENABLE1_RES_ASSIGN_REGEN3 0x04 3489 + #define TPS65917_ENABLE1_RES_ASSIGN_REGEN3_SHIFT 0x02 3490 + #define TPS65917_ENABLE1_RES_ASSIGN_REGEN2 0x02 3491 + #define TPS65917_ENABLE1_RES_ASSIGN_REGEN2_SHIFT 0x01 3492 + #define TPS65917_ENABLE1_RES_ASSIGN_REGEN1 0x01 3493 + #define TPS65917_ENABLE1_RES_ASSIGN_REGEN1_SHIFT 0x00 3494 + 3495 + /* Bit definitions for ENABLE1_SMPS_ASSIGN */ 3496 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5 0x40 3497 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS5_SHIFT 0x06 3498 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4 0x10 3499 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS4_SHIFT 0x04 3500 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3 0x08 3501 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS3_SHIFT 0x03 3502 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2 0x02 3503 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS2_SHIFT 0x01 3504 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1 0x01 3505 + #define TPS65917_ENABLE1_SMPS_ASSIGN_SMPS1_SHIFT 0x00 3506 + 3507 + /* Bit definitions for ENABLE1_LDO_ASSIGN1 */ 3508 + #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4 0x80 3509 + #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO4_SHIFT 0x07 3510 + #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2 0x02 3511 + #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO2_SHIFT 0x01 3512 + #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1 0x01 3513 + #define TPS65917_ENABLE1_LDO_ASSIGN1_LDO1_SHIFT 0x00 3514 + 3515 + /* Bit definitions for ENABLE1_LDO_ASSIGN2 */ 3516 + #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3 0x04 3517 + #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO3_SHIFT 0x02 3518 + #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5 0x02 3519 + #define TPS65917_ENABLE1_LDO_ASSIGN2_LDO5_SHIFT 0x01 3520 + 3521 + /* Bit definitions for ENABLE2_RES_ASSIGN */ 3522 + #define TPS65917_ENABLE2_RES_ASSIGN_PLLEN 0x08 3523 + #define TPS65917_ENABLE2_RES_ASSIGN_PLLEN_SHIFT 0x03 3524 + #define TPS65917_ENABLE2_RES_ASSIGN_REGEN3 0x04 3525 + #define TPS65917_ENABLE2_RES_ASSIGN_REGEN3_SHIFT 0x02 3526 + #define TPS65917_ENABLE2_RES_ASSIGN_REGEN2 0x02 3527 + #define TPS65917_ENABLE2_RES_ASSIGN_REGEN2_SHIFT 0x01 3528 + #define TPS65917_ENABLE2_RES_ASSIGN_REGEN1 0x01 3529 + #define TPS65917_ENABLE2_RES_ASSIGN_REGEN1_SHIFT 0x00 3530 + 3531 + /* Bit definitions for ENABLE2_SMPS_ASSIGN */ 3532 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5 0x40 3533 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS5_SHIFT 0x06 3534 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4 0x10 3535 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS4_SHIFT 0x04 3536 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3 0x08 3537 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS3_SHIFT 0x03 3538 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2 0x02 3539 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS2_SHIFT 0x01 3540 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1 0x01 3541 + #define TPS65917_ENABLE2_SMPS_ASSIGN_SMPS1_SHIFT 0x00 3542 + 3543 + /* Bit definitions for ENABLE2_LDO_ASSIGN1 */ 3544 + #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4 0x80 3545 + #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO4_SHIFT 0x07 3546 + #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2 0x02 3547 + #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO2_SHIFT 0x01 3548 + #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1 0x01 3549 + #define TPS65917_ENABLE2_LDO_ASSIGN1_LDO1_SHIFT 0x00 3550 + 3551 + /* Bit definitions for ENABLE2_LDO_ASSIGN2 */ 3552 + #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3 0x04 3553 + #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO3_SHIFT 0x02 3554 + #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5 0x02 3555 + #define TPS65917_ENABLE2_LDO_ASSIGN2_LDO5_SHIFT 0x01 3556 + 3557 + /* Bit definitions for REGEN3_CTRL */ 3558 + #define TPS65917_REGEN3_CTRL_STATUS 0x10 3559 + #define TPS65917_REGEN3_CTRL_STATUS_SHIFT 0x04 3560 + #define TPS65917_REGEN3_CTRL_MODE_SLEEP 0x04 3561 + #define TPS65917_REGEN3_CTRL_MODE_SLEEP_SHIFT 0x02 3562 + #define TPS65917_REGEN3_CTRL_MODE_ACTIVE 0x01 3563 + #define TPS65917_REGEN3_CTRL_MODE_ACTIVE_SHIFT 0x00 3564 + 3565 + /* Registers for function RESOURCE */ 3566 + #define TPS65917_REGEN1_CTRL 0x2 3567 + #define TPS65917_PLLEN_CTRL 0x3 3568 + #define TPS65917_NSLEEP_RES_ASSIGN 0x6 3569 + #define TPS65917_NSLEEP_SMPS_ASSIGN 0x7 3570 + #define TPS65917_NSLEEP_LDO_ASSIGN1 0x8 3571 + #define TPS65917_NSLEEP_LDO_ASSIGN2 0x9 3572 + #define TPS65917_ENABLE1_RES_ASSIGN 0xA 3573 + #define TPS65917_ENABLE1_SMPS_ASSIGN 0xB 3574 + #define TPS65917_ENABLE1_LDO_ASSIGN1 0xC 3575 + #define TPS65917_ENABLE1_LDO_ASSIGN2 0xD 3576 + #define TPS65917_ENABLE2_RES_ASSIGN 0xE 3577 + #define TPS65917_ENABLE2_SMPS_ASSIGN 0xF 3578 + #define TPS65917_ENABLE2_LDO_ASSIGN1 0x10 3579 + #define TPS65917_ENABLE2_LDO_ASSIGN2 0x11 3580 + #define TPS65917_REGEN2_CTRL 0x12 3581 + #define TPS65917_REGEN3_CTRL 0x13 3001 3582 3002 3583 static inline int palmas_read(struct palmas *palmas, unsigned int base, 3003 3584 unsigned int reg, unsigned int *val)
+7
include/linux/regmap.h
··· 396 396 int regmap_reinit_cache(struct regmap *map, 397 397 const struct regmap_config *config); 398 398 struct regmap *dev_get_regmap(struct device *dev, const char *name); 399 + struct device *regmap_get_device(struct regmap *map); 399 400 int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); 400 401 int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); 401 402 int regmap_raw_write(struct regmap *map, unsigned int reg, ··· 727 726 static inline struct regmap *dev_get_regmap(struct device *dev, 728 727 const char *name) 729 728 { 729 + return NULL; 730 + } 731 + 732 + static inline struct device *regmap_get_device(struct regmap *map) 733 + { 734 + WARN_ONCE(1, "regmap API is disabled"); 730 735 return NULL; 731 736 } 732 737
-14
include/linux/regulator/ab8500.h
··· 322 322 struct regulator_init_data *ext_regulator; 323 323 }; 324 324 325 - #ifdef CONFIG_REGULATOR_AB8500_DEBUG 326 - int ab8500_regulator_debug_init(struct platform_device *pdev); 327 - int ab8500_regulator_debug_exit(struct platform_device *pdev); 328 - #else 329 - static inline int ab8500_regulator_debug_init(struct platform_device *pdev) 330 - { 331 - return 0; 332 - } 333 - static inline int ab8500_regulator_debug_exit(struct platform_device *pdev) 334 - { 335 - return 0; 336 - } 337 - #endif 338 - 339 325 #endif
+22 -1
include/linux/regulator/act8865.h
··· 1 1 /* 2 - * act8865.h -- Voltage regulation for the active-semi act8865 2 + * act8865.h -- Voltage regulation for active-semi act88xx PMUs 3 3 * 4 4 * Copyright (C) 2013 Atmel Corporation. 5 5 * ··· 27 27 ACT8865_ID_LDO3, 28 28 ACT8865_ID_LDO4, 29 29 ACT8865_REG_NUM, 30 + }; 31 + 32 + enum { 33 + ACT8846_ID_REG1, 34 + ACT8846_ID_REG2, 35 + ACT8846_ID_REG3, 36 + ACT8846_ID_REG4, 37 + ACT8846_ID_REG5, 38 + ACT8846_ID_REG6, 39 + ACT8846_ID_REG7, 40 + ACT8846_ID_REG8, 41 + ACT8846_ID_REG9, 42 + ACT8846_ID_REG10, 43 + ACT8846_ID_REG11, 44 + ACT8846_ID_REG12, 45 + ACT8846_REG_NUM, 46 + }; 47 + 48 + enum { 49 + ACT8865, 50 + ACT8846, 30 51 }; 31 52 32 53 /**
+26
include/linux/regulator/consumer.h
··· 37 37 38 38 struct device; 39 39 struct notifier_block; 40 + struct regmap; 40 41 41 42 /* 42 43 * Regulator operating modes. ··· 215 214 int regulator_set_optimum_mode(struct regulator *regulator, int load_uA); 216 215 217 216 int regulator_allow_bypass(struct regulator *regulator, bool allow); 217 + 218 + struct regmap *regulator_get_regmap(struct regulator *regulator); 219 + int regulator_get_hardware_vsel_register(struct regulator *regulator, 220 + unsigned *vsel_reg, 221 + unsigned *vsel_mask); 222 + int regulator_list_hardware_vsel(struct regulator *regulator, 223 + unsigned selector); 218 224 219 225 /* regulator notifier block */ 220 226 int regulator_register_notifier(struct regulator *regulator, ··· 463 455 bool allow) 464 456 { 465 457 return 0; 458 + } 459 + 460 + static inline struct regmap *regulator_get_regmap(struct regulator *regulator) 461 + { 462 + return ERR_PTR(-EOPNOTSUPP); 463 + } 464 + 465 + static inline int regulator_get_hardware_vsel_register(struct regulator *regulator, 466 + unsigned *vsel_reg, 467 + unsigned *vsel_mask) 468 + { 469 + return -EOPNOTSUPP; 470 + } 471 + 472 + static inline int regulator_list_hardware_vsel(struct regulator *regulator, 473 + unsigned selector) 474 + { 475 + return -EOPNOTSUPP; 466 476 } 467 477 468 478 static inline int regulator_register_notifier(struct regulator *regulator,
+32
include/linux/regulator/da9211.h
··· 1 + /* 2 + * da9211.h - Regulator device driver for DA9211 3 + * Copyright (C) 2014 Dialog Semiconductor Ltd. 4 + * 5 + * This library is free software; you can redistribute it and/or 6 + * modify it under the terms of the GNU Library General Public 7 + * License as published by the Free Software Foundation; either 8 + * version 2 of the License, or (at your option) any later version. 9 + * 10 + * This library is distributed in the hope that it will be useful, 11 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 13 + * Library General Public License for more details. 14 + */ 15 + 16 + #ifndef __LINUX_REGULATOR_DA9211_H 17 + #define __LINUX_REGULATOR_DA9211_H 18 + 19 + #include <linux/regulator/machine.h> 20 + 21 + #define DA9211_MAX_REGULATORS 2 22 + 23 + struct da9211_pdata { 24 + /* 25 + * Number of buck 26 + * 1 : 4 phase 1 buck 27 + * 2 : 2 phase 2 buck 28 + */ 29 + int num_buck; 30 + struct regulator_init_data *init_data; 31 + }; 32 + #endif