Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: Program triplebuffer on all pipes

[WHY]
Triplebuffer should be programmed on all pipes.
Some code assumed it only needed to be called on top
pipe, but as the HWSS function does not account
for that, it must be called on every pipe.

[HOW]
Remove condition to not program triplebuffer
on non-top/next pipe. Call the function
unconditionally on all pipes.

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Sung Lee <Sung.Lee@amd.com>
Signed-off-by: Ray Wu <ray.wu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Sung Lee and committed by
Alex Deucher
90af9998 e91c91e5

+21 -8
+19 -6
drivers/gpu/drm/amd/display/dc/core/dc.c
··· 4246 4246 if (update_type == UPDATE_TYPE_FAST) 4247 4247 continue; 4248 4248 4249 - ASSERT(!pipe_ctx->plane_state->triplebuffer_flips); 4250 - if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) { 4251 - /*turn off triple buffer for full update*/ 4252 - dc->hwss.program_triplebuffer( 4253 - dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips); 4254 - } 4255 4249 stream_status = 4256 4250 stream_get_status(context, pipe_ctx->stream); 4257 4251 ··· 4254 4260 dc, pipe_ctx->stream, stream_status->plane_count, context); 4255 4261 } 4256 4262 } 4263 + 4264 + for (j = 0; j < dc->res_pool->pipe_count; j++) { 4265 + struct pipe_ctx *pipe_ctx = &context->res_ctx.pipe_ctx[j]; 4266 + 4267 + if (!pipe_ctx->plane_state) 4268 + continue; 4269 + 4270 + /* Full fe update*/ 4271 + if (update_type == UPDATE_TYPE_FAST) 4272 + continue; 4273 + 4274 + ASSERT(!pipe_ctx->plane_state->triplebuffer_flips); 4275 + if (dc->hwss.program_triplebuffer != NULL && dc->debug.enable_tri_buf) { 4276 + /*turn off triple buffer for full update*/ 4277 + dc->hwss.program_triplebuffer( 4278 + dc, pipe_ctx, pipe_ctx->plane_state->triplebuffer_flips); 4279 + } 4280 + } 4281 + 4257 4282 if (dc->hwss.program_front_end_for_ctx && update_type != UPDATE_TYPE_FAST) { 4258 4283 dc->hwss.program_front_end_for_ctx(dc, context); 4259 4284
+1 -1
drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c
··· 2053 2053 for (i = 0; i < dc->res_pool->pipe_count; i++) { 2054 2054 pipe = &context->res_ctx.pipe_ctx[i]; 2055 2055 2056 - if (!pipe->top_pipe && !pipe->prev_odm_pipe && pipe->plane_state) { 2056 + if (pipe->plane_state) { 2057 2057 ASSERT(!pipe->plane_state->triplebuffer_flips); 2058 2058 /*turn off triple buffer for full update*/ 2059 2059 dc->hwss.program_triplebuffer(
+1 -1
drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_hwseq.c
··· 2361 2361 for (i = 0; i < dc->res_pool->pipe_count; i++) { 2362 2362 pipe = &context->res_ctx.pipe_ctx[i]; 2363 2363 2364 - if (!pipe->top_pipe && !pipe->prev_odm_pipe && pipe->plane_state) { 2364 + if (pipe->plane_state) { 2365 2365 if (pipe->plane_state->triplebuffer_flips) 2366 2366 BREAK_TO_DEBUGGER(); 2367 2367