[MIPS] Ocelot C: Fix MAC address detection after platform_device conversion.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

+202 -180
+1 -1
arch/mips/momentum/ocelot_c/Makefile
··· 2 # Makefile for Momentum Computer's Ocelot-C and -CS boards. 3 # 4 5 - obj-y += cpci-irq.o irq.o prom.o reset.o \ 6 setup.o uart-irq.o 7 8 obj-$(CONFIG_KGDB) += dbg_io.o
··· 2 # Makefile for Momentum Computer's Ocelot-C and -CS boards. 3 # 4 5 + obj-y += cpci-irq.o irq.o platform.o prom.o reset.o \ 6 setup.o uart-irq.o 7 8 obj-$(CONFIG_KGDB) += dbg_io.o
+201
arch/mips/momentum/ocelot_c/platform.c
···
··· 1 + #include <linux/delay.h> 2 + #include <linux/if_ether.h> 3 + #include <linux/ioport.h> 4 + #include <linux/mv643xx.h> 5 + #include <linux/platform_device.h> 6 + 7 + #include "ocelot_c_fpga.h" 8 + 9 + #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) 10 + 11 + static struct resource mv643xx_eth_shared_resources[] = { 12 + [0] = { 13 + .name = "ethernet shared base", 14 + .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS, 15 + .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS + 16 + MV643XX_ETH_SHARED_REGS_SIZE - 1, 17 + .flags = IORESOURCE_MEM, 18 + }, 19 + }; 20 + 21 + static struct platform_device mv643xx_eth_shared_device = { 22 + .name = MV643XX_ETH_SHARED_NAME, 23 + .id = 0, 24 + .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources), 25 + .resource = mv643xx_eth_shared_resources, 26 + }; 27 + 28 + #define MV_SRAM_BASE 0xfe000000UL 29 + #define MV_SRAM_SIZE (256 * 1024) 30 + 31 + #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4) 32 + #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4) 33 + 34 + #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE 35 + #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2)) 36 + 37 + #define MV64x60_IRQ_ETH_0 48 38 + #define MV64x60_IRQ_ETH_1 49 39 + 40 + #ifdef CONFIG_MV643XX_ETH_0 41 + 42 + static struct resource mv64x60_eth0_resources[] = { 43 + [0] = { 44 + .name = "eth0 irq", 45 + .start = MV64x60_IRQ_ETH_0, 46 + .end = MV64x60_IRQ_ETH_0, 47 + .flags = IORESOURCE_IRQ, 48 + }, 49 + }; 50 + 51 + static char eth0_mac_addr[ETH_ALEN]; 52 + 53 + static struct mv643xx_eth_platform_data eth0_pd = { 54 + .mac_addr = eth0_mac_addr, 55 + 56 + .tx_sram_addr = MV_SRAM_BASE_ETH0, 57 + .tx_sram_size = MV_SRAM_TXRING_SIZE, 58 + .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, 59 + 60 + .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE, 61 + .rx_sram_size = MV_SRAM_RXRING_SIZE, 62 + .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, 63 + }; 64 + 65 + static struct platform_device eth0_device = { 66 + .name = MV643XX_ETH_NAME, 67 + .id = 0, 68 + .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), 69 + .resource = mv64x60_eth0_resources, 70 + .dev = { 71 + .platform_data = &eth0_pd, 72 + }, 73 + }; 74 + #endif /* CONFIG_MV643XX_ETH_0 */ 75 + 76 + #ifdef CONFIG_MV643XX_ETH_1 77 + 78 + static struct resource mv64x60_eth1_resources[] = { 79 + [0] = { 80 + .name = "eth1 irq", 81 + .start = MV64x60_IRQ_ETH_1, 82 + .end = MV64x60_IRQ_ETH_1, 83 + .flags = IORESOURCE_IRQ, 84 + }, 85 + }; 86 + 87 + static char eth1_mac_addr[ETH_ALEN]; 88 + 89 + static struct mv643xx_eth_platform_data eth1_pd = { 90 + .mac_addr = eth1_mac_addr, 91 + 92 + .tx_sram_addr = MV_SRAM_BASE_ETH1, 93 + .tx_sram_size = MV_SRAM_TXRING_SIZE, 94 + .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, 95 + 96 + .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE, 97 + .rx_sram_size = MV_SRAM_RXRING_SIZE, 98 + .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, 99 + }; 100 + 101 + static struct platform_device eth1_device = { 102 + .name = MV643XX_ETH_NAME, 103 + .id = 1, 104 + .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), 105 + .resource = mv64x60_eth1_resources, 106 + .dev = { 107 + .platform_data = &eth1_pd, 108 + }, 109 + }; 110 + #endif /* CONFIG_MV643XX_ETH_1 */ 111 + 112 + static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { 113 + &mv643xx_eth_shared_device, 114 + #ifdef CONFIG_MV643XX_ETH_0 115 + &eth0_device, 116 + #endif 117 + #ifdef CONFIG_MV643XX_ETH_1 118 + &eth1_device, 119 + #endif 120 + /* The third port is not wired up on the Ocelot C */ 121 + }; 122 + 123 + static u8 __init exchange_bit(u8 val, u8 cs) 124 + { 125 + /* place the data */ 126 + OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); 127 + udelay(1); 128 + 129 + /* turn the clock on */ 130 + OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); 131 + udelay(1); 132 + 133 + /* turn the clock off and read-strobe */ 134 + OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); 135 + 136 + /* return the data */ 137 + return (OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1; 138 + } 139 + 140 + static void __init get_mac(char dest[6]) 141 + { 142 + u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 143 + int i,j; 144 + 145 + for (i = 0; i < 12; i++) 146 + exchange_bit(read_opcode[i], 1); 147 + 148 + for (j = 0; j < 6; j++) { 149 + dest[j] = 0; 150 + for (i = 0; i < 8; i++) { 151 + dest[j] <<= 1; 152 + dest[j] |= exchange_bit(0, 1); 153 + } 154 + } 155 + 156 + /* turn off CS */ 157 + exchange_bit(0,0); 158 + } 159 + 160 + /* 161 + * Copy and increment ethernet MAC address by a small value. 162 + * 163 + * This is useful for systems where the only one MAC address is stored in 164 + * non-volatile memory for multiple ports. 165 + */ 166 + static inline void eth_mac_add(unsigned char *dst, unsigned char *src, 167 + unsigned int add) 168 + { 169 + int i; 170 + 171 + BUG_ON(add >= 256); 172 + 173 + for (i = ETH_ALEN; i >= 0; i--) { 174 + dst[i] = src[i] + add; 175 + add = dst[i] < src[i]; /* compute carry */ 176 + } 177 + 178 + WARN_ON(add); 179 + } 180 + 181 + static int __init mv643xx_eth_add_pds(void) 182 + { 183 + unsigned char mac[ETH_ALEN]; 184 + int ret; 185 + 186 + get_mac(mac); 187 + #ifdef CONFIG_MV643XX_ETH_0 188 + eth_mac_add(eth1_mac_addr, mac, 0); 189 + #endif 190 + #ifdef CONFIG_MV643XX_ETH_1 191 + eth_mac_add(eth1_mac_addr, mac, 1); 192 + #endif 193 + ret = platform_add_devices(mv643xx_eth_pd_devs, 194 + ARRAY_SIZE(mv643xx_eth_pd_devs)); 195 + 196 + return ret; 197 + } 198 + 199 + device_initcall(mv643xx_eth_add_pds); 200 + 201 + #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
-58
arch/mips/momentum/ocelot_c/prom.c
··· 31 extern unsigned long marvell_base; 32 extern unsigned int cpu_clock; 33 34 - #ifdef CONFIG_MV643XX_ETH 35 - extern unsigned char prom_mac_addr_base[6]; 36 - #endif 37 - 38 const char *get_system_type(void) 39 { 40 #ifdef CONFIG_CPU_SR71000 ··· 39 return "Momentum Ocelot-C"; 40 #endif 41 } 42 - 43 - #ifdef CONFIG_MV643XX_ETH 44 - static void burn_clocks(void) 45 - { 46 - int i; 47 - 48 - /* this loop should burn at least 1us -- this should be plenty */ 49 - for (i = 0; i < 0x10000; i++) 50 - ; 51 - } 52 - 53 - static u8 exchange_bit(u8 val, u8 cs) 54 - { 55 - /* place the data */ 56 - OCELOT_FPGA_WRITE((val << 2) | cs, EEPROM_MODE); 57 - burn_clocks(); 58 - 59 - /* turn the clock on */ 60 - OCELOT_FPGA_WRITE((val << 2) | cs | 0x2, EEPROM_MODE); 61 - burn_clocks(); 62 - 63 - /* turn the clock off and read-strobe */ 64 - OCELOT_FPGA_WRITE((val << 2) | cs | 0x10, EEPROM_MODE); 65 - 66 - /* return the data */ 67 - return ((OCELOT_FPGA_READ(EEPROM_MODE) >> 3) & 0x1); 68 - } 69 - 70 - void get_mac(char dest[6]) 71 - { 72 - u8 read_opcode[12] = {1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}; 73 - int i,j; 74 - 75 - for (i = 0; i < 12; i++) 76 - exchange_bit(read_opcode[i], 1); 77 - 78 - for (j = 0; j < 6; j++) { 79 - dest[j] = 0; 80 - for (i = 0; i < 8; i++) { 81 - dest[j] <<= 1; 82 - dest[j] |= exchange_bit(0, 1); 83 - } 84 - } 85 - 86 - /* turn off CS */ 87 - exchange_bit(0,0); 88 - } 89 - #endif 90 - 91 92 #ifdef CONFIG_64BIT 93 ··· 172 173 mips_machgroup = MACH_GROUP_MOMENCO; 174 mips_machtype = MACH_MOMENCO_OCELOT_C; 175 - 176 - #ifdef CONFIG_MV643XX_ETH 177 - /* get the base MAC address for on-board ethernet ports */ 178 - get_mac(prom_mac_addr_base); 179 - #endif 180 181 #ifndef CONFIG_64BIT 182 debug_vectors->printf("Booting Linux kernel...\n");
··· 31 extern unsigned long marvell_base; 32 extern unsigned int cpu_clock; 33 34 const char *get_system_type(void) 35 { 36 #ifdef CONFIG_CPU_SR71000 ··· 43 return "Momentum Ocelot-C"; 44 #endif 45 } 46 47 #ifdef CONFIG_64BIT 48 ··· 225 226 mips_machgroup = MACH_GROUP_MOMENCO; 227 mips_machtype = MACH_MOMENCO_OCELOT_C; 228 229 #ifndef CONFIG_64BIT 230 debug_vectors->printf("Booting Linux kernel...\n");
-121
arch/mips/momentum/ocelot_c/setup.c
··· 50 #include <linux/sched.h> 51 #include <linux/interrupt.h> 52 #include <linux/pci.h> 53 - #include <linux/platform_device.h> 54 #include <linux/pm.h> 55 #include <linux/timex.h> 56 #include <linux/vmalloc.h> ··· 360 } 361 362 module_init(io_base_ioremap); 363 - 364 - #if defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) 365 - 366 - static struct resource mv643xx_eth_shared_resources[] = { 367 - [0] = { 368 - .name = "ethernet shared base", 369 - .start = 0xf1000000 + MV643XX_ETH_SHARED_REGS, 370 - .end = 0xf1000000 + MV643XX_ETH_SHARED_REGS + 371 - MV643XX_ETH_SHARED_REGS_SIZE - 1, 372 - .flags = IORESOURCE_MEM, 373 - }, 374 - }; 375 - 376 - static struct platform_device mv643xx_eth_shared_device = { 377 - .name = MV643XX_ETH_SHARED_NAME, 378 - .id = 0, 379 - .num_resources = ARRAY_SIZE(mv643xx_eth_shared_resources), 380 - .resource = mv643xx_eth_shared_resources, 381 - }; 382 - 383 - #define MV_SRAM_BASE 0xfe000000UL 384 - #define MV_SRAM_SIZE (256 * 1024) 385 - 386 - #define MV_SRAM_RXRING_SIZE (MV_SRAM_SIZE / 4) 387 - #define MV_SRAM_TXRING_SIZE (MV_SRAM_SIZE / 4) 388 - 389 - #define MV_SRAM_BASE_ETH0 MV_SRAM_BASE 390 - #define MV_SRAM_BASE_ETH1 (MV_SRAM_BASE + (MV_SRAM_SIZE / 2)) 391 - 392 - #define MV64x60_IRQ_ETH_0 48 393 - #define MV64x60_IRQ_ETH_1 49 394 - 395 - #ifdef CONFIG_MV643XX_ETH_0 396 - 397 - static struct resource mv64x60_eth0_resources[] = { 398 - [0] = { 399 - .name = "eth0 irq", 400 - .start = MV64x60_IRQ_ETH_0, 401 - .end = MV64x60_IRQ_ETH_0, 402 - .flags = IORESOURCE_IRQ, 403 - }, 404 - }; 405 - 406 - static struct mv643xx_eth_platform_data eth0_pd = { 407 - .tx_sram_addr = MV_SRAM_BASE_ETH0, 408 - .tx_sram_size = MV_SRAM_TXRING_SIZE, 409 - .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, 410 - 411 - .rx_sram_addr = MV_SRAM_BASE_ETH0 + MV_SRAM_TXRING_SIZE, 412 - .rx_sram_size = MV_SRAM_RXRING_SIZE, 413 - .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, 414 - }; 415 - 416 - static struct platform_device eth0_device = { 417 - .name = MV643XX_ETH_NAME, 418 - .id = 0, 419 - .num_resources = ARRAY_SIZE(mv64x60_eth0_resources), 420 - .resource = mv64x60_eth0_resources, 421 - .dev = { 422 - .platform_data = &eth0_pd, 423 - }, 424 - }; 425 - #endif /* CONFIG_MV643XX_ETH_0 */ 426 - 427 - #ifdef CONFIG_MV643XX_ETH_1 428 - 429 - static struct resource mv64x60_eth1_resources[] = { 430 - [0] = { 431 - .name = "eth1 irq", 432 - .start = MV64x60_IRQ_ETH_1, 433 - .end = MV64x60_IRQ_ETH_1, 434 - .flags = IORESOURCE_IRQ, 435 - }, 436 - }; 437 - 438 - static struct mv643xx_eth_platform_data eth1_pd = { 439 - .tx_sram_addr = MV_SRAM_BASE_ETH1, 440 - .tx_sram_size = MV_SRAM_TXRING_SIZE, 441 - .tx_queue_size = MV_SRAM_TXRING_SIZE / 16, 442 - 443 - .rx_sram_addr = MV_SRAM_BASE_ETH1 + MV_SRAM_TXRING_SIZE, 444 - .rx_sram_size = MV_SRAM_RXRING_SIZE, 445 - .rx_queue_size = MV_SRAM_RXRING_SIZE / 16, 446 - }; 447 - 448 - static struct platform_device eth1_device = { 449 - .name = MV643XX_ETH_NAME, 450 - .id = 1, 451 - .num_resources = ARRAY_SIZE(mv64x60_eth1_resources), 452 - .resource = mv64x60_eth1_resources, 453 - .dev = { 454 - .platform_data = &eth1_pd, 455 - }, 456 - }; 457 - #endif /* CONFIG_MV643XX_ETH_1 */ 458 - 459 - static struct platform_device *mv643xx_eth_pd_devs[] __initdata = { 460 - &mv643xx_eth_shared_device, 461 - #ifdef CONFIG_MV643XX_ETH_0 462 - &eth0_device, 463 - #endif 464 - #ifdef CONFIG_MV643XX_ETH_1 465 - &eth1_device, 466 - #endif 467 - /* The third port is not wired up on the Ocelot C */ 468 - }; 469 - 470 - int mv643xx_eth_add_pds(void) 471 - { 472 - int ret; 473 - 474 - ret = platform_add_devices(mv643xx_eth_pd_devs, 475 - ARRAY_SIZE(mv643xx_eth_pd_devs)); 476 - 477 - return ret; 478 - } 479 - 480 - device_initcall(mv643xx_eth_add_pds); 481 - 482 - #endif /* defined(CONFIG_MV643XX_ETH) || defined(CONFIG_MV643XX_ETH_MODULE) */
··· 50 #include <linux/sched.h> 51 #include <linux/interrupt.h> 52 #include <linux/pci.h> 53 #include <linux/pm.h> 54 #include <linux/timex.h> 55 #include <linux/vmalloc.h> ··· 361 } 362 363 module_init(io_base_ioremap);