tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

iio: accel: st_accel: inline per-sensor data

We have #defines for all the individual sensor registers and
value/mask pairs #defined at the top of the file and used at
exactly one spot.

This is usually good if the #defines give a meaning to the
opaque magic numbers.

However in this case, the semantic meaning is inherent in the
name of the C99-addressable fields, and that means duplication
of information, and only makes the code hard to maintain since
you every time have to add a new #define AND update the site
where it is to be used.

Get rid of the #defines and just open code the values into the
appropriate struct elements. Make sure to explicitly address
the .hz and .value fields in the st_sensor_odr_avl struct
so that the meaning of all values is clear.

This patch is purely syntactic should have no semantic effect.

Cc: Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Lorenzo Bianconi <lorenzo.bianconi@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>

authored by

Linus Walleij and committed by
Jonathan Cameron 9049531c 0f883b22

+206 -396
+206 -396
drivers/iio/accel/st_accel_core.c
··· 43 43 #define ST_ACCEL_FS_AVL_200G 200 44 44 #define ST_ACCEL_FS_AVL_400G 400 45 45 46 - /* CUSTOM VALUES FOR SENSOR 1 */ 47 - #define ST_ACCEL_1_WAI_EXP 0x33 48 - #define ST_ACCEL_1_ODR_ADDR 0x20 49 - #define ST_ACCEL_1_ODR_MASK 0xf0 50 - #define ST_ACCEL_1_ODR_AVL_1HZ_VAL 0x01 51 - #define ST_ACCEL_1_ODR_AVL_10HZ_VAL 0x02 52 - #define ST_ACCEL_1_ODR_AVL_25HZ_VAL 0x03 53 - #define ST_ACCEL_1_ODR_AVL_50HZ_VAL 0x04 54 - #define ST_ACCEL_1_ODR_AVL_100HZ_VAL 0x05 55 - #define ST_ACCEL_1_ODR_AVL_200HZ_VAL 0x06 56 - #define ST_ACCEL_1_ODR_AVL_400HZ_VAL 0x07 57 - #define ST_ACCEL_1_ODR_AVL_1600HZ_VAL 0x08 58 - #define ST_ACCEL_1_FS_ADDR 0x23 59 - #define ST_ACCEL_1_FS_MASK 0x30 60 - #define ST_ACCEL_1_FS_AVL_2_VAL 0x00 61 - #define ST_ACCEL_1_FS_AVL_4_VAL 0x01 62 - #define ST_ACCEL_1_FS_AVL_8_VAL 0x02 63 - #define ST_ACCEL_1_FS_AVL_16_VAL 0x03 64 - #define ST_ACCEL_1_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 65 - #define ST_ACCEL_1_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 66 - #define ST_ACCEL_1_FS_AVL_8_GAIN IIO_G_TO_M_S_2(4000) 67 - #define ST_ACCEL_1_FS_AVL_16_GAIN IIO_G_TO_M_S_2(12000) 68 - #define ST_ACCEL_1_BDU_ADDR 0x23 69 - #define ST_ACCEL_1_BDU_MASK 0x80 70 - #define ST_ACCEL_1_DRDY_IRQ_ADDR 0x22 71 - #define ST_ACCEL_1_DRDY_IRQ_INT1_MASK 0x10 72 - #define ST_ACCEL_1_DRDY_IRQ_INT2_MASK 0x08 73 - #define ST_ACCEL_1_IHL_IRQ_ADDR 0x25 74 - #define ST_ACCEL_1_IHL_IRQ_MASK 0x02 75 - #define ST_ACCEL_1_MULTIREAD_BIT true 76 - 77 - /* CUSTOM VALUES FOR SENSOR 2 */ 78 - #define ST_ACCEL_2_WAI_EXP 0x32 79 - #define ST_ACCEL_2_ODR_ADDR 0x20 80 - #define ST_ACCEL_2_ODR_MASK 0x18 81 - #define ST_ACCEL_2_ODR_AVL_50HZ_VAL 0x00 82 - #define ST_ACCEL_2_ODR_AVL_100HZ_VAL 0x01 83 - #define ST_ACCEL_2_ODR_AVL_400HZ_VAL 0x02 84 - #define ST_ACCEL_2_ODR_AVL_1000HZ_VAL 0x03 85 - #define ST_ACCEL_2_PW_ADDR 0x20 86 - #define ST_ACCEL_2_PW_MASK 0xe0 87 - #define ST_ACCEL_2_FS_ADDR 0x23 88 - #define ST_ACCEL_2_FS_MASK 0x30 89 - #define ST_ACCEL_2_FS_AVL_2_VAL 0X00 90 - #define ST_ACCEL_2_FS_AVL_4_VAL 0X01 91 - #define ST_ACCEL_2_FS_AVL_8_VAL 0x03 92 - #define ST_ACCEL_2_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1000) 93 - #define ST_ACCEL_2_FS_AVL_4_GAIN IIO_G_TO_M_S_2(2000) 94 - #define ST_ACCEL_2_FS_AVL_8_GAIN IIO_G_TO_M_S_2(3900) 95 - #define ST_ACCEL_2_BDU_ADDR 0x23 96 - #define ST_ACCEL_2_BDU_MASK 0x80 97 - #define ST_ACCEL_2_DRDY_IRQ_ADDR 0x22 98 - #define ST_ACCEL_2_DRDY_IRQ_INT1_MASK 0x02 99 - #define ST_ACCEL_2_DRDY_IRQ_INT2_MASK 0x10 100 - #define ST_ACCEL_2_IHL_IRQ_ADDR 0x22 101 - #define ST_ACCEL_2_IHL_IRQ_MASK 0x80 102 - #define ST_ACCEL_2_OD_IRQ_ADDR 0x22 103 - #define ST_ACCEL_2_OD_IRQ_MASK 0x40 104 - #define ST_ACCEL_2_MULTIREAD_BIT true 105 - 106 - /* CUSTOM VALUES FOR SENSOR 3 */ 107 - #define ST_ACCEL_3_WAI_EXP 0x40 108 - #define ST_ACCEL_3_ODR_ADDR 0x20 109 - #define ST_ACCEL_3_ODR_MASK 0xf0 110 - #define ST_ACCEL_3_ODR_AVL_3HZ_VAL 0x01 111 - #define ST_ACCEL_3_ODR_AVL_6HZ_VAL 0x02 112 - #define ST_ACCEL_3_ODR_AVL_12HZ_VAL 0x03 113 - #define ST_ACCEL_3_ODR_AVL_25HZ_VAL 0x04 114 - #define ST_ACCEL_3_ODR_AVL_50HZ_VAL 0x05 115 - #define ST_ACCEL_3_ODR_AVL_100HZ_VAL 0x06 116 - #define ST_ACCEL_3_ODR_AVL_200HZ_VAL 0x07 117 - #define ST_ACCEL_3_ODR_AVL_400HZ_VAL 0x08 118 - #define ST_ACCEL_3_ODR_AVL_800HZ_VAL 0x09 119 - #define ST_ACCEL_3_ODR_AVL_1600HZ_VAL 0x0a 120 - #define ST_ACCEL_3_FS_ADDR 0x24 121 - #define ST_ACCEL_3_FS_MASK 0x38 122 - #define ST_ACCEL_3_FS_AVL_2_VAL 0X00 123 - #define ST_ACCEL_3_FS_AVL_4_VAL 0X01 124 - #define ST_ACCEL_3_FS_AVL_6_VAL 0x02 125 - #define ST_ACCEL_3_FS_AVL_8_VAL 0x03 126 - #define ST_ACCEL_3_FS_AVL_16_VAL 0x04 127 - #define ST_ACCEL_3_FS_AVL_2_GAIN IIO_G_TO_M_S_2(61) 128 - #define ST_ACCEL_3_FS_AVL_4_GAIN IIO_G_TO_M_S_2(122) 129 - #define ST_ACCEL_3_FS_AVL_6_GAIN IIO_G_TO_M_S_2(183) 130 - #define ST_ACCEL_3_FS_AVL_8_GAIN IIO_G_TO_M_S_2(244) 131 - #define ST_ACCEL_3_FS_AVL_16_GAIN IIO_G_TO_M_S_2(732) 132 - #define ST_ACCEL_3_BDU_ADDR 0x20 133 - #define ST_ACCEL_3_BDU_MASK 0x08 134 - #define ST_ACCEL_3_DRDY_IRQ_ADDR 0x23 135 - #define ST_ACCEL_3_DRDY_IRQ_INT1_MASK 0x80 136 - #define ST_ACCEL_3_DRDY_IRQ_INT2_MASK 0x00 137 - #define ST_ACCEL_3_IHL_IRQ_ADDR 0x23 138 - #define ST_ACCEL_3_IHL_IRQ_MASK 0x40 139 - #define ST_ACCEL_3_IG1_EN_ADDR 0x23 140 - #define ST_ACCEL_3_IG1_EN_MASK 0x08 141 - #define ST_ACCEL_3_MULTIREAD_BIT false 142 - 143 - /* CUSTOM VALUES FOR SENSOR 4 */ 144 - #define ST_ACCEL_4_WAI_EXP 0x3a 145 - #define ST_ACCEL_4_ODR_ADDR 0x20 146 - #define ST_ACCEL_4_ODR_MASK 0x30 /* DF1 and DF0 */ 147 - #define ST_ACCEL_4_ODR_AVL_40HZ_VAL 0x00 148 - #define ST_ACCEL_4_ODR_AVL_160HZ_VAL 0x01 149 - #define ST_ACCEL_4_ODR_AVL_640HZ_VAL 0x02 150 - #define ST_ACCEL_4_ODR_AVL_2560HZ_VAL 0x03 151 - #define ST_ACCEL_4_PW_ADDR 0x20 152 - #define ST_ACCEL_4_PW_MASK 0xc0 153 - #define ST_ACCEL_4_FS_ADDR 0x21 154 - #define ST_ACCEL_4_FS_MASK 0x80 155 - #define ST_ACCEL_4_FS_AVL_2_VAL 0X00 156 - #define ST_ACCEL_4_FS_AVL_6_VAL 0X01 157 - #define ST_ACCEL_4_FS_AVL_2_GAIN IIO_G_TO_M_S_2(1024) 158 - #define ST_ACCEL_4_FS_AVL_6_GAIN IIO_G_TO_M_S_2(340) 159 - #define ST_ACCEL_4_BDU_ADDR 0x21 160 - #define ST_ACCEL_4_BDU_MASK 0x40 161 - #define ST_ACCEL_4_DRDY_IRQ_ADDR 0x21 162 - #define ST_ACCEL_4_DRDY_IRQ_INT1_MASK 0x04 163 - #define ST_ACCEL_4_MULTIREAD_BIT true 164 - 165 - /* CUSTOM VALUES FOR SENSOR 5 */ 166 - #define ST_ACCEL_5_WAI_EXP 0x3b 167 - #define ST_ACCEL_5_ODR_ADDR 0x20 168 - #define ST_ACCEL_5_ODR_MASK 0x80 169 - #define ST_ACCEL_5_ODR_AVL_100HZ_VAL 0x00 170 - #define ST_ACCEL_5_ODR_AVL_400HZ_VAL 0x01 171 - #define ST_ACCEL_5_PW_ADDR 0x20 172 - #define ST_ACCEL_5_PW_MASK 0x40 173 - #define ST_ACCEL_5_FS_ADDR 0x20 174 - #define ST_ACCEL_5_FS_MASK 0x20 175 - #define ST_ACCEL_5_FS_AVL_2_VAL 0X00 176 - #define ST_ACCEL_5_FS_AVL_8_VAL 0X01 177 - /* TODO: check these resulting gain settings, these are not in the datsheet */ 178 - #define ST_ACCEL_5_FS_AVL_2_GAIN IIO_G_TO_M_S_2(18000) 179 - #define ST_ACCEL_5_FS_AVL_8_GAIN IIO_G_TO_M_S_2(72000) 180 - #define ST_ACCEL_5_DRDY_IRQ_ADDR 0x22 181 - #define ST_ACCEL_5_DRDY_IRQ_INT1_MASK 0x04 182 - #define ST_ACCEL_5_DRDY_IRQ_INT2_MASK 0x20 183 - #define ST_ACCEL_5_IHL_IRQ_ADDR 0x22 184 - #define ST_ACCEL_5_IHL_IRQ_MASK 0x80 185 - #define ST_ACCEL_5_OD_IRQ_ADDR 0x22 186 - #define ST_ACCEL_5_OD_IRQ_MASK 0x40 187 - #define ST_ACCEL_5_IG1_EN_ADDR 0x21 188 - #define ST_ACCEL_5_IG1_EN_MASK 0x08 189 - #define ST_ACCEL_5_MULTIREAD_BIT false 190 - 191 - /* CUSTOM VALUES FOR SENSOR 6 */ 192 - #define ST_ACCEL_6_WAI_EXP 0x32 193 - #define ST_ACCEL_6_ODR_ADDR 0x20 194 - #define ST_ACCEL_6_ODR_MASK 0x18 195 - #define ST_ACCEL_6_ODR_AVL_50HZ_VAL 0x00 196 - #define ST_ACCEL_6_ODR_AVL_100HZ_VAL 0x01 197 - #define ST_ACCEL_6_ODR_AVL_400HZ_VAL 0x02 198 - #define ST_ACCEL_6_ODR_AVL_1000HZ_VAL 0x03 199 - #define ST_ACCEL_6_PW_ADDR 0x20 200 - #define ST_ACCEL_6_PW_MASK 0x20 201 - #define ST_ACCEL_6_FS_ADDR 0x23 202 - #define ST_ACCEL_6_FS_MASK 0x30 203 - #define ST_ACCEL_6_FS_AVL_100_VAL 0x00 204 - #define ST_ACCEL_6_FS_AVL_200_VAL 0x01 205 - #define ST_ACCEL_6_FS_AVL_400_VAL 0x03 206 - #define ST_ACCEL_6_FS_AVL_100_GAIN IIO_G_TO_M_S_2(49000) 207 - #define ST_ACCEL_6_FS_AVL_200_GAIN IIO_G_TO_M_S_2(98000) 208 - #define ST_ACCEL_6_FS_AVL_400_GAIN IIO_G_TO_M_S_2(195000) 209 - #define ST_ACCEL_6_BDU_ADDR 0x23 210 - #define ST_ACCEL_6_BDU_MASK 0x80 211 - #define ST_ACCEL_6_DRDY_IRQ_ADDR 0x22 212 - #define ST_ACCEL_6_DRDY_IRQ_INT1_MASK 0x02 213 - #define ST_ACCEL_6_DRDY_IRQ_INT2_MASK 0x10 214 - #define ST_ACCEL_6_IHL_IRQ_ADDR 0x22 215 - #define ST_ACCEL_6_IHL_IRQ_MASK 0x80 216 - #define ST_ACCEL_6_MULTIREAD_BIT true 217 - 218 - /* CUSTOM VALUES FOR SENSOR 7 */ 219 - #define ST_ACCEL_7_ODR_ADDR 0x20 220 - #define ST_ACCEL_7_ODR_MASK 0x30 221 - #define ST_ACCEL_7_ODR_AVL_280HZ_VAL 0x00 222 - #define ST_ACCEL_7_ODR_AVL_560HZ_VAL 0x01 223 - #define ST_ACCEL_7_ODR_AVL_1120HZ_VAL 0x02 224 - #define ST_ACCEL_7_ODR_AVL_4480HZ_VAL 0x03 225 - #define ST_ACCEL_7_PW_ADDR 0x20 226 - #define ST_ACCEL_7_PW_MASK 0xc0 227 - #define ST_ACCEL_7_FS_AVL_2_GAIN IIO_G_TO_M_S_2(488) 228 - #define ST_ACCEL_7_BDU_ADDR 0x21 229 - #define ST_ACCEL_7_BDU_MASK 0x40 230 - #define ST_ACCEL_7_DRDY_IRQ_ADDR 0x21 231 - #define ST_ACCEL_7_DRDY_IRQ_INT1_MASK 0x04 232 - #define ST_ACCEL_7_MULTIREAD_BIT false 233 - 234 - /* CUSTOM VALUES FOR SENSOR 8 */ 235 - #define ST_ACCEL_8_FS_AVL_2_GAIN IIO_G_TO_M_S_2(15600) 236 - #define ST_ACCEL_8_FS_AVL_4_GAIN IIO_G_TO_M_S_2(31200) 237 - #define ST_ACCEL_8_FS_AVL_8_GAIN IIO_G_TO_M_S_2(62500) 238 - #define ST_ACCEL_8_FS_AVL_16_GAIN IIO_G_TO_M_S_2(187500) 239 - 240 46 static const struct iio_chan_spec st_accel_8bit_channels[] = { 241 47 ST_SENSORS_LSM_CHANNELS(IIO_ACCEL, 242 48 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE), ··· 93 287 94 288 static const struct st_sensor_settings st_accel_sensors_settings[] = { 95 289 { 96 - .wai = ST_ACCEL_1_WAI_EXP, 290 + .wai = 0x33, 97 291 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 98 292 .sensors_supported = { 99 293 [0] = LIS3DH_ACCEL_DEV_NAME, ··· 106 300 }, 107 301 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 108 302 .odr = { 109 - .addr = ST_ACCEL_1_ODR_ADDR, 110 - .mask = ST_ACCEL_1_ODR_MASK, 303 + .addr = 0x20, 304 + .mask = 0xf0, 111 305 .odr_avl = { 112 - { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 113 - { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 114 - { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 115 - { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 116 - { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 117 - { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 118 - { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 119 - { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 306 + { .hz = 1, .value = 0x01, }, 307 + { .hz = 10, .value = 0x02, }, 308 + { .hz = 25, .value = 0x03, }, 309 + { .hz = 50, .value = 0x04, }, 310 + { .hz = 100, .value = 0x05, }, 311 + { .hz = 200, .value = 0x06, }, 312 + { .hz = 400, .value = 0x07, }, 313 + { .hz = 1600, .value = 0x08, }, 120 314 }, 121 315 }, 122 316 .pw = { 123 - .addr = ST_ACCEL_1_ODR_ADDR, 124 - .mask = ST_ACCEL_1_ODR_MASK, 317 + .addr = 0x20, 318 + .mask = 0xf0, 125 319 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 126 320 }, 127 321 .enable_axis = { ··· 129 323 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 130 324 }, 131 325 .fs = { 132 - .addr = ST_ACCEL_1_FS_ADDR, 133 - .mask = ST_ACCEL_1_FS_MASK, 326 + .addr = 0x23, 327 + .mask = 0x30, 134 328 .fs_avl = { 135 329 [0] = { 136 330 .num = ST_ACCEL_FS_AVL_2G, 137 - .value = ST_ACCEL_1_FS_AVL_2_VAL, 138 - .gain = ST_ACCEL_1_FS_AVL_2_GAIN, 331 + .value = 0x00, 332 + .gain = IIO_G_TO_M_S_2(1000), 139 333 }, 140 334 [1] = { 141 335 .num = ST_ACCEL_FS_AVL_4G, 142 - .value = ST_ACCEL_1_FS_AVL_4_VAL, 143 - .gain = ST_ACCEL_1_FS_AVL_4_GAIN, 336 + .value = 0x01, 337 + .gain = IIO_G_TO_M_S_2(2000), 144 338 }, 145 339 [2] = { 146 340 .num = ST_ACCEL_FS_AVL_8G, 147 - .value = ST_ACCEL_1_FS_AVL_8_VAL, 148 - .gain = ST_ACCEL_1_FS_AVL_8_GAIN, 341 + .value = 0x02, 342 + .gain = IIO_G_TO_M_S_2(4000), 149 343 }, 150 344 [3] = { 151 345 .num = ST_ACCEL_FS_AVL_16G, 152 - .value = ST_ACCEL_1_FS_AVL_16_VAL, 153 - .gain = ST_ACCEL_1_FS_AVL_16_GAIN, 346 + .value = 0x03, 347 + .gain = IIO_G_TO_M_S_2(12000), 154 348 }, 155 349 }, 156 350 }, 157 351 .bdu = { 158 - .addr = ST_ACCEL_1_BDU_ADDR, 159 - .mask = ST_ACCEL_1_BDU_MASK, 352 + .addr = 0x23, 353 + .mask = 0x80, 160 354 }, 161 355 .drdy_irq = { 162 - .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 163 - .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK, 164 - .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK, 165 - .addr_ihl = ST_ACCEL_1_IHL_IRQ_ADDR, 166 - .mask_ihl = ST_ACCEL_1_IHL_IRQ_MASK, 356 + .addr = 0x22, 357 + .mask_int1 = 0x10, 358 + .mask_int2 = 0x08, 359 + .addr_ihl = 0x25, 360 + .mask_ihl = 0x02, 167 361 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 168 362 }, 169 - .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 363 + .multi_read_bit = true, 170 364 .bootime = 2, 171 365 }, 172 366 { 173 - .wai = ST_ACCEL_2_WAI_EXP, 367 + .wai = 0x32, 174 368 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 175 369 .sensors_supported = { 176 370 [0] = LIS331DLH_ACCEL_DEV_NAME, ··· 180 374 }, 181 375 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 182 376 .odr = { 183 - .addr = ST_ACCEL_2_ODR_ADDR, 184 - .mask = ST_ACCEL_2_ODR_MASK, 377 + .addr = 0x20, 378 + .mask = 0x18, 185 379 .odr_avl = { 186 - { 50, ST_ACCEL_2_ODR_AVL_50HZ_VAL, }, 187 - { 100, ST_ACCEL_2_ODR_AVL_100HZ_VAL, }, 188 - { 400, ST_ACCEL_2_ODR_AVL_400HZ_VAL, }, 189 - { 1000, ST_ACCEL_2_ODR_AVL_1000HZ_VAL, }, 380 + { .hz = 50, .value = 0x00, }, 381 + { .hz = 100, .value = 0x01, }, 382 + { .hz = 400, .value = 0x02, }, 383 + { .hz = 1000, .value = 0x03, }, 190 384 }, 191 385 }, 192 386 .pw = { 193 - .addr = ST_ACCEL_2_PW_ADDR, 194 - .mask = ST_ACCEL_2_PW_MASK, 387 + .addr = 0x20, 388 + .mask = 0xe0, 195 389 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 196 390 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 197 391 }, ··· 200 394 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 201 395 }, 202 396 .fs = { 203 - .addr = ST_ACCEL_2_FS_ADDR, 204 - .mask = ST_ACCEL_2_FS_MASK, 397 + .addr = 0x23, 398 + .mask = 0x30, 205 399 .fs_avl = { 206 400 [0] = { 207 401 .num = ST_ACCEL_FS_AVL_2G, 208 - .value = ST_ACCEL_2_FS_AVL_2_VAL, 209 - .gain = ST_ACCEL_2_FS_AVL_2_GAIN, 402 + .value = 0x00, 403 + .gain = IIO_G_TO_M_S_2(1000), 210 404 }, 211 405 [1] = { 212 406 .num = ST_ACCEL_FS_AVL_4G, 213 - .value = ST_ACCEL_2_FS_AVL_4_VAL, 214 - .gain = ST_ACCEL_2_FS_AVL_4_GAIN, 407 + .value = 0x01, 408 + .gain = IIO_G_TO_M_S_2(2000), 215 409 }, 216 410 [2] = { 217 411 .num = ST_ACCEL_FS_AVL_8G, 218 - .value = ST_ACCEL_2_FS_AVL_8_VAL, 219 - .gain = ST_ACCEL_2_FS_AVL_8_GAIN, 412 + .value = 0x03, 413 + .gain = IIO_G_TO_M_S_2(3900), 220 414 }, 221 415 }, 222 416 }, 223 417 .bdu = { 224 - .addr = ST_ACCEL_2_BDU_ADDR, 225 - .mask = ST_ACCEL_2_BDU_MASK, 418 + .addr = 0x23, 419 + .mask = 0x80, 226 420 }, 227 421 .drdy_irq = { 228 - .addr = ST_ACCEL_2_DRDY_IRQ_ADDR, 229 - .mask_int1 = ST_ACCEL_2_DRDY_IRQ_INT1_MASK, 230 - .mask_int2 = ST_ACCEL_2_DRDY_IRQ_INT2_MASK, 231 - .addr_ihl = ST_ACCEL_2_IHL_IRQ_ADDR, 232 - .mask_ihl = ST_ACCEL_2_IHL_IRQ_MASK, 233 - .addr_od = ST_ACCEL_2_OD_IRQ_ADDR, 234 - .mask_od = ST_ACCEL_2_OD_IRQ_MASK, 422 + .addr = 0x22, 423 + .mask_int1 = 0x02, 424 + .mask_int2 = 0x10, 425 + .addr_ihl = 0x22, 426 + .mask_ihl = 0x80, 427 + .addr_od = 0x22, 428 + .mask_od = 0x40, 235 429 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 236 430 }, 237 - .multi_read_bit = ST_ACCEL_2_MULTIREAD_BIT, 431 + .multi_read_bit = true, 238 432 .bootime = 2, 239 433 }, 240 434 { 241 - .wai = ST_ACCEL_3_WAI_EXP, 435 + .wai = 0x40, 242 436 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 243 437 .sensors_supported = { 244 438 [0] = LSM330_ACCEL_DEV_NAME, 245 439 }, 246 440 .ch = (struct iio_chan_spec *)st_accel_16bit_channels, 247 441 .odr = { 248 - .addr = ST_ACCEL_3_ODR_ADDR, 249 - .mask = ST_ACCEL_3_ODR_MASK, 442 + .addr = 0x20, 443 + .mask = 0xf0, 250 444 .odr_avl = { 251 - { 3, ST_ACCEL_3_ODR_AVL_3HZ_VAL }, 252 - { 6, ST_ACCEL_3_ODR_AVL_6HZ_VAL, }, 253 - { 12, ST_ACCEL_3_ODR_AVL_12HZ_VAL, }, 254 - { 25, ST_ACCEL_3_ODR_AVL_25HZ_VAL, }, 255 - { 50, ST_ACCEL_3_ODR_AVL_50HZ_VAL, }, 256 - { 100, ST_ACCEL_3_ODR_AVL_100HZ_VAL, }, 257 - { 200, ST_ACCEL_3_ODR_AVL_200HZ_VAL, }, 258 - { 400, ST_ACCEL_3_ODR_AVL_400HZ_VAL, }, 259 - { 800, ST_ACCEL_3_ODR_AVL_800HZ_VAL, }, 260 - { 1600, ST_ACCEL_3_ODR_AVL_1600HZ_VAL, }, 445 + { .hz = 3, .value = 0x01, }, 446 + { .hz = 6, .value = 0x02, }, 447 + { .hz = 12, .value = 0x03, }, 448 + { .hz = 25, .value = 0x04, }, 449 + { .hz = 50, .value = 0x05, }, 450 + { .hz = 100, .value = 0x06, }, 451 + { .hz = 200, .value = 0x07, }, 452 + { .hz = 400, .value = 0x08, }, 453 + { .hz = 800, .value = 0x09, }, 454 + { .hz = 1600, .value = 0x0a, }, 261 455 }, 262 456 }, 263 457 .pw = { 264 - .addr = ST_ACCEL_3_ODR_ADDR, 265 - .mask = ST_ACCEL_3_ODR_MASK, 458 + .addr = 0x20, 459 + .mask = 0xf0, 266 460 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 267 461 }, 268 462 .enable_axis = { ··· 270 464 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 271 465 }, 272 466 .fs = { 273 - .addr = ST_ACCEL_3_FS_ADDR, 274 - .mask = ST_ACCEL_3_FS_MASK, 467 + .addr = 0x24, 468 + .mask = 0x38, 275 469 .fs_avl = { 276 470 [0] = { 277 471 .num = ST_ACCEL_FS_AVL_2G, 278 - .value = ST_ACCEL_3_FS_AVL_2_VAL, 279 - .gain = ST_ACCEL_3_FS_AVL_2_GAIN, 472 + .value = 0x00, 473 + .gain = IIO_G_TO_M_S_2(61), 280 474 }, 281 475 [1] = { 282 476 .num = ST_ACCEL_FS_AVL_4G, 283 - .value = ST_ACCEL_3_FS_AVL_4_VAL, 284 - .gain = ST_ACCEL_3_FS_AVL_4_GAIN, 477 + .value = 0x01, 478 + .gain = IIO_G_TO_M_S_2(122), 285 479 }, 286 480 [2] = { 287 481 .num = ST_ACCEL_FS_AVL_6G, 288 - .value = ST_ACCEL_3_FS_AVL_6_VAL, 289 - .gain = ST_ACCEL_3_FS_AVL_6_GAIN, 482 + .value = 0x02, 483 + .gain = IIO_G_TO_M_S_2(183), 290 484 }, 291 485 [3] = { 292 486 .num = ST_ACCEL_FS_AVL_8G, 293 - .value = ST_ACCEL_3_FS_AVL_8_VAL, 294 - .gain = ST_ACCEL_3_FS_AVL_8_GAIN, 487 + .value = 0x03, 488 + .gain = IIO_G_TO_M_S_2(244), 295 489 }, 296 490 [4] = { 297 491 .num = ST_ACCEL_FS_AVL_16G, 298 - .value = ST_ACCEL_3_FS_AVL_16_VAL, 299 - .gain = ST_ACCEL_3_FS_AVL_16_GAIN, 492 + .value = 0x04, 493 + .gain = IIO_G_TO_M_S_2(732), 300 494 }, 301 495 }, 302 496 }, 303 497 .bdu = { 304 - .addr = ST_ACCEL_3_BDU_ADDR, 305 - .mask = ST_ACCEL_3_BDU_MASK, 498 + .addr = 0x20, 499 + .mask = 0x08, 306 500 }, 307 501 .drdy_irq = { 308 - .addr = ST_ACCEL_3_DRDY_IRQ_ADDR, 309 - .mask_int1 = ST_ACCEL_3_DRDY_IRQ_INT1_MASK, 310 - .mask_int2 = ST_ACCEL_3_DRDY_IRQ_INT2_MASK, 311 - .addr_ihl = ST_ACCEL_3_IHL_IRQ_ADDR, 312 - .mask_ihl = ST_ACCEL_3_IHL_IRQ_MASK, 502 + .addr = 0x23, 503 + .mask_int1 = 0x80, 504 + .mask_int2 = 0x00, 505 + .addr_ihl = 0x23, 506 + .mask_ihl = 0x40, 313 507 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 314 508 .ig1 = { 315 - .en_addr = ST_ACCEL_3_IG1_EN_ADDR, 316 - .en_mask = ST_ACCEL_3_IG1_EN_MASK, 509 + .en_addr = 0x23, 510 + .en_mask = 0x08, 317 511 }, 318 512 }, 319 - .multi_read_bit = ST_ACCEL_3_MULTIREAD_BIT, 513 + .multi_read_bit = false, 320 514 .bootime = 2, 321 515 }, 322 516 { 323 - .wai = ST_ACCEL_4_WAI_EXP, 517 + .wai = 0x3a, 324 518 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 325 519 .sensors_supported = { 326 520 [0] = LIS3LV02DL_ACCEL_DEV_NAME, 327 521 }, 328 522 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 329 523 .odr = { 330 - .addr = ST_ACCEL_4_ODR_ADDR, 331 - .mask = ST_ACCEL_4_ODR_MASK, 524 + .addr = 0x20, 525 + .mask = 0x30, /* DF1 and DF0 */ 332 526 .odr_avl = { 333 - { 40, ST_ACCEL_4_ODR_AVL_40HZ_VAL }, 334 - { 160, ST_ACCEL_4_ODR_AVL_160HZ_VAL, }, 335 - { 640, ST_ACCEL_4_ODR_AVL_640HZ_VAL, }, 336 - { 2560, ST_ACCEL_4_ODR_AVL_2560HZ_VAL, }, 527 + { .hz = 40, .value = 0x00, }, 528 + { .hz = 160, .value = 0x01, }, 529 + { .hz = 640, .value = 0x02, }, 530 + { .hz = 2560, .value = 0x03, }, 337 531 }, 338 532 }, 339 533 .pw = { 340 - .addr = ST_ACCEL_4_PW_ADDR, 341 - .mask = ST_ACCEL_4_PW_MASK, 534 + .addr = 0x20, 535 + .mask = 0xc0, 342 536 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 343 537 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 344 538 }, ··· 347 541 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 348 542 }, 349 543 .fs = { 350 - .addr = ST_ACCEL_4_FS_ADDR, 351 - .mask = ST_ACCEL_4_FS_MASK, 544 + .addr = 0x21, 545 + .mask = 0x80, 352 546 .fs_avl = { 353 547 [0] = { 354 548 .num = ST_ACCEL_FS_AVL_2G, 355 - .value = ST_ACCEL_4_FS_AVL_2_VAL, 356 - .gain = ST_ACCEL_4_FS_AVL_2_GAIN, 549 + .value = 0x00, 550 + .gain = IIO_G_TO_M_S_2(1024), 357 551 }, 358 552 [1] = { 359 553 .num = ST_ACCEL_FS_AVL_6G, 360 - .value = ST_ACCEL_4_FS_AVL_6_VAL, 361 - .gain = ST_ACCEL_4_FS_AVL_6_GAIN, 554 + .value = 0x01, 555 + .gain = IIO_G_TO_M_S_2(340), 362 556 }, 363 557 }, 364 558 }, 365 559 .bdu = { 366 - .addr = ST_ACCEL_4_BDU_ADDR, 367 - .mask = ST_ACCEL_4_BDU_MASK, 560 + .addr = 0x21, 561 + .mask = 0x40, 368 562 }, 369 563 .drdy_irq = { 370 - .addr = ST_ACCEL_4_DRDY_IRQ_ADDR, 371 - .mask_int1 = ST_ACCEL_4_DRDY_IRQ_INT1_MASK, 564 + .addr = 0x21, 565 + .mask_int1 = 0x04, 372 566 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 373 567 }, 374 - .multi_read_bit = ST_ACCEL_4_MULTIREAD_BIT, 568 + .multi_read_bit = true, 375 569 .bootime = 2, /* guess */ 376 570 }, 377 571 { 378 - .wai = ST_ACCEL_5_WAI_EXP, 572 + .wai = 0x3b, 379 573 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 380 574 .sensors_supported = { 381 575 [0] = LIS331DL_ACCEL_DEV_NAME, 382 576 }, 383 577 .ch = (struct iio_chan_spec *)st_accel_8bit_channels, 384 578 .odr = { 385 - .addr = ST_ACCEL_5_ODR_ADDR, 386 - .mask = ST_ACCEL_5_ODR_MASK, 579 + .addr = 0x20, 580 + .mask = 0x80, 387 581 .odr_avl = { 388 - { 100, ST_ACCEL_5_ODR_AVL_100HZ_VAL }, 389 - { 400, ST_ACCEL_5_ODR_AVL_400HZ_VAL, }, 582 + { .hz = 100, .value = 0x00, }, 583 + { .hz = 400, .value = 0x01, }, 390 584 }, 391 585 }, 392 586 .pw = { 393 - .addr = ST_ACCEL_5_PW_ADDR, 394 - .mask = ST_ACCEL_5_PW_MASK, 587 + .addr = 0x20, 588 + .mask = 0x40, 395 589 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 396 590 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 397 591 }, ··· 400 594 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 401 595 }, 402 596 .fs = { 403 - .addr = ST_ACCEL_5_FS_ADDR, 404 - .mask = ST_ACCEL_5_FS_MASK, 597 + .addr = 0x20, 598 + .mask = 0x20, 599 + /* 600 + * TODO: check these resulting gain settings, these are 601 + * not in the datsheet 602 + */ 405 603 .fs_avl = { 406 604 [0] = { 407 605 .num = ST_ACCEL_FS_AVL_2G, 408 - .value = ST_ACCEL_5_FS_AVL_2_VAL, 409 - .gain = ST_ACCEL_5_FS_AVL_2_GAIN, 606 + .value = 0x00, 607 + .gain = IIO_G_TO_M_S_2(18000), 410 608 }, 411 609 [1] = { 412 610 .num = ST_ACCEL_FS_AVL_8G, 413 - .value = ST_ACCEL_5_FS_AVL_8_VAL, 414 - .gain = ST_ACCEL_5_FS_AVL_8_GAIN, 611 + .value = 0x01, 612 + .gain = IIO_G_TO_M_S_2(72000), 415 613 }, 416 614 }, 417 615 }, 418 616 .drdy_irq = { 419 - .addr = ST_ACCEL_5_DRDY_IRQ_ADDR, 420 - .mask_int1 = ST_ACCEL_5_DRDY_IRQ_INT1_MASK, 421 - .mask_int2 = ST_ACCEL_5_DRDY_IRQ_INT2_MASK, 422 - .addr_ihl = ST_ACCEL_5_IHL_IRQ_ADDR, 423 - .mask_ihl = ST_ACCEL_5_IHL_IRQ_MASK, 424 - .addr_od = ST_ACCEL_5_OD_IRQ_ADDR, 425 - .mask_od = ST_ACCEL_5_OD_IRQ_MASK, 617 + .addr = 0x22, 618 + .mask_int1 = 0x04, 619 + .mask_int2 = 0x20, 620 + .addr_ihl = 0x22, 621 + .mask_ihl = 0x80, 622 + .addr_od = 0x22, 623 + .mask_od = 0x40, 426 624 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 427 625 }, 428 - .multi_read_bit = ST_ACCEL_5_MULTIREAD_BIT, 626 + .multi_read_bit = false, 429 627 .bootime = 2, /* guess */ 430 628 }, 431 629 { 432 - .wai = ST_ACCEL_6_WAI_EXP, 630 + .wai = 0x32, 433 631 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 434 632 .sensors_supported = { 435 633 [0] = H3LIS331DL_DRIVER_NAME, 436 634 }, 437 635 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 438 636 .odr = { 439 - .addr = ST_ACCEL_6_ODR_ADDR, 440 - .mask = ST_ACCEL_6_ODR_MASK, 637 + .addr = 0x20, 638 + .mask = 0x18, 441 639 .odr_avl = { 442 - { 50, ST_ACCEL_6_ODR_AVL_50HZ_VAL }, 443 - { 100, ST_ACCEL_6_ODR_AVL_100HZ_VAL, }, 444 - { 400, ST_ACCEL_6_ODR_AVL_400HZ_VAL, }, 445 - { 1000, ST_ACCEL_6_ODR_AVL_1000HZ_VAL, }, 640 + { .hz = 50, .value = 0x00, }, 641 + { .hz = 100, .value = 0x01, }, 642 + { .hz = 400, .value = 0x02, }, 643 + { .hz = 1000, .value = 0x03, }, 446 644 }, 447 645 }, 448 646 .pw = { 449 - .addr = ST_ACCEL_6_PW_ADDR, 450 - .mask = ST_ACCEL_6_PW_MASK, 647 + .addr = 0x20, 648 + .mask = 0x20, 451 649 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 452 650 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 453 651 }, ··· 460 650 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 461 651 }, 462 652 .fs = { 463 - .addr = ST_ACCEL_6_FS_ADDR, 464 - .mask = ST_ACCEL_6_FS_MASK, 653 + .addr = 0x23, 654 + .mask = 0x30, 465 655 .fs_avl = { 466 656 [0] = { 467 657 .num = ST_ACCEL_FS_AVL_100G, 468 - .value = ST_ACCEL_6_FS_AVL_100_VAL, 469 - .gain = ST_ACCEL_6_FS_AVL_100_GAIN, 658 + .value = 0x00, 659 + .gain = IIO_G_TO_M_S_2(49000), 470 660 }, 471 661 [1] = { 472 662 .num = ST_ACCEL_FS_AVL_200G, 473 - .value = ST_ACCEL_6_FS_AVL_200_VAL, 474 - .gain = ST_ACCEL_6_FS_AVL_200_GAIN, 663 + .value = 0x01, 664 + .gain = IIO_G_TO_M_S_2(98000), 475 665 }, 476 666 [2] = { 477 667 .num = ST_ACCEL_FS_AVL_400G, 478 - .value = ST_ACCEL_6_FS_AVL_400_VAL, 479 - .gain = ST_ACCEL_6_FS_AVL_400_GAIN, 668 + .value = 0x03, 669 + .gain = IIO_G_TO_M_S_2(195000), 480 670 }, 481 671 }, 482 672 }, 483 673 .bdu = { 484 - .addr = ST_ACCEL_6_BDU_ADDR, 485 - .mask = ST_ACCEL_6_BDU_MASK, 674 + .addr = 0x23, 675 + .mask = 0x80, 486 676 }, 487 677 .drdy_irq = { 488 - .addr = ST_ACCEL_6_DRDY_IRQ_ADDR, 489 - .mask_int1 = ST_ACCEL_6_DRDY_IRQ_INT1_MASK, 490 - .mask_int2 = ST_ACCEL_6_DRDY_IRQ_INT2_MASK, 491 - .addr_ihl = ST_ACCEL_6_IHL_IRQ_ADDR, 492 - .mask_ihl = ST_ACCEL_6_IHL_IRQ_MASK, 678 + .addr = 0x22, 679 + .mask_int1 = 0x02, 680 + .mask_int2 = 0x10, 681 + .addr_ihl = 0x22, 682 + .mask_ihl = 0x80, 493 683 }, 494 - .multi_read_bit = ST_ACCEL_6_MULTIREAD_BIT, 684 + .multi_read_bit = true, 495 685 .bootime = 2, 496 686 }, 497 687 { ··· 501 691 }, 502 692 .ch = (struct iio_chan_spec *)st_accel_12bit_channels, 503 693 .odr = { 504 - .addr = ST_ACCEL_7_ODR_ADDR, 505 - .mask = ST_ACCEL_7_ODR_MASK, 694 + .addr = 0x20, 695 + .mask = 0x30, 506 696 .odr_avl = { 507 - { 280, ST_ACCEL_7_ODR_AVL_280HZ_VAL, }, 508 - { 560, ST_ACCEL_7_ODR_AVL_560HZ_VAL, }, 509 - { 1120, ST_ACCEL_7_ODR_AVL_1120HZ_VAL, }, 510 - { 4480, ST_ACCEL_7_ODR_AVL_4480HZ_VAL, }, 697 + { .hz = 280, .value = 0x00, }, 698 + { .hz = 560, .value = 0x01, }, 699 + { .hz = 1120, .value = 0x02, }, 700 + { .hz = 4480, .value = 0x03, }, 511 701 }, 512 702 }, 513 703 .pw = { 514 - .addr = ST_ACCEL_7_PW_ADDR, 515 - .mask = ST_ACCEL_7_PW_MASK, 704 + .addr = 0x20, 705 + .mask = 0xc0, 516 706 .value_on = ST_SENSORS_DEFAULT_POWER_ON_VALUE, 517 707 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 518 708 }, ··· 524 714 .fs_avl = { 525 715 [0] = { 526 716 .num = ST_ACCEL_FS_AVL_2G, 527 - .gain = ST_ACCEL_7_FS_AVL_2_GAIN, 717 + .gain = IIO_G_TO_M_S_2(488), 528 718 }, 529 719 }, 530 720 }, ··· 535 725 .bdu = { 536 726 }, 537 727 .drdy_irq = { 538 - .addr = ST_ACCEL_7_DRDY_IRQ_ADDR, 539 - .mask_int1 = ST_ACCEL_7_DRDY_IRQ_INT1_MASK, 728 + .addr = 0x21, 729 + .mask_int1 = 0x04, 540 730 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 541 731 }, 542 - .multi_read_bit = ST_ACCEL_7_MULTIREAD_BIT, 732 + .multi_read_bit = false, 543 733 .bootime = 2, 544 734 }, 545 735 { 546 - .wai = ST_ACCEL_1_WAI_EXP, 736 + .wai = 0x33, 547 737 .wai_addr = ST_SENSORS_DEFAULT_WAI_ADDRESS, 548 738 .sensors_supported = { 549 739 [0] = LNG2DM_ACCEL_DEV_NAME, 550 740 }, 551 741 .ch = (struct iio_chan_spec *)st_accel_8bit_channels, 552 742 .odr = { 553 - .addr = ST_ACCEL_1_ODR_ADDR, 554 - .mask = ST_ACCEL_1_ODR_MASK, 743 + .addr = 0x20, 744 + .mask = 0xf0, 555 745 .odr_avl = { 556 - { 1, ST_ACCEL_1_ODR_AVL_1HZ_VAL, }, 557 - { 10, ST_ACCEL_1_ODR_AVL_10HZ_VAL, }, 558 - { 25, ST_ACCEL_1_ODR_AVL_25HZ_VAL, }, 559 - { 50, ST_ACCEL_1_ODR_AVL_50HZ_VAL, }, 560 - { 100, ST_ACCEL_1_ODR_AVL_100HZ_VAL, }, 561 - { 200, ST_ACCEL_1_ODR_AVL_200HZ_VAL, }, 562 - { 400, ST_ACCEL_1_ODR_AVL_400HZ_VAL, }, 563 - { 1600, ST_ACCEL_1_ODR_AVL_1600HZ_VAL, }, 746 + { .hz = 1, .value = 0x01, }, 747 + { .hz = 10, .value = 0x02, }, 748 + { .hz = 25, .value = 0x03, }, 749 + { .hz = 50, .value = 0x04, }, 750 + { .hz = 100, .value = 0x05, }, 751 + { .hz = 200, .value = 0x06, }, 752 + { .hz = 400, .value = 0x07, }, 753 + { .hz = 1600, .value = 0x08, }, 564 754 }, 565 755 }, 566 756 .pw = { 567 - .addr = ST_ACCEL_1_ODR_ADDR, 568 - .mask = ST_ACCEL_1_ODR_MASK, 757 + .addr = 0x20, 758 + .mask = 0xf0, 569 759 .value_off = ST_SENSORS_DEFAULT_POWER_OFF_VALUE, 570 760 }, 571 761 .enable_axis = { ··· 573 763 .mask = ST_SENSORS_DEFAULT_AXIS_MASK, 574 764 }, 575 765 .fs = { 576 - .addr = ST_ACCEL_1_FS_ADDR, 577 - .mask = ST_ACCEL_1_FS_MASK, 766 + .addr = 0x23, 767 + .mask = 0x30, 578 768 .fs_avl = { 579 769 [0] = { 580 770 .num = ST_ACCEL_FS_AVL_2G, 581 - .value = ST_ACCEL_1_FS_AVL_2_VAL, 582 - .gain = ST_ACCEL_8_FS_AVL_2_GAIN, 771 + .value = 0x00, 772 + .gain = IIO_G_TO_M_S_2(15600), 583 773 }, 584 774 [1] = { 585 775 .num = ST_ACCEL_FS_AVL_4G, 586 - .value = ST_ACCEL_1_FS_AVL_4_VAL, 587 - .gain = ST_ACCEL_8_FS_AVL_4_GAIN, 776 + .value = 0x01, 777 + .gain = IIO_G_TO_M_S_2(31200), 588 778 }, 589 779 [2] = { 590 780 .num = ST_ACCEL_FS_AVL_8G, 591 - .value = ST_ACCEL_1_FS_AVL_8_VAL, 592 - .gain = ST_ACCEL_8_FS_AVL_8_GAIN, 781 + .value = 0x02, 782 + .gain = IIO_G_TO_M_S_2(62500), 593 783 }, 594 784 [3] = { 595 785 .num = ST_ACCEL_FS_AVL_16G, 596 - .value = ST_ACCEL_1_FS_AVL_16_VAL, 597 - .gain = ST_ACCEL_8_FS_AVL_16_GAIN, 786 + .value = 0x03, 787 + .gain = IIO_G_TO_M_S_2(187500), 598 788 }, 599 789 }, 600 790 }, 601 791 .drdy_irq = { 602 - .addr = ST_ACCEL_1_DRDY_IRQ_ADDR, 603 - .mask_int1 = ST_ACCEL_1_DRDY_IRQ_INT1_MASK, 604 - .mask_int2 = ST_ACCEL_1_DRDY_IRQ_INT2_MASK, 605 - .addr_ihl = ST_ACCEL_1_IHL_IRQ_ADDR, 606 - .mask_ihl = ST_ACCEL_1_IHL_IRQ_MASK, 792 + .addr = 0x22, 793 + .mask_int1 = 0x10, 794 + .mask_int2 = 0x08, 795 + .addr_ihl = 0x25, 796 + .mask_ihl = 0x02, 607 797 .addr_stat_drdy = ST_SENSORS_DEFAULT_STAT_ADDR, 608 798 }, 609 - .multi_read_bit = ST_ACCEL_1_MULTIREAD_BIT, 799 + .multi_read_bit = true, 610 800 .bootime = 2, 611 801 }, 612 802 };