tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
mfd: rtsx: Add support for RTL8411B
Adding support of model RTL8411B. Since the model is similar to RTL8411,
differences are implemented in rtl8411.c.
Signed-off-by: Roger Tseng <rogerable@realtek.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
authored by
Roger Tseng
and committed by
Samuel Ortiz
9032eabd
15447a46
+139
+132
drivers/mfd/rtl8411.c
+132
drivers/mfd/rtl8411.c
···
35
35
return val & 0x0F;
36
36
}
37
37
38
+
static int rtl8411b_is_qfn48(struct rtsx_pcr *pcr)
39
+
{
40
+
u8 val = 0;
41
+
42
+
rtsx_pci_read_register(pcr, RTL8411B_PACKAGE_MODE, &val);
43
+
44
+
if (val & 0x2)
45
+
return 1;
46
+
else
47
+
return 0;
48
+
}
49
+
38
50
static int rtl8411_extra_init_hw(struct rtsx_pcr *pcr)
39
51
{
52
+
return rtsx_pci_write_register(pcr, CD_PAD_CTL,
53
+
CD_DISABLE_MASK | CD_AUTO_DISABLE, CD_ENABLE);
54
+
}
55
+
56
+
static int rtl8411b_extra_init_hw(struct rtsx_pcr *pcr)
57
+
{
58
+
if (rtl8411b_is_qfn48(pcr))
59
+
rtsx_pci_write_register(pcr, CARD_PULL_CTL3, 0xFF, 0xF5);
60
+
40
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return rtsx_pci_write_register(pcr, CD_PAD_CTL,
41
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CD_DISABLE_MASK | CD_AUTO_DISABLE, CD_ENABLE);
42
63
}
···
235
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.conv_clk_and_div_n = rtl8411_conv_clk_and_div_n,
236
215
};
237
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217
+
static const struct pcr_ops rtl8411b_pcr_ops = {
218
+
.extra_init_hw = rtl8411b_extra_init_hw,
219
+
.optimize_phy = NULL,
220
+
.turn_on_led = rtl8411_turn_on_led,
221
+
.turn_off_led = rtl8411_turn_off_led,
222
+
.enable_auto_blink = rtl8411_enable_auto_blink,
223
+
.disable_auto_blink = rtl8411_disable_auto_blink,
224
+
.card_power_on = rtl8411_card_power_on,
225
+
.card_power_off = rtl8411_card_power_off,
226
+
.switch_output_voltage = rtl8411_switch_output_voltage,
227
+
.cd_deglitch = rtl8411_cd_deglitch,
228
+
.conv_clk_and_div_n = rtl8411_conv_clk_and_div_n,
229
+
};
230
+
238
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/* SD Pull Control Enable:
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* SD_DAT[3:0] ==> pull up
240
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* SD_CD ==> pull up
···
311
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0,
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};
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+
static const u32 rtl8411b_qfn64_sd_pull_ctl_enable_tbl[] = {
280
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RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA),
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+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
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+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x09 | 0xD0),
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+
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x09 | 0x50),
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+
RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05 | 0x50),
285
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
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+
0,
287
+
};
288
+
289
+
static const u32 rtl8411b_qfn48_sd_pull_ctl_enable_tbl[] = {
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+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
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+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x69 | 0x90),
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+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x08 | 0x11),
293
+
0,
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+
};
295
+
296
+
static const u32 rtl8411b_qfn64_sd_pull_ctl_disable_tbl[] = {
297
+
RTSX_REG_PAIR(CARD_PULL_CTL1, 0x65),
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+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
299
+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x05 | 0xD0),
300
+
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x09 | 0x50),
301
+
RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05 | 0x50),
302
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
303
+
0,
304
+
};
305
+
306
+
static const u32 rtl8411b_qfn48_sd_pull_ctl_disable_tbl[] = {
307
+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
308
+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x65 | 0x90),
309
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
310
+
0,
311
+
};
312
+
313
+
static const u32 rtl8411b_qfn64_ms_pull_ctl_enable_tbl[] = {
314
+
RTSX_REG_PAIR(CARD_PULL_CTL1, 0x65),
315
+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
316
+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x05 | 0xD0),
317
+
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x05 | 0x50),
318
+
RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05 | 0x50),
319
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
320
+
0,
321
+
};
322
+
323
+
static const u32 rtl8411b_qfn48_ms_pull_ctl_enable_tbl[] = {
324
+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
325
+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x65 | 0x90),
326
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
327
+
0,
328
+
};
329
+
330
+
static const u32 rtl8411b_qfn64_ms_pull_ctl_disable_tbl[] = {
331
+
RTSX_REG_PAIR(CARD_PULL_CTL1, 0x65),
332
+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
333
+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x05 | 0xD0),
334
+
RTSX_REG_PAIR(CARD_PULL_CTL4, 0x09 | 0x50),
335
+
RTSX_REG_PAIR(CARD_PULL_CTL5, 0x05 | 0x50),
336
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
337
+
0,
338
+
};
339
+
340
+
static const u32 rtl8411b_qfn48_ms_pull_ctl_disable_tbl[] = {
341
+
RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
342
+
RTSX_REG_PAIR(CARD_PULL_CTL3, 0x65 | 0x90),
343
+
RTSX_REG_PAIR(CARD_PULL_CTL6, 0x04 | 0x11),
344
+
0,
345
+
};
346
+
314
347
void rtl8411_init_params(struct rtsx_pcr *pcr)
315
348
{
316
349
pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
···
390
287
pcr->sd_pull_ctl_disable_tbl = rtl8411_sd_pull_ctl_disable_tbl;
391
288
pcr->ms_pull_ctl_enable_tbl = rtl8411_ms_pull_ctl_enable_tbl;
392
289
pcr->ms_pull_ctl_disable_tbl = rtl8411_ms_pull_ctl_disable_tbl;
290
+
}
291
+
292
+
void rtl8411b_init_params(struct rtsx_pcr *pcr)
293
+
{
294
+
pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
295
+
pcr->num_slots = 2;
296
+
pcr->ops = &rtl8411b_pcr_ops;
297
+
298
+
pcr->ic_version = rtl8411_get_ic_version(pcr);
299
+
300
+
if (rtl8411b_is_qfn48(pcr)) {
301
+
pcr->sd_pull_ctl_enable_tbl =
302
+
rtl8411b_qfn48_sd_pull_ctl_enable_tbl;
303
+
pcr->sd_pull_ctl_disable_tbl =
304
+
rtl8411b_qfn48_sd_pull_ctl_disable_tbl;
305
+
pcr->ms_pull_ctl_enable_tbl =
306
+
rtl8411b_qfn48_ms_pull_ctl_enable_tbl;
307
+
pcr->ms_pull_ctl_disable_tbl =
308
+
rtl8411b_qfn48_ms_pull_ctl_disable_tbl;
309
+
} else {
310
+
pcr->sd_pull_ctl_enable_tbl =
311
+
rtl8411b_qfn64_sd_pull_ctl_enable_tbl;
312
+
pcr->sd_pull_ctl_disable_tbl =
313
+
rtl8411b_qfn64_sd_pull_ctl_disable_tbl;
314
+
pcr->ms_pull_ctl_enable_tbl =
315
+
rtl8411b_qfn64_ms_pull_ctl_enable_tbl;
316
+
pcr->ms_pull_ctl_disable_tbl =
317
+
rtl8411b_qfn64_ms_pull_ctl_disable_tbl;
318
+
}
393
319
}
+5
drivers/mfd/rtsx_pcr.c
+5
drivers/mfd/rtsx_pcr.c
···
57
57
{ PCI_DEVICE(0x10EC, 0x5289), PCI_CLASS_OTHERS << 16, 0xFF0000 },
58
58
{ PCI_DEVICE(0x10EC, 0x5227), PCI_CLASS_OTHERS << 16, 0xFF0000 },
59
59
{ PCI_DEVICE(0x10EC, 0x5249), PCI_CLASS_OTHERS << 16, 0xFF0000 },
60
+
{ PCI_DEVICE(0x10EC, 0x5287), PCI_CLASS_OTHERS << 16, 0xFF0000 },
60
61
{ 0, }
61
62
};
62
63
···
1038
1037
1039
1038
case 0x5249:
1040
1039
rts5249_init_params(pcr);
1040
+
break;
1041
+
1042
+
case 0x5287:
1043
+
rtl8411b_init_params(pcr);
1041
1044
break;
1042
1045
}
1043
1046
+1
drivers/mfd/rtsx_pcr.h
+1
drivers/mfd/rtsx_pcr.h