tjh.dev / kernel
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mtd: spi-nor: rename SPINOR_OP_* macros of the 4-byte address op codes

This patch renames the SPINOR_OP_* macros of the 4-byte address
instruction set so the new names all share a common pattern: the 4-byte
address name is built from the 3-byte address name appending the "_4B"
suffix.

The patch also introduces new op codes to support other SPI protocols such
as SPI 1-4-4 and SPI 1-2-2.

This is a transitional patch and will help a later patch of spi-nor.c
to automate the translation from the 3-byte address op codes into their
4-byte address version.

Signed-off-by: Cyrille Pitchen <cyrille.pitchen@atmel.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Marek Vasut <marek.vasut@gmail.com>

Cyrille Pitchen 902cc69a 9e276de6

+37 -34
-7
drivers/mtd/devices/serial_flash_cmds.h
··· 18 18 #define SPINOR_OP_RDVCR 0x85 19 19 20 20 /* JEDEC Standard - Serial Flash Discoverable Parmeters (SFDP) Commands */ 21 - #define SPINOR_OP_READ_1_2_2 0xbb /* DUAL I/O READ */ 22 - #define SPINOR_OP_READ_1_4_4 0xeb /* QUAD I/O READ */ 23 - 24 21 #define SPINOR_OP_WRITE 0x02 /* PAGE PROGRAM */ 25 22 #define SPINOR_OP_WRITE_1_1_2 0xa2 /* DUAL INPUT PROGRAM */ 26 23 #define SPINOR_OP_WRITE_1_2_2 0xd2 /* DUAL INPUT EXT PROGRAM */ 27 24 #define SPINOR_OP_WRITE_1_1_4 0x32 /* QUAD INPUT PROGRAM */ 28 25 #define SPINOR_OP_WRITE_1_4_4 0x12 /* QUAD INPUT EXT PROGRAM */ 29 - 30 - /* READ commands with 32-bit addressing */ 31 - #define SPINOR_OP_READ4_1_2_2 0xbc 32 - #define SPINOR_OP_READ4_1_4_4 0xec 33 26 34 27 /* Configuration flags */ 35 28 #define FLASH_FLAG_SINGLE 0x000000ff
+14 -14
drivers/mtd/devices/st_spi_fsm.c
··· 507 507 * - 'FAST' variants configured for 8 dummy cycles (see note above.) 508 508 */ 509 509 static struct seq_rw_config n25q_read4_configs[] = { 510 - {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 0, 8}, 511 - {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, 512 - {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 0, 8}, 513 - {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, 514 - {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, 515 - {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0}, 516 - {0x00, 0, 0, 0, 0, 0x00, 0, 0}, 510 + {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 0, 8}, 511 + {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8}, 512 + {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 0, 8}, 513 + {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8}, 514 + {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8}, 515 + {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0}, 516 + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, 517 517 }; 518 518 519 519 /* ··· 553 553 * entering a state that is incompatible with the SPIBoot Controller. 554 554 */ 555 555 static struct seq_rw_config stfsm_s25fl_read4_configs[] = { 556 - {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ4_1_4_4, 0, 4, 4, 0x00, 2, 4}, 557 - {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ4_1_1_4, 0, 1, 4, 0x00, 0, 8}, 558 - {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ4_1_2_2, 0, 2, 2, 0x00, 4, 0}, 559 - {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ4_1_1_2, 0, 1, 2, 0x00, 0, 8}, 560 - {FLASH_FLAG_READ_FAST, SPINOR_OP_READ4_FAST, 0, 1, 1, 0x00, 0, 8}, 561 - {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ4, 0, 1, 1, 0x00, 0, 0}, 562 - {0x00, 0, 0, 0, 0, 0x00, 0, 0}, 556 + {FLASH_FLAG_READ_1_4_4, SPINOR_OP_READ_1_4_4_4B, 0, 4, 4, 0x00, 2, 4}, 557 + {FLASH_FLAG_READ_1_1_4, SPINOR_OP_READ_1_1_4_4B, 0, 1, 4, 0x00, 0, 8}, 558 + {FLASH_FLAG_READ_1_2_2, SPINOR_OP_READ_1_2_2_4B, 0, 2, 2, 0x00, 4, 0}, 559 + {FLASH_FLAG_READ_1_1_2, SPINOR_OP_READ_1_1_2_4B, 0, 1, 2, 0x00, 0, 8}, 560 + {FLASH_FLAG_READ_FAST, SPINOR_OP_READ_FAST_4B, 0, 1, 1, 0x00, 0, 8}, 561 + {FLASH_FLAG_READ_WRITE, SPINOR_OP_READ_4B, 0, 1, 1, 0x00, 0, 0}, 562 + {0x00, 0, 0, 0, 0, 0x00, 0, 0}, 563 563 }; 564 564 565 565 static struct seq_rw_config stfsm_s25fl_write4_configs[] = {
+4 -4
drivers/mtd/spi-nor/spi-nor.c
··· 1625 1625 /* Dedicated 4-byte command set */ 1626 1626 switch (nor->flash_read) { 1627 1627 case SPI_NOR_QUAD: 1628 - nor->read_opcode = SPINOR_OP_READ4_1_1_4; 1628 + nor->read_opcode = SPINOR_OP_READ_1_1_4_4B; 1629 1629 break; 1630 1630 case SPI_NOR_DUAL: 1631 - nor->read_opcode = SPINOR_OP_READ4_1_1_2; 1631 + nor->read_opcode = SPINOR_OP_READ_1_1_2_4B; 1632 1632 break; 1633 1633 case SPI_NOR_FAST: 1634 - nor->read_opcode = SPINOR_OP_READ4_FAST; 1634 + nor->read_opcode = SPINOR_OP_READ_FAST_4B; 1635 1635 break; 1636 1636 case SPI_NOR_NORMAL: 1637 - nor->read_opcode = SPINOR_OP_READ4; 1637 + nor->read_opcode = SPINOR_OP_READ_4B; 1638 1638 break; 1639 1639 } 1640 1640 nor->program_opcode = SPINOR_OP_PP_4B;
+3 -3
drivers/spi/spi-bcm-qspi.c
··· 371 371 /* default mode, does not need flex_cmd */ 372 372 flex_mode = 0; 373 373 else 374 - command = SPINOR_OP_READ4_FAST; 374 + command = SPINOR_OP_READ_FAST_4B; 375 375 break; 376 376 case SPI_NBITS_DUAL: 377 377 bpc = 0x00000001; ··· 384 384 } else { 385 385 command = SPINOR_OP_READ_1_1_2; 386 386 if (spans_4byte) 387 - command = SPINOR_OP_READ4_1_1_2; 387 + command = SPINOR_OP_READ_1_1_2_4B; 388 388 } 389 389 break; 390 390 case SPI_NBITS_QUAD: ··· 399 399 } else { 400 400 command = SPINOR_OP_READ_1_1_4; 401 401 if (spans_4byte) 402 - command = SPINOR_OP_READ4_1_1_4; 402 + command = SPINOR_OP_READ_1_1_4_4B; 403 403 } 404 404 break; 405 405 default:
+16 -6
include/linux/mtd/spi-nor.h
··· 43 43 #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */ 44 44 #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */ 45 45 #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */ 46 - #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual SPI) */ 47 - #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad SPI) */ 46 + #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */ 47 + #define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */ 48 + #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */ 49 + #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */ 48 50 #define SPINOR_OP_PP 0x02 /* Page program (up to 256 bytes) */ 51 + #define SPINOR_OP_PP_1_1_4 0x32 /* Quad page program */ 52 + #define SPINOR_OP_PP_1_4_4 0x38 /* Quad page program */ 49 53 #define SPINOR_OP_BE_4K 0x20 /* Erase 4KiB block */ 50 54 #define SPINOR_OP_BE_4K_PMC 0xd7 /* Erase 4KiB block on PMC chips */ 51 55 #define SPINOR_OP_BE_32K 0x52 /* Erase 32KiB block */ ··· 60 56 #define SPINOR_OP_RDFSR 0x70 /* Read flag status register */ 61 57 62 58 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */ 63 - #define SPINOR_OP_READ4 0x13 /* Read data bytes (low frequency) */ 64 - #define SPINOR_OP_READ4_FAST 0x0c /* Read data bytes (high frequency) */ 65 - #define SPINOR_OP_READ4_1_1_2 0x3c /* Read data bytes (Dual SPI) */ 66 - #define SPINOR_OP_READ4_1_1_4 0x6c /* Read data bytes (Quad SPI) */ 59 + #define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */ 60 + #define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */ 61 + #define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */ 62 + #define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */ 63 + #define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */ 64 + #define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */ 67 65 #define SPINOR_OP_PP_4B 0x12 /* Page program (up to 256 bytes) */ 66 + #define SPINOR_OP_PP_1_1_4_4B 0x34 /* Quad page program */ 67 + #define SPINOR_OP_PP_1_4_4_4B 0x3e /* Quad page program */ 68 + #define SPINOR_OP_BE_4K_4B 0x21 /* Erase 4KiB block */ 69 + #define SPINOR_OP_BE_32K_4B 0x5c /* Erase 32KiB block */ 68 70 #define SPINOR_OP_SE_4B 0xdc /* Sector erase (usually 64KiB) */ 69 71 70 72 /* Used for SST flashes only. */