Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: Remove imx6qdl-victgo.dtsi

The common base is now identical to imx6qdl-vicut1.dtsi, so we can remove
one of both.

Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

David Jander and committed by
Shawn Guo
901e8f8f 217390ad

+1 -659
+1 -1
arch/arm/boot/dts/imx6dl-victgo.dts
··· 6 6 7 7 /dts-v1/; 8 8 #include "imx6dl.dtsi" 9 - #include "imx6qdl-victgo.dtsi" 9 + #include "imx6qdl-vicut1.dtsi" 10 10 11 11 / { 12 12 model = "Kverneland TGO";
-658
arch/arm/boot/dts/imx6qdl-victgo.dtsi
··· 1 - // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2 - /* 3 - * Copyright (c) 2016 Protonic Holland 4 - * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix 5 - */ 6 - 7 - #include <dt-bindings/display/sdtv-standards.h> 8 - #include <dt-bindings/gpio/gpio.h> 9 - #include <dt-bindings/input/input.h> 10 - #include <dt-bindings/leds/common.h> 11 - #include <dt-bindings/media/tvp5150.h> 12 - #include <dt-bindings/sound/fsl-imx-audmux.h> 13 - 14 - / { 15 - chosen { 16 - stdout-path = &uart4; 17 - }; 18 - 19 - backlight_lcd: backlight { 20 - compatible = "pwm-backlight"; 21 - pinctrl-names = "default"; 22 - pinctrl-0 = <&pinctrl_backlight>; 23 - pwms = <&pwm1 0 5000000 0>; 24 - brightness-levels = <0 16 64 255>; 25 - num-interpolated-steps = <16>; 26 - default-brightness-level = <48>; 27 - power-supply = <&reg_3v3>; 28 - enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 29 - }; 30 - 31 - backlight_led: backlight_led { 32 - compatible = "pwm-backlight"; 33 - pwms = <&pwm3 0 5000000 0>; 34 - brightness-levels = <0 16 64 255>; 35 - num-interpolated-steps = <16>; 36 - default-brightness-level = <48>; 37 - power-supply = <&reg_3v3>; 38 - }; 39 - 40 - connector { 41 - compatible = "composite-video-connector"; 42 - label = "Composite0"; 43 - sdtv-standards = <SDTV_STD_PAL_B>; 44 - 45 - port { 46 - comp0_out: endpoint { 47 - remote-endpoint = <&tvp5150_comp0_in>; 48 - }; 49 - }; 50 - }; 51 - 52 - counter-0 { 53 - compatible = "interrupt-counter"; 54 - pinctrl-names = "default"; 55 - pinctrl-0 = <&pinctrl_counter0>; 56 - gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; 57 - }; 58 - 59 - counter-1 { 60 - compatible = "interrupt-counter"; 61 - pinctrl-names = "default"; 62 - pinctrl-0 = <&pinctrl_counter1>; 63 - gpios = <&gpio2 1 GPIO_ACTIVE_LOW>; 64 - }; 65 - 66 - counter-2 { 67 - compatible = "interrupt-counter"; 68 - pinctrl-names = "default"; 69 - pinctrl-0 = <&pinctrl_counter2>; 70 - gpios = <&gpio2 2 GPIO_ACTIVE_LOW>; 71 - }; 72 - 73 - leds { 74 - compatible = "gpio-leds"; 75 - pinctrl-names = "default"; 76 - pinctrl-0 = <&pinctrl_leds>; 77 - 78 - led-0 { 79 - label = "debug0"; 80 - function = LED_FUNCTION_HEARTBEAT; 81 - gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 82 - linux,default-trigger = "heartbeat"; 83 - }; 84 - 85 - led-1 { 86 - label = "debug1"; 87 - function = LED_FUNCTION_DISK; 88 - gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 89 - linux,default-trigger = "disk-activity"; 90 - }; 91 - 92 - led-2 { 93 - label = "power_led"; 94 - function = LED_FUNCTION_POWER; 95 - gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>; 96 - default-state = "on"; 97 - }; 98 - }; 99 - 100 - reg_1v8: regulator-1v8 { 101 - compatible = "regulator-fixed"; 102 - regulator-name = "1v8"; 103 - regulator-min-microvolt = <1800000>; 104 - regulator-max-microvolt = <1800000>; 105 - }; 106 - 107 - reg_3v3: regulator-3v3 { 108 - compatible = "regulator-fixed"; 109 - regulator-name = "3v3"; 110 - regulator-min-microvolt = <3300000>; 111 - regulator-max-microvolt = <3300000>; 112 - }; 113 - 114 - reg_otg_vbus: regulator-otg-vbus { 115 - compatible = "regulator-fixed"; 116 - regulator-name = "otg-vbus"; 117 - regulator-min-microvolt = <5000000>; 118 - regulator-max-microvolt = <5000000>; 119 - gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 120 - enable-active-high; 121 - }; 122 - 123 - sound { 124 - compatible = "simple-audio-card"; 125 - simple-audio-card,name = "prti6q-sgtl5000"; 126 - simple-audio-card,format = "i2s"; 127 - simple-audio-card,widgets = 128 - "Microphone", "Microphone Jack", 129 - "Line", "Line In Jack", 130 - "Headphone", "Headphone Jack", 131 - "Speaker", "External Speaker"; 132 - simple-audio-card,routing = 133 - "MIC_IN", "Microphone Jack", 134 - "LINE_IN", "Line In Jack", 135 - "Headphone Jack", "HP_OUT", 136 - "External Speaker", "LINE_OUT"; 137 - 138 - simple-audio-card,cpu { 139 - sound-dai = <&ssi1>; 140 - system-clock-frequency = <0>; /* Do NOT call fsl_ssi_set_dai_sysclk! */ 141 - }; 142 - 143 - simple-audio-card,codec { 144 - sound-dai = <&codec>; 145 - bitclock-master; 146 - frame-master; 147 - }; 148 - }; 149 - }; 150 - 151 - &audmux { 152 - pinctrl-names = "default"; 153 - pinctrl-0 = <&pinctrl_audmux>; 154 - status = "okay"; 155 - 156 - mux-ssi1 { 157 - fsl,audmux-port = <0>; 158 - fsl,port-config = < 159 - IMX_AUDMUX_V2_PTCR_SYN 0 160 - IMX_AUDMUX_V2_PTCR_TFSEL(2) 0 161 - IMX_AUDMUX_V2_PTCR_TCSEL(2) 0 162 - IMX_AUDMUX_V2_PTCR_TFSDIR 0 163 - IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2) 164 - >; 165 - }; 166 - 167 - mux-pins3 { 168 - fsl,audmux-port = <2>; 169 - fsl,port-config = < 170 - IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0) 171 - 0 IMX_AUDMUX_V2_PDCR_TXRXEN 172 - >; 173 - }; 174 - }; 175 - 176 - &can1 { 177 - pinctrl-names = "default"; 178 - pinctrl-0 = <&pinctrl_can1>; 179 - termination-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>; 180 - termination-ohms = <150>; 181 - status = "okay"; 182 - }; 183 - 184 - &can2 { 185 - pinctrl-names = "default"; 186 - pinctrl-0 = <&pinctrl_can2>; 187 - status = "okay"; 188 - }; 189 - 190 - &clks { 191 - assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>; 192 - assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>; 193 - }; 194 - 195 - &ecspi1 { 196 - cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 197 - pinctrl-names = "default"; 198 - pinctrl-0 = <&pinctrl_ecspi1>; 199 - status = "okay"; 200 - 201 - flash@0 { 202 - compatible = "jedec,spi-nor"; 203 - reg = <0>; 204 - spi-max-frequency = <20000000>; 205 - }; 206 - }; 207 - 208 - &gpio2 { 209 - gpio-line-names = 210 - "YACO_WHEEL", "YACO_RADAR", "YACO_PTO", "", "", "", "", "", 211 - "", "LED_PWM", "", "", "", 212 - "", "", "", 213 - "", "", "", "", "", "ISB_IN2", "ISB_nIN1", "ON_SWITCH", 214 - "POWER_LED", "", "", "", "", "", "", ""; 215 - }; 216 - 217 - &gpio3 { 218 - gpio-line-names = 219 - "", "", "", "", "", "", "", "", 220 - "", "", "", "", "", "", "", "", 221 - "ECSPI1_SCLK", "ECSPI1_MISO", "ECSPI1_MOSI", "ECSPI1_SS1", 222 - "CPU_ON1_FB", "USB_OTG_OC", "USB_OTG_PWR", "YACO_IRQ", 223 - "TSS_TXD", "TSS_RXD", "", "", "", "", "YACO_BOOT0", 224 - "YACO_RESET"; 225 - }; 226 - 227 - &gpio7 { 228 - gpio-line-names = 229 - "EMMC_DAT5", "EMMC_DAT4", "EMMC_CMD", "EMMC_CLK", "EMMC_DAT0", 230 - "EMMC_DAT1", "EMMC_DAT2", "EMMC_DAT3", 231 - "EMMC_RST", "", "", "", "CAM_DETECT", "", "", "", 232 - "", "EMMC_DAT7", "EMMC_DAT6", "", "", "", "", "", 233 - "", "", "", "", "", "", "", ""; 234 - }; 235 - 236 - &i2c1 { 237 - clock-frequency = <100000>; 238 - pinctrl-names = "default"; 239 - pinctrl-0 = <&pinctrl_i2c1>; 240 - status = "okay"; 241 - 242 - codec: audio-codec@a { 243 - compatible = "fsl,sgtl5000"; 244 - reg = <0xa>; 245 - #sound-dai-cells = <0>; 246 - clocks = <&clks 201>; 247 - VDDA-supply = <&reg_3v3>; 248 - VDDIO-supply = <&reg_3v3>; 249 - VDDD-supply = <&reg_1v8>; 250 - }; 251 - 252 - video-decoder@5c { 253 - compatible = "ti,tvp5150"; 254 - reg = <0x5c>; 255 - #address-cells = <1>; 256 - #size-cells = <0>; 257 - 258 - port@0 { 259 - reg = <0>; 260 - 261 - tvp5150_comp0_in: endpoint { 262 - remote-endpoint = <&comp0_out>; 263 - }; 264 - }; 265 - 266 - /* Output port 2 is video output pad */ 267 - port@2 { 268 - reg = <2>; 269 - 270 - tvp5151_to_ipu1_csi0_mux: endpoint { 271 - remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>; 272 - }; 273 - }; 274 - }; 275 - 276 - /* additional i2c devices are added automatically by the boot loader */ 277 - }; 278 - 279 - &i2c3 { 280 - clock-frequency = <100000>; 281 - pinctrl-names = "default"; 282 - pinctrl-0 = <&pinctrl_i2c3>; 283 - status = "okay"; 284 - 285 - adc@49 { 286 - compatible = "ti,ads1015"; 287 - reg = <0x49>; 288 - #address-cells = <1>; 289 - #size-cells = <0>; 290 - 291 - channel@4 { 292 - reg = <4>; 293 - ti,gain = <3>; 294 - ti,datarate = <3>; 295 - }; 296 - 297 - channel@5 { 298 - reg = <5>; 299 - ti,gain = <3>; 300 - ti,datarate = <3>; 301 - }; 302 - 303 - channel@6 { 304 - reg = <6>; 305 - ti,gain = <3>; 306 - ti,datarate = <3>; 307 - }; 308 - 309 - channel@7 { 310 - reg = <7>; 311 - ti,gain = <3>; 312 - ti,datarate = <3>; 313 - }; 314 - }; 315 - 316 - rtc@51 { 317 - compatible = "nxp,pcf8563"; 318 - reg = <0x51>; 319 - }; 320 - 321 - tsens0: temperature-sensor@70 { 322 - compatible = "ti,tmp103"; 323 - reg = <0x70>; 324 - #thermal-sensor-cells = <0>; 325 - }; 326 - }; 327 - 328 - &ipu1_csi0 { 329 - pinctrl-names = "default"; 330 - pinctrl-0 = <&pinctrl_ipu1_csi0>; 331 - status = "okay"; 332 - }; 333 - 334 - &ipu1_csi0_mux_from_parallel_sensor { 335 - remote-endpoint = <&tvp5151_to_ipu1_csi0_mux>; 336 - }; 337 - 338 - &ldb { 339 - status = "okay"; 340 - 341 - lvds-channel@0 { 342 - status = "okay"; 343 - 344 - port@4 { 345 - reg = <4>; 346 - 347 - lvds0_out: endpoint { 348 - remote-endpoint = <&panel_in>; 349 - }; 350 - }; 351 - }; 352 - }; 353 - 354 - &pwm1 { 355 - pinctrl-names = "default"; 356 - pinctrl-0 = <&pinctrl_pwm1>; 357 - status = "okay"; 358 - }; 359 - 360 - &pwm3 { 361 - pinctrl-names = "default"; 362 - pinctrl-0 = <&pinctrl_pwm3>; 363 - status = "okay"; 364 - }; 365 - 366 - &ssi1 { 367 - status = "okay"; 368 - }; 369 - 370 - &uart1 { 371 - pinctrl-names = "default"; 372 - pinctrl-0 = <&pinctrl_uart1>; 373 - status = "okay"; 374 - }; 375 - 376 - &uart3 { 377 - pinctrl-names = "default"; 378 - pinctrl-0 = <&pinctrl_uart3>; 379 - status = "okay"; 380 - }; 381 - 382 - &uart4 { 383 - pinctrl-names = "default"; 384 - pinctrl-0 = <&pinctrl_uart4>; 385 - status = "okay"; 386 - }; 387 - 388 - &uart5 { 389 - pinctrl-names = "default"; 390 - pinctrl-0 = <&pinctrl_uart5>; 391 - status = "okay"; 392 - }; 393 - 394 - &usbh1 { 395 - pinctrl-names = "default"; 396 - phy_type = "utmi"; 397 - dr_mode = "host"; 398 - status = "okay"; 399 - }; 400 - 401 - &usbotg { 402 - vbus-supply = <&reg_otg_vbus>; 403 - pinctrl-names = "default"; 404 - pinctrl-0 = <&pinctrl_usbotg>; 405 - phy_type = "utmi"; 406 - dr_mode = "host"; 407 - disable-over-current; 408 - status = "okay"; 409 - }; 410 - 411 - &usdhc1 { 412 - pinctrl-names = "default"; 413 - pinctrl-0 = <&pinctrl_usdhc1>; 414 - cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>; 415 - no-1-8-v; 416 - disable-wp; 417 - cap-sd-highspeed; 418 - no-mmc; 419 - no-sdio; 420 - status = "okay"; 421 - }; 422 - 423 - &usdhc3 { 424 - pinctrl-names = "default"; 425 - pinctrl-0 = <&pinctrl_usdhc3>; 426 - bus-width = <8>; 427 - no-1-8-v; 428 - non-removable; 429 - no-sd; 430 - no-sdio; 431 - status = "okay"; 432 - }; 433 - 434 - &iomuxc { 435 - pinctrl-names = "default"; 436 - pinctrl-0 = <&pinctrl_hog>; 437 - 438 - pinctrl_audmux: audmuxgrp { 439 - fsl,pins = < 440 - /* SGTL5000 sys_mclk */ 441 - MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0 442 - MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 443 - MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 444 - MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 445 - MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 446 - >; 447 - }; 448 - 449 - pinctrl_backlight: backlightgrp { 450 - fsl,pins = < 451 - MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0 452 - >; 453 - }; 454 - 455 - pinctrl_can1: can1grp { 456 - fsl,pins = < 457 - MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b000 458 - MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x3008 459 - /* CAN1_SR */ 460 - MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13008 461 - /* CAN1_TERM */ 462 - MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b088 463 - >; 464 - }; 465 - 466 - pinctrl_can2: can2grp { 467 - fsl,pins = < 468 - MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b000 469 - MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x3008 470 - /* CAN2_SR */ 471 - MX6QDL_PAD_KEY_ROW3__GPIO4_IO13 0x13008 472 - >; 473 - }; 474 - 475 - pinctrl_counter0: counter0grp { 476 - fsl,pins = < 477 - MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b000 478 - >; 479 - }; 480 - 481 - pinctrl_counter1: counter1grp { 482 - fsl,pins = < 483 - MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b000 484 - >; 485 - }; 486 - 487 - pinctrl_counter2: counter2grp { 488 - fsl,pins = < 489 - MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b000 490 - >; 491 - }; 492 - 493 - pinctrl_ecspi1: ecspi1grp { 494 - fsl,pins = < 495 - MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 496 - MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 497 - MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 498 - /* CS */ 499 - MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 500 - >; 501 - }; 502 - 503 - pinctrl_hog: hoggrp { 504 - fsl,pins = < 505 - /* ITU656_nRESET */ 506 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 507 - /* CAM1_MIRROR */ 508 - MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x130b0 509 - /* CAM2_MIRROR */ 510 - MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x130b0 511 - /* CAM_nDETECT */ 512 - MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0 513 - /* ISB_IN1 */ 514 - MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x130b0 515 - /* ISB_nIN2 */ 516 - MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x1b0b0 517 - /* WARN_LIGHT */ 518 - MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x100b0 519 - /* ON2_FB */ 520 - MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x100b0 521 - /* YACO_nIRQ */ 522 - MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x1b0b0 523 - /* YACO_BOOT0 */ 524 - MX6QDL_PAD_EIM_D30__GPIO3_IO30 0x130b0 525 - /* YACO_nRESET */ 526 - MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x1b0b0 527 - /* FORCE_ON1 */ 528 - MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 529 - /* AUDIO_nRESET */ 530 - MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0 531 - /* ITU656_nPDN */ 532 - MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0 533 - 534 - /* New in HW revision 1 */ 535 - /* ON1_FB */ 536 - MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x100b0 537 - /* DIP1_FB */ 538 - MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x1b0b0 539 - >; 540 - }; 541 - 542 - pinctrl_i2c1: i2c1grp { 543 - fsl,pins = < 544 - MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001f8b1 545 - MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001f8b1 546 - >; 547 - }; 548 - 549 - pinctrl_i2c3: i2c3grp { 550 - fsl,pins = < 551 - MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 552 - MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 553 - >; 554 - }; 555 - 556 - pinctrl_ipu1_csi0: ipu1csi0grp { 557 - fsl,pins = < 558 - MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 559 - MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 560 - MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 561 - MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 562 - MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 563 - MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 564 - MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 565 - MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 566 - MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 567 - >; 568 - }; 569 - 570 - pinctrl_leds: ledsgrp { 571 - fsl,pins = < 572 - /* DEBUG0 */ 573 - MX6QDL_PAD_DI0_DISP_CLK__GPIO4_IO16 0x1b0b0 574 - /* DEBUG1 */ 575 - MX6QDL_PAD_DI0_PIN15__GPIO4_IO17 0x1b0b0 576 - /* POWER_LED */ 577 - MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x1b0b0 578 - >; 579 - }; 580 - 581 - pinctrl_pwm1: pwm1grp { 582 - fsl,pins = < 583 - MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0 584 - >; 585 - }; 586 - 587 - pinctrl_pwm3: pwm3grp { 588 - fsl,pins = < 589 - MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b0 590 - >; 591 - }; 592 - 593 - /* YaCO AUX Uart */ 594 - pinctrl_uart1: uart1grp { 595 - fsl,pins = < 596 - MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 597 - MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 598 - >; 599 - }; 600 - 601 - /* YaCO Touchscreen UART */ 602 - pinctrl_uart3: uart3grp { 603 - fsl,pins = < 604 - MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 605 - MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 606 - >; 607 - }; 608 - 609 - pinctrl_uart4: uart4grp { 610 - fsl,pins = < 611 - MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 612 - MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 613 - >; 614 - }; 615 - 616 - pinctrl_uart5: uart5grp { 617 - fsl,pins = < 618 - MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 619 - MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 620 - >; 621 - }; 622 - 623 - pinctrl_usbotg: usbotggrp { 624 - fsl,pins = < 625 - MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b0b0 626 - /* power enable, high active */ 627 - MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 628 - >; 629 - }; 630 - 631 - pinctrl_usdhc1: usdhc1grp { 632 - fsl,pins = < 633 - MX6QDL_PAD_SD1_CMD__SD1_CMD 0x170f9 634 - MX6QDL_PAD_SD1_CLK__SD1_CLK 0x100f9 635 - MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x170f9 636 - MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x170f9 637 - MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x170f9 638 - MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x170f9 639 - MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x1b0b0 640 - >; 641 - }; 642 - 643 - pinctrl_usdhc3: usdhc3grp { 644 - fsl,pins = < 645 - MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17099 646 - MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10099 647 - MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17099 648 - MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17099 649 - MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17099 650 - MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17099 651 - MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17099 652 - MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17099 653 - MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17099 654 - MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17099 655 - MX6QDL_PAD_SD3_RST__SD3_RESET 0x1b0b1 656 - >; 657 - }; 658 - };