tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
pinctrl: Add pinctrl support for BM1880 SoC
Add pinctrl support for Bitmain BM1880 SoC. The driver only handles
pinmuxing as the SoC is not capable of handling pinconf.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
authored by
Manivannan Sadhasivam
and committed by
Linus Walleij
8f3f0246
07b734fb
+973
+7
drivers/pinctrl/Kconfig
+7
drivers/pinctrl/Kconfig
···
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Requires ACPI/FDT device enumeration code to set up a platform
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device.
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config PINCTRL_BM1880
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bool "Bitmain BM1880 Pinctrl driver"
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depends on ARCH_BITMAIN
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select PINMUX
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help
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Pinctrl driver for Bitmain BM1880 SoC.
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config PINCTRL_DA850_PUPD
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tristate "TI DA850/OMAP-L138/AM18XX pullup/pulldown groups"
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depends on OF && (ARCH_DAVINCI_DA850 || COMPILE_TEST)
+1
drivers/pinctrl/Makefile
+1
drivers/pinctrl/Makefile
···
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obj-$(CONFIG_PINCTRL_AT91) += pinctrl-at91.o
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obj-$(CONFIG_PINCTRL_AT91PIO4) += pinctrl-at91-pio4.o
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obj-$(CONFIG_PINCTRL_AMD) += pinctrl-amd.o
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obj-$(CONFIG_PINCTRL_BM1880) += pinctrl-bm1880.o
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obj-$(CONFIG_PINCTRL_DA850_PUPD) += pinctrl-da850-pupd.o
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obj-$(CONFIG_PINCTRL_DIGICOLOR) += pinctrl-digicolor.o
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obj-$(CONFIG_PINCTRL_FALCON) += pinctrl-falcon.o
+965
drivers/pinctrl/pinctrl-bm1880.c
+965
drivers/pinctrl/pinctrl-bm1880.c
···
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+
// SPDX-License-Identifier: GPL-2.0+
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+
/*
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* Bitmain BM1880 SoC Pinctrl driver
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*
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* Copyright (c) 2019 Linaro Ltd.
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* Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*/
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+
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/slab.h>
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+
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#include "core.h"
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#include "pinctrl-utils.h"
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+
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#define BM1880_REG_MUX 0x20
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+
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/**
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* struct bm1880_pinctrl - driver data
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* @base: Pinctrl base address
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* @pctrl: Pinctrl device
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* @groups: Pingroups
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* @ngroups: Number of @groups
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* @funcs: Pinmux functions
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* @nfuncs: Number of @funcs
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*/
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struct bm1880_pinctrl {
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void __iomem *base;
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struct pinctrl_dev *pctrldev;
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const struct bm1880_pctrl_group *groups;
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unsigned int ngroups;
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const struct bm1880_pinmux_function *funcs;
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unsigned int nfuncs;
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};
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+
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/**
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* struct bm1880_pctrl_group - pinctrl group
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* @name: Name of the group
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* @pins: Array of pins belonging to this group
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* @npins: Number of @pins
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*/
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struct bm1880_pctrl_group {
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const char *name;
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const unsigned int *pins;
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const unsigned int npins;
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};
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+
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/**
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* struct bm1880_pinmux_function - a pinmux function
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* @name: Name of the pinmux function.
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* @groups: List of pingroups for this function.
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* @ngroups: Number of entries in @groups.
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* @mux_val: Selector for this function
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* @mux_mask: Mask for function specific selector
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* @mux: Offset of function specific mux
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* @mux_shift: Shift for function specific selector
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*/
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struct bm1880_pinmux_function {
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const char *name;
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const char * const *groups;
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unsigned int ngroups;
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u32 mux_val;
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u32 mux_mask;
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u32 mux;
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u8 mux_shift;
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};
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static const struct pinctrl_pin_desc bm1880_pins[] = {
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PINCTRL_PIN(0, "MIO0"),
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PINCTRL_PIN(1, "MIO1"),
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PINCTRL_PIN(2, "MIO2"),
76
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PINCTRL_PIN(3, "MIO3"),
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PINCTRL_PIN(4, "MIO4"),
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PINCTRL_PIN(5, "MIO5"),
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PINCTRL_PIN(6, "MIO6"),
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PINCTRL_PIN(7, "MIO7"),
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PINCTRL_PIN(8, "MIO8"),
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PINCTRL_PIN(9, "MIO9"),
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PINCTRL_PIN(10, "MIO10"),
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PINCTRL_PIN(11, "MIO11"),
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PINCTRL_PIN(12, "MIO12"),
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PINCTRL_PIN(13, "MIO13"),
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PINCTRL_PIN(14, "MIO14"),
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PINCTRL_PIN(15, "MIO15"),
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PINCTRL_PIN(16, "MIO16"),
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PINCTRL_PIN(17, "MIO17"),
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PINCTRL_PIN(18, "MIO18"),
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PINCTRL_PIN(19, "MIO19"),
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PINCTRL_PIN(20, "MIO20"),
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PINCTRL_PIN(21, "MIO21"),
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PINCTRL_PIN(22, "MIO22"),
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PINCTRL_PIN(23, "MIO23"),
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PINCTRL_PIN(24, "MIO24"),
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PINCTRL_PIN(25, "MIO25"),
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PINCTRL_PIN(26, "MIO26"),
100
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PINCTRL_PIN(27, "MIO27"),
101
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PINCTRL_PIN(28, "MIO28"),
102
+
PINCTRL_PIN(29, "MIO29"),
103
+
PINCTRL_PIN(30, "MIO30"),
104
+
PINCTRL_PIN(31, "MIO31"),
105
+
PINCTRL_PIN(32, "MIO32"),
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PINCTRL_PIN(33, "MIO33"),
107
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PINCTRL_PIN(34, "MIO34"),
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PINCTRL_PIN(35, "MIO35"),
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PINCTRL_PIN(36, "MIO36"),
110
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PINCTRL_PIN(37, "MIO37"),
111
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PINCTRL_PIN(38, "MIO38"),
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PINCTRL_PIN(39, "MIO39"),
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PINCTRL_PIN(40, "MIO40"),
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PINCTRL_PIN(41, "MIO41"),
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PINCTRL_PIN(42, "MIO42"),
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PINCTRL_PIN(43, "MIO43"),
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PINCTRL_PIN(44, "MIO44"),
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PINCTRL_PIN(45, "MIO45"),
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PINCTRL_PIN(46, "MIO46"),
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PINCTRL_PIN(47, "MIO47"),
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PINCTRL_PIN(48, "MIO48"),
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PINCTRL_PIN(49, "MIO49"),
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PINCTRL_PIN(50, "MIO50"),
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PINCTRL_PIN(51, "MIO51"),
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PINCTRL_PIN(52, "MIO52"),
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PINCTRL_PIN(53, "MIO53"),
127
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PINCTRL_PIN(54, "MIO54"),
128
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PINCTRL_PIN(55, "MIO55"),
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PINCTRL_PIN(56, "MIO56"),
130
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PINCTRL_PIN(57, "MIO57"),
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PINCTRL_PIN(58, "MIO58"),
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PINCTRL_PIN(59, "MIO59"),
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PINCTRL_PIN(60, "MIO60"),
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PINCTRL_PIN(61, "MIO61"),
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PINCTRL_PIN(62, "MIO62"),
136
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PINCTRL_PIN(63, "MIO63"),
137
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PINCTRL_PIN(64, "MIO64"),
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PINCTRL_PIN(65, "MIO65"),
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PINCTRL_PIN(66, "MIO66"),
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PINCTRL_PIN(67, "MIO67"),
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PINCTRL_PIN(68, "MIO68"),
142
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PINCTRL_PIN(69, "MIO69"),
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PINCTRL_PIN(70, "MIO70"),
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PINCTRL_PIN(71, "MIO71"),
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PINCTRL_PIN(72, "MIO72"),
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PINCTRL_PIN(73, "MIO73"),
147
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PINCTRL_PIN(74, "MIO74"),
148
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PINCTRL_PIN(75, "MIO75"),
149
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PINCTRL_PIN(76, "MIO76"),
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PINCTRL_PIN(77, "MIO77"),
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PINCTRL_PIN(78, "MIO78"),
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PINCTRL_PIN(79, "MIO79"),
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PINCTRL_PIN(80, "MIO80"),
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PINCTRL_PIN(81, "MIO81"),
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PINCTRL_PIN(82, "MIO82"),
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PINCTRL_PIN(83, "MIO83"),
157
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PINCTRL_PIN(84, "MIO84"),
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PINCTRL_PIN(85, "MIO85"),
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PINCTRL_PIN(86, "MIO86"),
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PINCTRL_PIN(87, "MIO87"),
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PINCTRL_PIN(88, "MIO88"),
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PINCTRL_PIN(89, "MIO89"),
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PINCTRL_PIN(90, "MIO90"),
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PINCTRL_PIN(91, "MIO91"),
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PINCTRL_PIN(92, "MIO92"),
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PINCTRL_PIN(93, "MIO93"),
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PINCTRL_PIN(94, "MIO94"),
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PINCTRL_PIN(95, "MIO95"),
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PINCTRL_PIN(96, "MIO96"),
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PINCTRL_PIN(97, "MIO97"),
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PINCTRL_PIN(98, "MIO98"),
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PINCTRL_PIN(99, "MIO99"),
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PINCTRL_PIN(100, "MIO100"),
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PINCTRL_PIN(101, "MIO101"),
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PINCTRL_PIN(102, "MIO102"),
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PINCTRL_PIN(103, "MIO103"),
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PINCTRL_PIN(104, "MIO104"),
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PINCTRL_PIN(105, "MIO105"),
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PINCTRL_PIN(106, "MIO106"),
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PINCTRL_PIN(107, "MIO107"),
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PINCTRL_PIN(108, "MIO108"),
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PINCTRL_PIN(109, "MIO109"),
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PINCTRL_PIN(110, "MIO110"),
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PINCTRL_PIN(111, "MIO111"),
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};
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enum bm1880_pinmux_functions {
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F_nand, F_spi, F_emmc, F_sdio, F_eth0, F_pwm0, F_pwm1, F_pwm2,
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F_pwm3, F_pwm4, F_pwm5, F_pwm6, F_pwm7, F_pwm8, F_pwm9, F_pwm10,
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F_pwm11, F_pwm12, F_pwm13, F_pwm14, F_pwm15, F_pwm16, F_pwm17,
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F_pwm18, F_pwm19, F_pwm20, F_pwm21, F_pwm22, F_pwm23, F_pwm24,
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F_pwm25, F_pwm26, F_pwm27, F_pwm28, F_pwm29, F_pwm30, F_pwm31,
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F_pwm32, F_pwm33, F_pwm34, F_pwm35, F_pwm36, F_pwm37, F_i2c0, F_i2c1,
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F_i2c2, F_i2c3, F_i2c4, F_uart0, F_uart1, F_uart2, F_uart3, F_uart4,
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F_uart5, F_uart6, F_uart7, F_uart8, F_uart9, F_uart10, F_uart11,
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F_uart12, F_uart13, F_uart14, F_uart15, F_gpio0, F_gpio1, F_gpio2,
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F_gpio3, F_gpio4, F_gpio5, F_gpio6, F_gpio7, F_gpio8, F_gpio9, F_gpio10,
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F_gpio11, F_gpio12, F_gpio13, F_gpio14, F_gpio15, F_gpio16, F_gpio17,
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F_gpio18, F_gpio19, F_gpio20, F_gpio21, F_gpio22, F_gpio23, F_gpio24,
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F_gpio25, F_gpio26, F_gpio27, F_gpio28, F_gpio29, F_gpio30, F_gpio31,
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F_gpio32, F_gpio33, F_gpio34, F_gpio35, F_gpio36, F_gpio37, F_gpio38,
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F_gpio39, F_gpio40, F_gpio41, F_gpio42, F_gpio43, F_gpio44, F_gpio45,
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F_gpio46, F_gpio47, F_gpio48, F_gpio49, F_gpio50, F_gpio51, F_gpio52,
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F_gpio53, F_gpio54, F_gpio55, F_gpio56, F_gpio57, F_gpio58, F_gpio59,
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F_gpio60, F_gpio61, F_gpio62, F_gpio63, F_gpio64, F_gpio65, F_gpio66,
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F_gpio67, F_eth1, F_i2s0, F_i2s0_mclkin, F_i2s1, F_i2s1_mclkin, F_spi0,
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F_max
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};
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static const unsigned int nand_pins[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9,
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10, 11, 12, 13, 14, 15, 16 };
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static const unsigned int spi_pins[] = { 0, 1, 8, 10, 11, 12, 13 };
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static const unsigned int emmc_pins[] = { 2, 3, 4, 5, 6, 7, 9, 14, 15, 16 };
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static const unsigned int sdio_pins[] = { 17, 18, 19, 20, 21, 22, 23, 24,
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25, 26 };
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static const unsigned int eth0_pins[] = { 27, 28, 29, 30, 31, 32, 33, 34, 35,
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36, 37, 38, 39, 40, 41, 42 };
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static const unsigned int pwm0_pins[] = { 29 };
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static const unsigned int pwm1_pins[] = { 30 };
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static const unsigned int pwm2_pins[] = { 34 };
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static const unsigned int pwm3_pins[] = { 35 };
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static const unsigned int pwm4_pins[] = { 43 };
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static const unsigned int pwm5_pins[] = { 44 };
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static const unsigned int pwm6_pins[] = { 45 };
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static const unsigned int pwm7_pins[] = { 46 };
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static const unsigned int pwm8_pins[] = { 47 };
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static const unsigned int pwm9_pins[] = { 48 };
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static const unsigned int pwm10_pins[] = { 49 };
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static const unsigned int pwm11_pins[] = { 50 };
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static const unsigned int pwm12_pins[] = { 51 };
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static const unsigned int pwm13_pins[] = { 52 };
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static const unsigned int pwm14_pins[] = { 53 };
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static const unsigned int pwm15_pins[] = { 54 };
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static const unsigned int pwm16_pins[] = { 55 };
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static const unsigned int pwm17_pins[] = { 56 };
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static const unsigned int pwm18_pins[] = { 57 };
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static const unsigned int pwm19_pins[] = { 58 };
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static const unsigned int pwm20_pins[] = { 59 };
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static const unsigned int pwm21_pins[] = { 60 };
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static const unsigned int pwm22_pins[] = { 61 };
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static const unsigned int pwm23_pins[] = { 62 };
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static const unsigned int pwm24_pins[] = { 97 };
243
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static const unsigned int pwm25_pins[] = { 98 };
244
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static const unsigned int pwm26_pins[] = { 99 };
245
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static const unsigned int pwm27_pins[] = { 100 };
246
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static const unsigned int pwm28_pins[] = { 101 };
247
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static const unsigned int pwm29_pins[] = { 102 };
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static const unsigned int pwm30_pins[] = { 103 };
249
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static const unsigned int pwm31_pins[] = { 104 };
250
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static const unsigned int pwm32_pins[] = { 105 };
251
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static const unsigned int pwm33_pins[] = { 106 };
252
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static const unsigned int pwm34_pins[] = { 107 };
253
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static const unsigned int pwm35_pins[] = { 108 };
254
+
static const unsigned int pwm36_pins[] = { 109 };
255
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static const unsigned int pwm37_pins[] = { 110 };
256
+
static const unsigned int i2c0_pins[] = { 63, 64 };
257
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static const unsigned int i2c1_pins[] = { 65, 66 };
258
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static const unsigned int i2c2_pins[] = { 67, 68 };
259
+
static const unsigned int i2c3_pins[] = { 69, 70 };
260
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static const unsigned int i2c4_pins[] = { 71, 72 };
261
+
static const unsigned int uart0_pins[] = { 73, 74 };
262
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static const unsigned int uart1_pins[] = { 75, 76 };
263
+
static const unsigned int uart2_pins[] = { 77, 78 };
264
+
static const unsigned int uart3_pins[] = { 79, 80 };
265
+
static const unsigned int uart4_pins[] = { 81, 82 };
266
+
static const unsigned int uart5_pins[] = { 83, 84 };
267
+
static const unsigned int uart6_pins[] = { 85, 86 };
268
+
static const unsigned int uart7_pins[] = { 87, 88 };
269
+
static const unsigned int uart8_pins[] = { 89, 90 };
270
+
static const unsigned int uart9_pins[] = { 91, 92 };
271
+
static const unsigned int uart10_pins[] = { 93, 94 };
272
+
static const unsigned int uart11_pins[] = { 95, 96 };
273
+
static const unsigned int uart12_pins[] = { 73, 74, 75, 76 };
274
+
static const unsigned int uart13_pins[] = { 77, 78, 83, 84 };
275
+
static const unsigned int uart14_pins[] = { 79, 80, 85, 86 };
276
+
static const unsigned int uart15_pins[] = { 81, 82, 87, 88 };
277
+
static const unsigned int gpio0_pins[] = { 97 };
278
+
static const unsigned int gpio1_pins[] = { 98 };
279
+
static const unsigned int gpio2_pins[] = { 99 };
280
+
static const unsigned int gpio3_pins[] = { 100 };
281
+
static const unsigned int gpio4_pins[] = { 101 };
282
+
static const unsigned int gpio5_pins[] = { 102 };
283
+
static const unsigned int gpio6_pins[] = { 103 };
284
+
static const unsigned int gpio7_pins[] = { 104 };
285
+
static const unsigned int gpio8_pins[] = { 105 };
286
+
static const unsigned int gpio9_pins[] = { 106 };
287
+
static const unsigned int gpio10_pins[] = { 107 };
288
+
static const unsigned int gpio11_pins[] = { 108 };
289
+
static const unsigned int gpio12_pins[] = { 109 };
290
+
static const unsigned int gpio13_pins[] = { 110 };
291
+
static const unsigned int gpio14_pins[] = { 43 };
292
+
static const unsigned int gpio15_pins[] = { 44 };
293
+
static const unsigned int gpio16_pins[] = { 45 };
294
+
static const unsigned int gpio17_pins[] = { 46 };
295
+
static const unsigned int gpio18_pins[] = { 47 };
296
+
static const unsigned int gpio19_pins[] = { 48 };
297
+
static const unsigned int gpio20_pins[] = { 49 };
298
+
static const unsigned int gpio21_pins[] = { 50 };
299
+
static const unsigned int gpio22_pins[] = { 51 };
300
+
static const unsigned int gpio23_pins[] = { 52 };
301
+
static const unsigned int gpio24_pins[] = { 53 };
302
+
static const unsigned int gpio25_pins[] = { 54 };
303
+
static const unsigned int gpio26_pins[] = { 55 };
304
+
static const unsigned int gpio27_pins[] = { 56 };
305
+
static const unsigned int gpio28_pins[] = { 57 };
306
+
static const unsigned int gpio29_pins[] = { 58 };
307
+
static const unsigned int gpio30_pins[] = { 59 };
308
+
static const unsigned int gpio31_pins[] = { 60 };
309
+
static const unsigned int gpio32_pins[] = { 61 };
310
+
static const unsigned int gpio33_pins[] = { 62 };
311
+
static const unsigned int gpio34_pins[] = { 63 };
312
+
static const unsigned int gpio35_pins[] = { 64 };
313
+
static const unsigned int gpio36_pins[] = { 65 };
314
+
static const unsigned int gpio37_pins[] = { 66 };
315
+
static const unsigned int gpio38_pins[] = { 67 };
316
+
static const unsigned int gpio39_pins[] = { 68 };
317
+
static const unsigned int gpio40_pins[] = { 69 };
318
+
static const unsigned int gpio41_pins[] = { 70 };
319
+
static const unsigned int gpio42_pins[] = { 71 };
320
+
static const unsigned int gpio43_pins[] = { 72 };
321
+
static const unsigned int gpio44_pins[] = { 73 };
322
+
static const unsigned int gpio45_pins[] = { 74 };
323
+
static const unsigned int gpio46_pins[] = { 75 };
324
+
static const unsigned int gpio47_pins[] = { 76 };
325
+
static const unsigned int gpio48_pins[] = { 77 };
326
+
static const unsigned int gpio49_pins[] = { 78 };
327
+
static const unsigned int gpio50_pins[] = { 79 };
328
+
static const unsigned int gpio51_pins[] = { 80 };
329
+
static const unsigned int gpio52_pins[] = { 81 };
330
+
static const unsigned int gpio53_pins[] = { 82 };
331
+
static const unsigned int gpio54_pins[] = { 83 };
332
+
static const unsigned int gpio55_pins[] = { 84 };
333
+
static const unsigned int gpio56_pins[] = { 85 };
334
+
static const unsigned int gpio57_pins[] = { 86 };
335
+
static const unsigned int gpio58_pins[] = { 87 };
336
+
static const unsigned int gpio59_pins[] = { 88 };
337
+
static const unsigned int gpio60_pins[] = { 89 };
338
+
static const unsigned int gpio61_pins[] = { 90 };
339
+
static const unsigned int gpio62_pins[] = { 91 };
340
+
static const unsigned int gpio63_pins[] = { 92 };
341
+
static const unsigned int gpio64_pins[] = { 93 };
342
+
static const unsigned int gpio65_pins[] = { 94 };
343
+
static const unsigned int gpio66_pins[] = { 95 };
344
+
static const unsigned int gpio67_pins[] = { 96 };
345
+
static const unsigned int eth1_pins[] = { 43, 44, 45, 46, 47, 48, 49, 50, 51,
346
+
52, 53, 54, 55, 56, 57, 58 };
347
+
static const unsigned int i2s0_pins[] = { 87, 88, 89, 90, 91 };
348
+
static const unsigned int i2s0_mclkin_pins[] = { 97 };
349
+
static const unsigned int i2s1_pins[] = { 92, 93, 94, 95, 96 };
350
+
static const unsigned int i2s1_mclkin_pins[] = { 98 };
351
+
static const unsigned int spi0_pins[] = { 59, 60, 61, 62 };
352
+
353
+
#define BM1880_PINCTRL_GRP(nm) \
354
+
{ \
355
+
.name = #nm "_grp", \
356
+
.pins = nm ## _pins, \
357
+
.npins = ARRAY_SIZE(nm ## _pins), \
358
+
}
359
+
360
+
static const struct bm1880_pctrl_group bm1880_pctrl_groups[] = {
361
+
BM1880_PINCTRL_GRP(nand),
362
+
BM1880_PINCTRL_GRP(spi),
363
+
BM1880_PINCTRL_GRP(emmc),
364
+
BM1880_PINCTRL_GRP(sdio),
365
+
BM1880_PINCTRL_GRP(eth0),
366
+
BM1880_PINCTRL_GRP(pwm0),
367
+
BM1880_PINCTRL_GRP(pwm1),
368
+
BM1880_PINCTRL_GRP(pwm2),
369
+
BM1880_PINCTRL_GRP(pwm3),
370
+
BM1880_PINCTRL_GRP(pwm4),
371
+
BM1880_PINCTRL_GRP(pwm5),
372
+
BM1880_PINCTRL_GRP(pwm6),
373
+
BM1880_PINCTRL_GRP(pwm7),
374
+
BM1880_PINCTRL_GRP(pwm8),
375
+
BM1880_PINCTRL_GRP(pwm9),
376
+
BM1880_PINCTRL_GRP(pwm10),
377
+
BM1880_PINCTRL_GRP(pwm11),
378
+
BM1880_PINCTRL_GRP(pwm12),
379
+
BM1880_PINCTRL_GRP(pwm13),
380
+
BM1880_PINCTRL_GRP(pwm14),
381
+
BM1880_PINCTRL_GRP(pwm15),
382
+
BM1880_PINCTRL_GRP(pwm16),
383
+
BM1880_PINCTRL_GRP(pwm17),
384
+
BM1880_PINCTRL_GRP(pwm18),
385
+
BM1880_PINCTRL_GRP(pwm19),
386
+
BM1880_PINCTRL_GRP(pwm20),
387
+
BM1880_PINCTRL_GRP(pwm21),
388
+
BM1880_PINCTRL_GRP(pwm22),
389
+
BM1880_PINCTRL_GRP(pwm23),
390
+
BM1880_PINCTRL_GRP(pwm24),
391
+
BM1880_PINCTRL_GRP(pwm25),
392
+
BM1880_PINCTRL_GRP(pwm26),
393
+
BM1880_PINCTRL_GRP(pwm27),
394
+
BM1880_PINCTRL_GRP(pwm28),
395
+
BM1880_PINCTRL_GRP(pwm29),
396
+
BM1880_PINCTRL_GRP(pwm30),
397
+
BM1880_PINCTRL_GRP(pwm31),
398
+
BM1880_PINCTRL_GRP(pwm32),
399
+
BM1880_PINCTRL_GRP(pwm33),
400
+
BM1880_PINCTRL_GRP(pwm34),
401
+
BM1880_PINCTRL_GRP(pwm35),
402
+
BM1880_PINCTRL_GRP(pwm36),
403
+
BM1880_PINCTRL_GRP(i2c0),
404
+
BM1880_PINCTRL_GRP(i2c1),
405
+
BM1880_PINCTRL_GRP(i2c2),
406
+
BM1880_PINCTRL_GRP(i2c3),
407
+
BM1880_PINCTRL_GRP(i2c4),
408
+
BM1880_PINCTRL_GRP(uart0),
409
+
BM1880_PINCTRL_GRP(uart1),
410
+
BM1880_PINCTRL_GRP(uart2),
411
+
BM1880_PINCTRL_GRP(uart3),
412
+
BM1880_PINCTRL_GRP(uart4),
413
+
BM1880_PINCTRL_GRP(uart5),
414
+
BM1880_PINCTRL_GRP(uart6),
415
+
BM1880_PINCTRL_GRP(uart7),
416
+
BM1880_PINCTRL_GRP(uart8),
417
+
BM1880_PINCTRL_GRP(uart9),
418
+
BM1880_PINCTRL_GRP(uart10),
419
+
BM1880_PINCTRL_GRP(uart11),
420
+
BM1880_PINCTRL_GRP(uart12),
421
+
BM1880_PINCTRL_GRP(uart13),
422
+
BM1880_PINCTRL_GRP(uart14),
423
+
BM1880_PINCTRL_GRP(uart15),
424
+
BM1880_PINCTRL_GRP(gpio0),
425
+
BM1880_PINCTRL_GRP(gpio1),
426
+
BM1880_PINCTRL_GRP(gpio2),
427
+
BM1880_PINCTRL_GRP(gpio3),
428
+
BM1880_PINCTRL_GRP(gpio4),
429
+
BM1880_PINCTRL_GRP(gpio5),
430
+
BM1880_PINCTRL_GRP(gpio6),
431
+
BM1880_PINCTRL_GRP(gpio7),
432
+
BM1880_PINCTRL_GRP(gpio8),
433
+
BM1880_PINCTRL_GRP(gpio9),
434
+
BM1880_PINCTRL_GRP(gpio10),
435
+
BM1880_PINCTRL_GRP(gpio11),
436
+
BM1880_PINCTRL_GRP(gpio12),
437
+
BM1880_PINCTRL_GRP(gpio13),
438
+
BM1880_PINCTRL_GRP(gpio14),
439
+
BM1880_PINCTRL_GRP(gpio15),
440
+
BM1880_PINCTRL_GRP(gpio16),
441
+
BM1880_PINCTRL_GRP(gpio17),
442
+
BM1880_PINCTRL_GRP(gpio18),
443
+
BM1880_PINCTRL_GRP(gpio19),
444
+
BM1880_PINCTRL_GRP(gpio20),
445
+
BM1880_PINCTRL_GRP(gpio21),
446
+
BM1880_PINCTRL_GRP(gpio22),
447
+
BM1880_PINCTRL_GRP(gpio23),
448
+
BM1880_PINCTRL_GRP(gpio24),
449
+
BM1880_PINCTRL_GRP(gpio25),
450
+
BM1880_PINCTRL_GRP(gpio26),
451
+
BM1880_PINCTRL_GRP(gpio27),
452
+
BM1880_PINCTRL_GRP(gpio28),
453
+
BM1880_PINCTRL_GRP(gpio29),
454
+
BM1880_PINCTRL_GRP(gpio30),
455
+
BM1880_PINCTRL_GRP(gpio31),
456
+
BM1880_PINCTRL_GRP(gpio32),
457
+
BM1880_PINCTRL_GRP(gpio33),
458
+
BM1880_PINCTRL_GRP(gpio34),
459
+
BM1880_PINCTRL_GRP(gpio35),
460
+
BM1880_PINCTRL_GRP(gpio36),
461
+
BM1880_PINCTRL_GRP(gpio37),
462
+
BM1880_PINCTRL_GRP(gpio38),
463
+
BM1880_PINCTRL_GRP(gpio39),
464
+
BM1880_PINCTRL_GRP(gpio40),
465
+
BM1880_PINCTRL_GRP(gpio41),
466
+
BM1880_PINCTRL_GRP(gpio42),
467
+
BM1880_PINCTRL_GRP(gpio43),
468
+
BM1880_PINCTRL_GRP(gpio44),
469
+
BM1880_PINCTRL_GRP(gpio45),
470
+
BM1880_PINCTRL_GRP(gpio46),
471
+
BM1880_PINCTRL_GRP(gpio47),
472
+
BM1880_PINCTRL_GRP(gpio48),
473
+
BM1880_PINCTRL_GRP(gpio49),
474
+
BM1880_PINCTRL_GRP(gpio50),
475
+
BM1880_PINCTRL_GRP(gpio51),
476
+
BM1880_PINCTRL_GRP(gpio52),
477
+
BM1880_PINCTRL_GRP(gpio53),
478
+
BM1880_PINCTRL_GRP(gpio54),
479
+
BM1880_PINCTRL_GRP(gpio55),
480
+
BM1880_PINCTRL_GRP(gpio56),
481
+
BM1880_PINCTRL_GRP(gpio57),
482
+
BM1880_PINCTRL_GRP(gpio58),
483
+
BM1880_PINCTRL_GRP(gpio59),
484
+
BM1880_PINCTRL_GRP(gpio60),
485
+
BM1880_PINCTRL_GRP(gpio61),
486
+
BM1880_PINCTRL_GRP(gpio62),
487
+
BM1880_PINCTRL_GRP(gpio63),
488
+
BM1880_PINCTRL_GRP(gpio64),
489
+
BM1880_PINCTRL_GRP(gpio65),
490
+
BM1880_PINCTRL_GRP(gpio66),
491
+
BM1880_PINCTRL_GRP(gpio67),
492
+
BM1880_PINCTRL_GRP(eth1),
493
+
BM1880_PINCTRL_GRP(i2s0),
494
+
BM1880_PINCTRL_GRP(i2s0_mclkin),
495
+
BM1880_PINCTRL_GRP(i2s1),
496
+
BM1880_PINCTRL_GRP(i2s1_mclkin),
497
+
BM1880_PINCTRL_GRP(spi0),
498
+
};
499
+
500
+
static const char * const nand_group[] = { "nand_grp" };
501
+
static const char * const spi_group[] = { "spi_grp" };
502
+
static const char * const emmc_group[] = { "emmc_grp" };
503
+
static const char * const sdio_group[] = { "sdio_grp" };
504
+
static const char * const eth0_group[] = { "eth0_grp" };
505
+
static const char * const pwm0_group[] = { "pwm0_grp" };
506
+
static const char * const pwm1_group[] = { "pwm1_grp" };
507
+
static const char * const pwm2_group[] = { "pwm2_grp" };
508
+
static const char * const pwm3_group[] = { "pwm3_grp" };
509
+
static const char * const pwm4_group[] = { "pwm4_grp" };
510
+
static const char * const pwm5_group[] = { "pwm5_grp" };
511
+
static const char * const pwm6_group[] = { "pwm6_grp" };
512
+
static const char * const pwm7_group[] = { "pwm7_grp" };
513
+
static const char * const pwm8_group[] = { "pwm8_grp" };
514
+
static const char * const pwm9_group[] = { "pwm9_grp" };
515
+
static const char * const pwm10_group[] = { "pwm10_grp" };
516
+
static const char * const pwm11_group[] = { "pwm11_grp" };
517
+
static const char * const pwm12_group[] = { "pwm12_grp" };
518
+
static const char * const pwm13_group[] = { "pwm13_grp" };
519
+
static const char * const pwm14_group[] = { "pwm14_grp" };
520
+
static const char * const pwm15_group[] = { "pwm15_grp" };
521
+
static const char * const pwm16_group[] = { "pwm16_grp" };
522
+
static const char * const pwm17_group[] = { "pwm17_grp" };
523
+
static const char * const pwm18_group[] = { "pwm18_grp" };
524
+
static const char * const pwm19_group[] = { "pwm19_grp" };
525
+
static const char * const pwm20_group[] = { "pwm20_grp" };
526
+
static const char * const pwm21_group[] = { "pwm21_grp" };
527
+
static const char * const pwm22_group[] = { "pwm22_grp" };
528
+
static const char * const pwm23_group[] = { "pwm23_grp" };
529
+
static const char * const pwm24_group[] = { "pwm24_grp" };
530
+
static const char * const pwm25_group[] = { "pwm25_grp" };
531
+
static const char * const pwm26_group[] = { "pwm26_grp" };
532
+
static const char * const pwm27_group[] = { "pwm27_grp" };
533
+
static const char * const pwm28_group[] = { "pwm28_grp" };
534
+
static const char * const pwm29_group[] = { "pwm29_grp" };
535
+
static const char * const pwm30_group[] = { "pwm30_grp" };
536
+
static const char * const pwm31_group[] = { "pwm31_grp" };
537
+
static const char * const pwm32_group[] = { "pwm32_grp" };
538
+
static const char * const pwm33_group[] = { "pwm33_grp" };
539
+
static const char * const pwm34_group[] = { "pwm34_grp" };
540
+
static const char * const pwm35_group[] = { "pwm35_grp" };
541
+
static const char * const pwm36_group[] = { "pwm36_grp" };
542
+
static const char * const pwm37_group[] = { "pwm37_grp" };
543
+
static const char * const i2c0_group[] = { "i2c0_grp" };
544
+
static const char * const i2c1_group[] = { "i2c1_grp" };
545
+
static const char * const i2c2_group[] = { "i2c2_grp" };
546
+
static const char * const i2c3_group[] = { "i2c3_grp" };
547
+
static const char * const i2c4_group[] = { "i2c4_grp" };
548
+
static const char * const uart0_group[] = { "uart0_grp" };
549
+
static const char * const uart1_group[] = { "uart1_grp" };
550
+
static const char * const uart2_group[] = { "uart2_grp" };
551
+
static const char * const uart3_group[] = { "uart3_grp" };
552
+
static const char * const uart4_group[] = { "uart4_grp" };
553
+
static const char * const uart5_group[] = { "uart5_grp" };
554
+
static const char * const uart6_group[] = { "uart6_grp" };
555
+
static const char * const uart7_group[] = { "uart7_grp" };
556
+
static const char * const uart8_group[] = { "uart8_grp" };
557
+
static const char * const uart9_group[] = { "uart9_grp" };
558
+
static const char * const uart10_group[] = { "uart10_grp" };
559
+
static const char * const uart11_group[] = { "uart11_grp" };
560
+
static const char * const uart12_group[] = { "uart12_grp" };
561
+
static const char * const uart13_group[] = { "uart13_grp" };
562
+
static const char * const uart14_group[] = { "uart14_grp" };
563
+
static const char * const uart15_group[] = { "uart15_grp" };
564
+
static const char * const gpio0_group[] = { "gpio0_grp" };
565
+
static const char * const gpio1_group[] = { "gpio1_grp" };
566
+
static const char * const gpio2_group[] = { "gpio2_grp" };
567
+
static const char * const gpio3_group[] = { "gpio3_grp" };
568
+
static const char * const gpio4_group[] = { "gpio4_grp" };
569
+
static const char * const gpio5_group[] = { "gpio5_grp" };
570
+
static const char * const gpio6_group[] = { "gpio6_grp" };
571
+
static const char * const gpio7_group[] = { "gpio7_grp" };
572
+
static const char * const gpio8_group[] = { "gpio8_grp" };
573
+
static const char * const gpio9_group[] = { "gpio9_grp" };
574
+
static const char * const gpio10_group[] = { "gpio10_grp" };
575
+
static const char * const gpio11_group[] = { "gpio11_grp" };
576
+
static const char * const gpio12_group[] = { "gpio12_grp" };
577
+
static const char * const gpio13_group[] = { "gpio13_grp" };
578
+
static const char * const gpio14_group[] = { "gpio14_grp" };
579
+
static const char * const gpio15_group[] = { "gpio15_grp" };
580
+
static const char * const gpio16_group[] = { "gpio16_grp" };
581
+
static const char * const gpio17_group[] = { "gpio17_grp" };
582
+
static const char * const gpio18_group[] = { "gpio18_grp" };
583
+
static const char * const gpio19_group[] = { "gpio19_grp" };
584
+
static const char * const gpio20_group[] = { "gpio20_grp" };
585
+
static const char * const gpio21_group[] = { "gpio21_grp" };
586
+
static const char * const gpio22_group[] = { "gpio22_grp" };
587
+
static const char * const gpio23_group[] = { "gpio23_grp" };
588
+
static const char * const gpio24_group[] = { "gpio24_grp" };
589
+
static const char * const gpio25_group[] = { "gpio25_grp" };
590
+
static const char * const gpio26_group[] = { "gpio26_grp" };
591
+
static const char * const gpio27_group[] = { "gpio27_grp" };
592
+
static const char * const gpio28_group[] = { "gpio28_grp" };
593
+
static const char * const gpio29_group[] = { "gpio29_grp" };
594
+
static const char * const gpio30_group[] = { "gpio30_grp" };
595
+
static const char * const gpio31_group[] = { "gpio31_grp" };
596
+
static const char * const gpio32_group[] = { "gpio32_grp" };
597
+
static const char * const gpio33_group[] = { "gpio33_grp" };
598
+
static const char * const gpio34_group[] = { "gpio34_grp" };
599
+
static const char * const gpio35_group[] = { "gpio35_grp" };
600
+
static const char * const gpio36_group[] = { "gpio36_grp" };
601
+
static const char * const gpio37_group[] = { "gpio37_grp" };
602
+
static const char * const gpio38_group[] = { "gpio38_grp" };
603
+
static const char * const gpio39_group[] = { "gpio39_grp" };
604
+
static const char * const gpio40_group[] = { "gpio40_grp" };
605
+
static const char * const gpio41_group[] = { "gpio41_grp" };
606
+
static const char * const gpio42_group[] = { "gpio42_grp" };
607
+
static const char * const gpio43_group[] = { "gpio43_grp" };
608
+
static const char * const gpio44_group[] = { "gpio44_grp" };
609
+
static const char * const gpio45_group[] = { "gpio45_grp" };
610
+
static const char * const gpio46_group[] = { "gpio46_grp" };
611
+
static const char * const gpio47_group[] = { "gpio47_grp" };
612
+
static const char * const gpio48_group[] = { "gpio48_grp" };
613
+
static const char * const gpio49_group[] = { "gpio49_grp" };
614
+
static const char * const gpio50_group[] = { "gpio50_grp" };
615
+
static const char * const gpio51_group[] = { "gpio51_grp" };
616
+
static const char * const gpio52_group[] = { "gpio52_grp" };
617
+
static const char * const gpio53_group[] = { "gpio53_grp" };
618
+
static const char * const gpio54_group[] = { "gpio54_grp" };
619
+
static const char * const gpio55_group[] = { "gpio55_grp" };
620
+
static const char * const gpio56_group[] = { "gpio56_grp" };
621
+
static const char * const gpio57_group[] = { "gpio57_grp" };
622
+
static const char * const gpio58_group[] = { "gpio58_grp" };
623
+
static const char * const gpio59_group[] = { "gpio59_grp" };
624
+
static const char * const gpio60_group[] = { "gpio60_grp" };
625
+
static const char * const gpio61_group[] = { "gpio61_grp" };
626
+
static const char * const gpio62_group[] = { "gpio62_grp" };
627
+
static const char * const gpio63_group[] = { "gpio63_grp" };
628
+
static const char * const gpio64_group[] = { "gpio64_grp" };
629
+
static const char * const gpio65_group[] = { "gpio65_grp" };
630
+
static const char * const gpio66_group[] = { "gpio66_grp" };
631
+
static const char * const gpio67_group[] = { "gpio67_grp" };
632
+
static const char * const eth1_group[] = { "eth1_grp" };
633
+
static const char * const i2s0_group[] = { "i2s0_grp" };
634
+
static const char * const i2s0_mclkin_group[] = { "i2s0_mclkin_grp" };
635
+
static const char * const i2s1_group[] = { "i2s1_grp" };
636
+
static const char * const i2s1_mclkin_group[] = { "i2s1_mclkin_grp" };
637
+
static const char * const spi0_group[] = { "spi0_grp" };
638
+
639
+
#define BM1880_PINMUX_FUNCTION(fname, mval, mask) \
640
+
[F_##fname] = { \
641
+
.name = #fname, \
642
+
.groups = fname##_group, \
643
+
.ngroups = ARRAY_SIZE(fname##_group), \
644
+
.mux_val = mval, \
645
+
.mux_mask = mask, \
646
+
}
647
+
648
+
#define BM1880_PINMUX_FUNCTION_MUX(fname, mval, mask, offset, shift)\
649
+
[F_##fname] = { \
650
+
.name = #fname, \
651
+
.groups = fname##_group, \
652
+
.ngroups = ARRAY_SIZE(fname##_group), \
653
+
.mux_val = mval, \
654
+
.mux_mask = mask, \
655
+
.mux = offset, \
656
+
.mux_shift = shift, \
657
+
}
658
+
659
+
static const struct bm1880_pinmux_function bm1880_pmux_functions[] = {
660
+
BM1880_PINMUX_FUNCTION(nand, 2, 0x03),
661
+
BM1880_PINMUX_FUNCTION(spi, 0, 0x03),
662
+
BM1880_PINMUX_FUNCTION(emmc, 1, 0x03),
663
+
BM1880_PINMUX_FUNCTION(sdio, 0, 0x03),
664
+
BM1880_PINMUX_FUNCTION(eth0, 0, 0x03),
665
+
BM1880_PINMUX_FUNCTION_MUX(pwm0, 2, 0x0F, 0x50, 0x00),
666
+
BM1880_PINMUX_FUNCTION_MUX(pwm1, 2, 0x0F, 0x50, 0x04),
667
+
BM1880_PINMUX_FUNCTION_MUX(pwm2, 2, 0x0F, 0x50, 0x08),
668
+
BM1880_PINMUX_FUNCTION_MUX(pwm3, 2, 0x0F, 0x50, 0x0C),
669
+
BM1880_PINMUX_FUNCTION_MUX(pwm4, 2, 0x0F, 0x50, 0x10),
670
+
BM1880_PINMUX_FUNCTION_MUX(pwm5, 2, 0x0F, 0x50, 0x14),
671
+
BM1880_PINMUX_FUNCTION_MUX(pwm6, 2, 0x0F, 0x50, 0x18),
672
+
BM1880_PINMUX_FUNCTION_MUX(pwm7, 2, 0x0F, 0x50, 0x1C),
673
+
BM1880_PINMUX_FUNCTION_MUX(pwm8, 2, 0x0F, 0x54, 0x00),
674
+
BM1880_PINMUX_FUNCTION_MUX(pwm9, 2, 0x0F, 0x54, 0x04),
675
+
BM1880_PINMUX_FUNCTION_MUX(pwm10, 2, 0x0F, 0x54, 0x08),
676
+
BM1880_PINMUX_FUNCTION_MUX(pwm11, 2, 0x0F, 0x54, 0x0C),
677
+
BM1880_PINMUX_FUNCTION_MUX(pwm12, 2, 0x0F, 0x54, 0x10),
678
+
BM1880_PINMUX_FUNCTION_MUX(pwm13, 2, 0x0F, 0x54, 0x14),
679
+
BM1880_PINMUX_FUNCTION_MUX(pwm14, 2, 0x0F, 0x54, 0x18),
680
+
BM1880_PINMUX_FUNCTION_MUX(pwm15, 2, 0x0F, 0x54, 0x1C),
681
+
BM1880_PINMUX_FUNCTION_MUX(pwm16, 2, 0x0F, 0x58, 0x00),
682
+
BM1880_PINMUX_FUNCTION_MUX(pwm17, 2, 0x0F, 0x58, 0x04),
683
+
BM1880_PINMUX_FUNCTION_MUX(pwm18, 2, 0x0F, 0x58, 0x08),
684
+
BM1880_PINMUX_FUNCTION_MUX(pwm19, 2, 0x0F, 0x58, 0x0C),
685
+
BM1880_PINMUX_FUNCTION_MUX(pwm20, 2, 0x0F, 0x58, 0x10),
686
+
BM1880_PINMUX_FUNCTION_MUX(pwm21, 2, 0x0F, 0x58, 0x14),
687
+
BM1880_PINMUX_FUNCTION_MUX(pwm22, 2, 0x0F, 0x58, 0x18),
688
+
BM1880_PINMUX_FUNCTION_MUX(pwm23, 2, 0x0F, 0x58, 0x1C),
689
+
BM1880_PINMUX_FUNCTION_MUX(pwm24, 2, 0x0F, 0x5C, 0x00),
690
+
BM1880_PINMUX_FUNCTION_MUX(pwm25, 2, 0x0F, 0x5C, 0x04),
691
+
BM1880_PINMUX_FUNCTION_MUX(pwm26, 2, 0x0F, 0x5C, 0x08),
692
+
BM1880_PINMUX_FUNCTION_MUX(pwm27, 2, 0x0F, 0x5C, 0x0C),
693
+
BM1880_PINMUX_FUNCTION_MUX(pwm28, 2, 0x0F, 0x5C, 0x10),
694
+
BM1880_PINMUX_FUNCTION_MUX(pwm29, 2, 0x0F, 0x5C, 0x14),
695
+
BM1880_PINMUX_FUNCTION_MUX(pwm30, 2, 0x0F, 0x5C, 0x18),
696
+
BM1880_PINMUX_FUNCTION_MUX(pwm31, 2, 0x0F, 0x5C, 0x1C),
697
+
BM1880_PINMUX_FUNCTION_MUX(pwm32, 2, 0x0F, 0x60, 0x00),
698
+
BM1880_PINMUX_FUNCTION_MUX(pwm33, 2, 0x0F, 0x60, 0x04),
699
+
BM1880_PINMUX_FUNCTION_MUX(pwm34, 2, 0x0F, 0x60, 0x08),
700
+
BM1880_PINMUX_FUNCTION_MUX(pwm35, 2, 0x0F, 0x60, 0x0C),
701
+
BM1880_PINMUX_FUNCTION_MUX(pwm36, 2, 0x0F, 0x60, 0x10),
702
+
BM1880_PINMUX_FUNCTION_MUX(pwm37, 2, 0x0F, 0x60, 0x1C),
703
+
BM1880_PINMUX_FUNCTION(i2c0, 1, 0x03),
704
+
BM1880_PINMUX_FUNCTION(i2c1, 1, 0x03),
705
+
BM1880_PINMUX_FUNCTION(i2c2, 1, 0x03),
706
+
BM1880_PINMUX_FUNCTION(i2c3, 1, 0x03),
707
+
BM1880_PINMUX_FUNCTION(i2c4, 1, 0x03),
708
+
BM1880_PINMUX_FUNCTION(uart0, 1, 0x03),
709
+
BM1880_PINMUX_FUNCTION(uart1, 1, 0x03),
710
+
BM1880_PINMUX_FUNCTION(uart2, 1, 0x03),
711
+
BM1880_PINMUX_FUNCTION(uart3, 1, 0x03),
712
+
BM1880_PINMUX_FUNCTION(uart4, 1, 0x03),
713
+
BM1880_PINMUX_FUNCTION(uart5, 1, 0x03),
714
+
BM1880_PINMUX_FUNCTION(uart6, 1, 0x03),
715
+
BM1880_PINMUX_FUNCTION(uart7, 1, 0x03),
716
+
BM1880_PINMUX_FUNCTION(uart8, 1, 0x03),
717
+
BM1880_PINMUX_FUNCTION(uart9, 1, 0x03),
718
+
BM1880_PINMUX_FUNCTION(uart10, 1, 0x03),
719
+
BM1880_PINMUX_FUNCTION(uart11, 1, 0x03),
720
+
BM1880_PINMUX_FUNCTION(uart12, 3, 0x03),
721
+
BM1880_PINMUX_FUNCTION(uart13, 3, 0x03),
722
+
BM1880_PINMUX_FUNCTION(uart14, 3, 0x03),
723
+
BM1880_PINMUX_FUNCTION(uart15, 3, 0x03),
724
+
BM1880_PINMUX_FUNCTION_MUX(gpio0, 0, 0x03, 0x4E0, 0x14),
725
+
BM1880_PINMUX_FUNCTION_MUX(gpio1, 0, 0x03, 0x4E4, 0x04),
726
+
BM1880_PINMUX_FUNCTION_MUX(gpio2, 0, 0x03, 0x4E4, 0x14),
727
+
BM1880_PINMUX_FUNCTION_MUX(gpio3, 0, 0x03, 0x4E8, 0x04),
728
+
BM1880_PINMUX_FUNCTION_MUX(gpio4, 0, 0x03, 0x4E8, 0x14),
729
+
BM1880_PINMUX_FUNCTION_MUX(gpio5, 0, 0x03, 0x4EC, 0x04),
730
+
BM1880_PINMUX_FUNCTION_MUX(gpio6, 0, 0x03, 0x4EC, 0x14),
731
+
BM1880_PINMUX_FUNCTION_MUX(gpio7, 0, 0x03, 0x4F0, 0x04),
732
+
BM1880_PINMUX_FUNCTION_MUX(gpio8, 0, 0x03, 0x4F0, 0x14),
733
+
BM1880_PINMUX_FUNCTION_MUX(gpio9, 0, 0x03, 0x4F4, 0x04),
734
+
BM1880_PINMUX_FUNCTION_MUX(gpio10, 0, 0x03, 0x4F4, 0x14),
735
+
BM1880_PINMUX_FUNCTION_MUX(gpio11, 0, 0x03, 0x4F8, 0x04),
736
+
BM1880_PINMUX_FUNCTION_MUX(gpio12, 1, 0x03, 0x4F8, 0x14),
737
+
BM1880_PINMUX_FUNCTION_MUX(gpio13, 1, 0x03, 0x4FC, 0x04),
738
+
BM1880_PINMUX_FUNCTION_MUX(gpio14, 0, 0x03, 0x474, 0x14),
739
+
BM1880_PINMUX_FUNCTION_MUX(gpio15, 0, 0x03, 0x478, 0x04),
740
+
BM1880_PINMUX_FUNCTION_MUX(gpio16, 0, 0x03, 0x478, 0x14),
741
+
BM1880_PINMUX_FUNCTION_MUX(gpio17, 0, 0x03, 0x47C, 0x04),
742
+
BM1880_PINMUX_FUNCTION_MUX(gpio18, 0, 0x03, 0x47C, 0x14),
743
+
BM1880_PINMUX_FUNCTION_MUX(gpio19, 0, 0x03, 0x480, 0x04),
744
+
BM1880_PINMUX_FUNCTION_MUX(gpio20, 0, 0x03, 0x480, 0x14),
745
+
BM1880_PINMUX_FUNCTION_MUX(gpio21, 0, 0x03, 0x484, 0x04),
746
+
BM1880_PINMUX_FUNCTION_MUX(gpio22, 0, 0x03, 0x484, 0x14),
747
+
BM1880_PINMUX_FUNCTION_MUX(gpio23, 0, 0x03, 0x488, 0x04),
748
+
BM1880_PINMUX_FUNCTION_MUX(gpio24, 0, 0x03, 0x488, 0x14),
749
+
BM1880_PINMUX_FUNCTION_MUX(gpio25, 0, 0x03, 0x48C, 0x04),
750
+
BM1880_PINMUX_FUNCTION_MUX(gpio26, 0, 0x03, 0x48C, 0x14),
751
+
BM1880_PINMUX_FUNCTION_MUX(gpio27, 0, 0x03, 0x490, 0x04),
752
+
BM1880_PINMUX_FUNCTION_MUX(gpio28, 0, 0x03, 0x490, 0x14),
753
+
BM1880_PINMUX_FUNCTION_MUX(gpio29, 0, 0x03, 0x494, 0x04),
754
+
BM1880_PINMUX_FUNCTION_MUX(gpio30, 0, 0x03, 0x494, 0x14),
755
+
BM1880_PINMUX_FUNCTION_MUX(gpio31, 0, 0x03, 0x498, 0x04),
756
+
BM1880_PINMUX_FUNCTION_MUX(gpio32, 0, 0x03, 0x498, 0x14),
757
+
BM1880_PINMUX_FUNCTION_MUX(gpio33, 0, 0x03, 0x49C, 0x04),
758
+
BM1880_PINMUX_FUNCTION_MUX(gpio34, 0, 0x03, 0x49C, 0x14),
759
+
BM1880_PINMUX_FUNCTION_MUX(gpio35, 0, 0x03, 0x4A0, 0x04),
760
+
BM1880_PINMUX_FUNCTION_MUX(gpio36, 0, 0x03, 0x4A0, 0x14),
761
+
BM1880_PINMUX_FUNCTION_MUX(gpio37, 0, 0x03, 0x4A4, 0x04),
762
+
BM1880_PINMUX_FUNCTION_MUX(gpio38, 0, 0x03, 0x4A4, 0x14),
763
+
BM1880_PINMUX_FUNCTION_MUX(gpio39, 0, 0x03, 0x4A8, 0x04),
764
+
BM1880_PINMUX_FUNCTION_MUX(gpio40, 0, 0x03, 0x4A8, 0x14),
765
+
BM1880_PINMUX_FUNCTION_MUX(gpio41, 0, 0x03, 0x4AC, 0x04),
766
+
BM1880_PINMUX_FUNCTION_MUX(gpio42, 0, 0x03, 0x4AC, 0x14),
767
+
BM1880_PINMUX_FUNCTION_MUX(gpio43, 0, 0x03, 0x4B0, 0x04),
768
+
BM1880_PINMUX_FUNCTION_MUX(gpio44, 0, 0x03, 0x4B0, 0x14),
769
+
BM1880_PINMUX_FUNCTION_MUX(gpio45, 0, 0x03, 0x4B4, 0x04),
770
+
BM1880_PINMUX_FUNCTION_MUX(gpio46, 0, 0x03, 0x4B4, 0x14),
771
+
BM1880_PINMUX_FUNCTION_MUX(gpio47, 0, 0x03, 0x4B8, 0x04),
772
+
BM1880_PINMUX_FUNCTION_MUX(gpio48, 0, 0x03, 0x4B8, 0x14),
773
+
BM1880_PINMUX_FUNCTION_MUX(gpio49, 0, 0x03, 0x4BC, 0x04),
774
+
BM1880_PINMUX_FUNCTION_MUX(gpio50, 0, 0x03, 0x4BC, 0x14),
775
+
BM1880_PINMUX_FUNCTION_MUX(gpio51, 0, 0x03, 0x4C0, 0x04),
776
+
BM1880_PINMUX_FUNCTION_MUX(gpio52, 0, 0x03, 0x4C0, 0x14),
777
+
BM1880_PINMUX_FUNCTION_MUX(gpio53, 0, 0x03, 0x4C4, 0x04),
778
+
BM1880_PINMUX_FUNCTION_MUX(gpio54, 0, 0x03, 0x4C4, 0x14),
779
+
BM1880_PINMUX_FUNCTION_MUX(gpio55, 0, 0x03, 0x4C8, 0x04),
780
+
BM1880_PINMUX_FUNCTION_MUX(gpio56, 0, 0x03, 0x4C8, 0x14),
781
+
BM1880_PINMUX_FUNCTION_MUX(gpio57, 0, 0x03, 0x4CC, 0x04),
782
+
BM1880_PINMUX_FUNCTION_MUX(gpio58, 0, 0x03, 0x4CC, 0x14),
783
+
BM1880_PINMUX_FUNCTION_MUX(gpio59, 0, 0x03, 0x4D0, 0x04),
784
+
BM1880_PINMUX_FUNCTION_MUX(gpio60, 0, 0x03, 0x4D0, 0x14),
785
+
BM1880_PINMUX_FUNCTION_MUX(gpio61, 0, 0x03, 0x4D4, 0x04),
786
+
BM1880_PINMUX_FUNCTION_MUX(gpio62, 0, 0x03, 0x4D4, 0x14),
787
+
BM1880_PINMUX_FUNCTION_MUX(gpio63, 0, 0x03, 0x4D8, 0x04),
788
+
BM1880_PINMUX_FUNCTION_MUX(gpio64, 0, 0x03, 0x4D8, 0x14),
789
+
BM1880_PINMUX_FUNCTION_MUX(gpio65, 0, 0x03, 0x4DC, 0x04),
790
+
BM1880_PINMUX_FUNCTION_MUX(gpio66, 0, 0x03, 0x4DC, 0x14),
791
+
BM1880_PINMUX_FUNCTION_MUX(gpio67, 0, 0x03, 0x4E0, 0x04),
792
+
BM1880_PINMUX_FUNCTION(eth1, 1, 0x03),
793
+
BM1880_PINMUX_FUNCTION(i2s0, 2, 0x03),
794
+
BM1880_PINMUX_FUNCTION(i2s0_mclkin, 1, 0x03),
795
+
BM1880_PINMUX_FUNCTION(i2s1, 2, 0x03),
796
+
BM1880_PINMUX_FUNCTION(i2s1_mclkin, 1, 0x03),
797
+
BM1880_PINMUX_FUNCTION(spi0, 1, 0x03),
798
+
};
799
+
800
+
static int bm1880_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
801
+
{
802
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
803
+
804
+
return pctrl->ngroups;
805
+
}
806
+
807
+
static const char *bm1880_pctrl_get_group_name(struct pinctrl_dev *pctldev,
808
+
unsigned int selector)
809
+
{
810
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
811
+
812
+
return pctrl->groups[selector].name;
813
+
}
814
+
815
+
static int bm1880_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
816
+
unsigned int selector,
817
+
const unsigned int **pins,
818
+
unsigned int *num_pins)
819
+
{
820
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
821
+
822
+
*pins = pctrl->groups[selector].pins;
823
+
*num_pins = pctrl->groups[selector].npins;
824
+
825
+
return 0;
826
+
}
827
+
828
+
static const struct pinctrl_ops bm1880_pctrl_ops = {
829
+
.get_groups_count = bm1880_pctrl_get_groups_count,
830
+
.get_group_name = bm1880_pctrl_get_group_name,
831
+
.get_group_pins = bm1880_pctrl_get_group_pins,
832
+
.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
833
+
.dt_free_map = pinctrl_utils_free_map,
834
+
};
835
+
836
+
/* pinmux */
837
+
static int bm1880_pmux_get_functions_count(struct pinctrl_dev *pctldev)
838
+
{
839
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
840
+
841
+
return pctrl->nfuncs;
842
+
}
843
+
844
+
static const char *bm1880_pmux_get_function_name(struct pinctrl_dev *pctldev,
845
+
unsigned int selector)
846
+
{
847
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
848
+
849
+
return pctrl->funcs[selector].name;
850
+
}
851
+
852
+
static int bm1880_pmux_get_function_groups(struct pinctrl_dev *pctldev,
853
+
unsigned int selector,
854
+
const char * const **groups,
855
+
unsigned * const num_groups)
856
+
{
857
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
858
+
859
+
*groups = pctrl->funcs[selector].groups;
860
+
*num_groups = pctrl->funcs[selector].ngroups;
861
+
return 0;
862
+
}
863
+
864
+
static int bm1880_pinmux_set_mux(struct pinctrl_dev *pctldev,
865
+
unsigned int function,
866
+
unsigned int group)
867
+
{
868
+
struct bm1880_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev);
869
+
const struct bm1880_pctrl_group *pgrp = &pctrl->groups[group];
870
+
const struct bm1880_pinmux_function *func = &pctrl->funcs[function];
871
+
int i;
872
+
873
+
if (func->mux) {
874
+
u32 regval = readl_relaxed(pctrl->base + BM1880_REG_MUX +
875
+
func->mux);
876
+
877
+
regval &= ~(func->mux_mask << func->mux_shift);
878
+
regval |= func->mux_val << func->mux_shift;
879
+
writel_relaxed(regval, pctrl->base + BM1880_REG_MUX +
880
+
func->mux);
881
+
} else {
882
+
for (i = 0; i < pgrp->npins; i++) {
883
+
unsigned int pin = pgrp->pins[i];
884
+
u32 offset = (pin >> 1) << 2;
885
+
u32 mux_offset = ((!((pin + 1) & 1) << 4) + 4);
886
+
u32 regval = readl_relaxed(pctrl->base +
887
+
BM1880_REG_MUX + offset);
888
+
889
+
regval &= ~(func->mux_mask << mux_offset);
890
+
regval |= func->mux_val << mux_offset;
891
+
892
+
writel_relaxed(regval, pctrl->base +
893
+
BM1880_REG_MUX + offset);
894
+
}
895
+
}
896
+
897
+
return 0;
898
+
}
899
+
900
+
static const struct pinmux_ops bm1880_pinmux_ops = {
901
+
.get_functions_count = bm1880_pmux_get_functions_count,
902
+
.get_function_name = bm1880_pmux_get_function_name,
903
+
.get_function_groups = bm1880_pmux_get_function_groups,
904
+
.set_mux = bm1880_pinmux_set_mux,
905
+
};
906
+
907
+
static struct pinctrl_desc bm1880_desc = {
908
+
.name = "bm1880_pinctrl",
909
+
.pins = bm1880_pins,
910
+
.npins = ARRAY_SIZE(bm1880_pins),
911
+
.pctlops = &bm1880_pctrl_ops,
912
+
.pmxops = &bm1880_pinmux_ops,
913
+
.owner = THIS_MODULE,
914
+
};
915
+
916
+
static int bm1880_pinctrl_probe(struct platform_device *pdev)
917
+
918
+
{
919
+
struct resource *res;
920
+
struct bm1880_pinctrl *pctrl;
921
+
922
+
pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL);
923
+
if (!pctrl)
924
+
return -ENOMEM;
925
+
926
+
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
927
+
pctrl->base = devm_ioremap_resource(&pdev->dev, res);
928
+
if (IS_ERR(pctrl->base))
929
+
return PTR_ERR(pctrl->base);
930
+
931
+
pctrl->groups = bm1880_pctrl_groups;
932
+
pctrl->ngroups = ARRAY_SIZE(bm1880_pctrl_groups);
933
+
pctrl->funcs = bm1880_pmux_functions;
934
+
pctrl->nfuncs = ARRAY_SIZE(bm1880_pmux_functions);
935
+
936
+
pctrl->pctrldev = devm_pinctrl_register(&pdev->dev, &bm1880_desc,
937
+
pctrl);
938
+
if (IS_ERR(pctrl->pctrldev))
939
+
return PTR_ERR(pctrl->pctrldev);
940
+
941
+
platform_set_drvdata(pdev, pctrl);
942
+
943
+
dev_info(&pdev->dev, "BM1880 pinctrl driver initialized\n");
944
+
945
+
return 0;
946
+
}
947
+
948
+
static const struct of_device_id bm1880_pinctrl_of_match[] = {
949
+
{ .compatible = "bitmain,bm1880-pinctrl" },
950
+
{ }
951
+
};
952
+
953
+
static struct platform_driver bm1880_pinctrl_driver = {
954
+
.driver = {
955
+
.name = "pinctrl-bm1880",
956
+
.of_match_table = of_match_ptr(bm1880_pinctrl_of_match),
957
+
},
958
+
.probe = bm1880_pinctrl_probe,
959
+
};
960
+
961
+
static int __init bm1880_pinctrl_init(void)
962
+
{
963
+
return platform_driver_register(&bm1880_pinctrl_driver);
964
+
}
965
+
arch_initcall(bm1880_pinctrl_init);