···163163#define NVOBJ_ENGINE_COPY0 3164164#define NVOBJ_ENGINE_COPY1 4165165#define NVOBJ_ENGINE_MPEG 5166166+#define NVOBJ_ENGINE_PPP NVOBJ_ENGINE_MPEG167167+#define NVOBJ_ENGINE_BSP 6168168+#define NVOBJ_ENGINE_VP 7166169#define NVOBJ_ENGINE_DISPLAY 15167170#define NVOBJ_ENGINE_NR 16168171···12291226/* nv84_crypt.c */12301227extern int nv84_crypt_create(struct drm_device *);1231122812291229+/* nv98_crypt.c */12301230+extern int nv98_crypt_create(struct drm_device *dev);12311231+12321232/* nva3_copy.c */12331233extern int nva3_copy_create(struct drm_device *dev);12341234···1243123712441238/* nv50_mpeg.c */12451239extern int nv50_mpeg_create(struct drm_device *dev);12401240+12411241+/* nv84_bsp.c */12421242+/* nv98_bsp.c */12431243+extern int nv84_bsp_create(struct drm_device *dev);12441244+12451245+/* nv84_vp.c */12461246+/* nv98_vp.c */12471247+extern int nv84_vp_create(struct drm_device *dev);12481248+12491249+/* nv98_ppp.c */12501250+extern int nv98_ppp_create(struct drm_device *dev);1246125112471252/* nv04_instmem.c */12481253extern int nv04_instmem_init(struct drm_device *);
+20-5
drivers/gpu/drm/nouveau/nouveau_state.c
···679679 case 0xa0:680680 nv84_crypt_create(dev);681681 break;682682+ case 0x98:683683+ case 0xaa:684684+ case 0xac:685685+ nv98_crypt_create(dev);686686+ break;682687 }683688684689 switch (dev_priv->card_type) {···705700 break;706701 }707702703703+ if (dev_priv->chipset >= 0xa3 || dev_priv->chipset == 0x98) {704704+ nv84_bsp_create(dev);705705+ nv84_vp_create(dev);706706+ nv98_ppp_create(dev);707707+ } else708708+ if (dev_priv->chipset >= 0x84) {709709+ nv50_mpeg_create(dev);710710+ nv84_bsp_create(dev);711711+ nv84_vp_create(dev);712712+ } else713713+ if (dev_priv->chipset >= 0x50) {714714+ nv50_mpeg_create(dev);715715+ } else708716 if (dev_priv->card_type == NV_40 ||709717 dev_priv->chipset == 0x31 ||710718 dev_priv->chipset == 0x34 ||711711- dev_priv->chipset == 0x36)719719+ dev_priv->chipset == 0x36) {712720 nv31_mpeg_create(dev);713713- else714714- if (dev_priv->card_type == NV_50 &&715715- (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0))716716- nv50_mpeg_create(dev);721721+ }717722718723 for (e = 0; e < NVOBJ_ENGINE_NR; e++) {719724 if (dev_priv->eng[e]) {
+83
drivers/gpu/drm/nouveau/nv84_bsp.c
···11+/*22+ * Copyright 2011 Red Hat Inc.33+ *44+ * Permission is hereby granted, free of charge, to any person obtaining a55+ * copy of this software and associated documentation files (the "Software"),66+ * to deal in the Software without restriction, including without limitation77+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,88+ * and/or sell copies of the Software, and to permit persons to whom the99+ * Software is furnished to do so, subject to the following conditions:1010+ *1111+ * The above copyright notice and this permission notice shall be included in1212+ * all copies or substantial portions of the Software.1313+ *1414+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR1515+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,1616+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL1717+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR1818+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,1919+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR2020+ * OTHER DEALINGS IN THE SOFTWARE.2121+ *2222+ * Authors: Ben Skeggs2323+ */2424+2525+#include "drmP.h"2626+#include "nouveau_drv.h"2727+#include "nouveau_util.h"2828+#include "nouveau_vm.h"2929+#include "nouveau_ramht.h"3030+3131+/*XXX: This stub is currently used on NV98+ also, as soon as this becomes3232+ * more than just an enable/disable stub this needs to be split out to3333+ * nv98_bsp.c...3434+ */3535+3636+struct nv84_bsp_engine {3737+ struct nouveau_exec_engine base;3838+};3939+4040+static int4141+nv84_bsp_fini(struct drm_device *dev, int engine, bool suspend)4242+{4343+ if (!(nv_rd32(dev, 0x000200) & 0x00008000))4444+ return 0;4545+4646+ nv_mask(dev, 0x000200, 0x00008000, 0x00000000);4747+ return 0;4848+}4949+5050+static int5151+nv84_bsp_init(struct drm_device *dev, int engine)5252+{5353+ nv_mask(dev, 0x000200, 0x00008000, 0x00000000);5454+ nv_mask(dev, 0x000200, 0x00008000, 0x00008000);5555+ return 0;5656+}5757+5858+static void5959+nv84_bsp_destroy(struct drm_device *dev, int engine)6060+{6161+ struct nv84_bsp_engine *pbsp = nv_engine(dev, engine);6262+6363+ NVOBJ_ENGINE_DEL(dev, BSP);6464+6565+ kfree(pbsp);6666+}6767+6868+int6969+nv84_bsp_create(struct drm_device *dev)7070+{7171+ struct nv84_bsp_engine *pbsp;7272+7373+ pbsp = kzalloc(sizeof(*pbsp), GFP_KERNEL);7474+ if (!pbsp)7575+ return -ENOMEM;7676+7777+ pbsp->base.destroy = nv84_bsp_destroy;7878+ pbsp->base.init = nv84_bsp_init;7979+ pbsp->base.fini = nv84_bsp_fini;8080+8181+ NVOBJ_ENGINE_ADD(dev, BSP, &pbsp->base);8282+ return 0;8383+}
+83
drivers/gpu/drm/nouveau/nv84_vp.c
···11+/*22+ * Copyright 2011 Red Hat Inc.33+ *44+ * Permission is hereby granted, free of charge, to any person obtaining a55+ * copy of this software and associated documentation files (the "Software"),66+ * to deal in the Software without restriction, including without limitation77+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,88+ * and/or sell copies of the Software, and to permit persons to whom the99+ * Software is furnished to do so, subject to the following conditions:1010+ *1111+ * The above copyright notice and this permission notice shall be included in1212+ * all copies or substantial portions of the Software.1313+ *1414+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR1515+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,1616+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL1717+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR1818+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,1919+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR2020+ * OTHER DEALINGS IN THE SOFTWARE.2121+ *2222+ * Authors: Ben Skeggs2323+ */2424+2525+#include "drmP.h"2626+#include "nouveau_drv.h"2727+#include "nouveau_util.h"2828+#include "nouveau_vm.h"2929+#include "nouveau_ramht.h"3030+3131+/*XXX: This stub is currently used on NV98+ also, as soon as this becomes3232+ * more than just an enable/disable stub this needs to be split out to3333+ * nv98_vp.c...3434+ */3535+3636+struct nv84_vp_engine {3737+ struct nouveau_exec_engine base;3838+};3939+4040+static int4141+nv84_vp_fini(struct drm_device *dev, int engine, bool suspend)4242+{4343+ if (!(nv_rd32(dev, 0x000200) & 0x00020000))4444+ return 0;4545+4646+ nv_mask(dev, 0x000200, 0x00020000, 0x00000000);4747+ return 0;4848+}4949+5050+static int5151+nv84_vp_init(struct drm_device *dev, int engine)5252+{5353+ nv_mask(dev, 0x000200, 0x00020000, 0x00000000);5454+ nv_mask(dev, 0x000200, 0x00020000, 0x00020000);5555+ return 0;5656+}5757+5858+static void5959+nv84_vp_destroy(struct drm_device *dev, int engine)6060+{6161+ struct nv84_vp_engine *pvp = nv_engine(dev, engine);6262+6363+ NVOBJ_ENGINE_DEL(dev, VP);6464+6565+ kfree(pvp);6666+}6767+6868+int6969+nv84_vp_create(struct drm_device *dev)7070+{7171+ struct nv84_vp_engine *pvp;7272+7373+ pvp = kzalloc(sizeof(*pvp), GFP_KERNEL);7474+ if (!pvp)7575+ return -ENOMEM;7676+7777+ pvp->base.destroy = nv84_vp_destroy;7878+ pvp->base.init = nv84_vp_init;7979+ pvp->base.fini = nv84_vp_fini;8080+8181+ NVOBJ_ENGINE_ADD(dev, VP, &pvp->base);8282+ return 0;8383+}
+78
drivers/gpu/drm/nouveau/nv98_crypt.c
···11+/*22+ * Copyright 2011 Red Hat Inc.33+ *44+ * Permission is hereby granted, free of charge, to any person obtaining a55+ * copy of this software and associated documentation files (the "Software"),66+ * to deal in the Software without restriction, including without limitation77+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,88+ * and/or sell copies of the Software, and to permit persons to whom the99+ * Software is furnished to do so, subject to the following conditions:1010+ *1111+ * The above copyright notice and this permission notice shall be included in1212+ * all copies or substantial portions of the Software.1313+ *1414+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR1515+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,1616+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL1717+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR1818+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,1919+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR2020+ * OTHER DEALINGS IN THE SOFTWARE.2121+ *2222+ * Authors: Ben Skeggs2323+ */2424+2525+#include "drmP.h"2626+#include "nouveau_drv.h"2727+#include "nouveau_util.h"2828+#include "nouveau_vm.h"2929+#include "nouveau_ramht.h"3030+3131+struct nv98_crypt_engine {3232+ struct nouveau_exec_engine base;3333+};3434+3535+static int3636+nv98_crypt_fini(struct drm_device *dev, int engine, bool suspend)3737+{3838+ if (!(nv_rd32(dev, 0x000200) & 0x00004000))3939+ return 0;4040+4141+ nv_mask(dev, 0x000200, 0x00004000, 0x00000000);4242+ return 0;4343+}4444+4545+static int4646+nv98_crypt_init(struct drm_device *dev, int engine)4747+{4848+ nv_mask(dev, 0x000200, 0x00004000, 0x00000000);4949+ nv_mask(dev, 0x000200, 0x00004000, 0x00004000);5050+ return 0;5151+}5252+5353+static void5454+nv98_crypt_destroy(struct drm_device *dev, int engine)5555+{5656+ struct nv98_crypt_engine *pcrypt = nv_engine(dev, engine);5757+5858+ NVOBJ_ENGINE_DEL(dev, CRYPT);5959+6060+ kfree(pcrypt);6161+}6262+6363+int6464+nv98_crypt_create(struct drm_device *dev)6565+{6666+ struct nv98_crypt_engine *pcrypt;6767+6868+ pcrypt = kzalloc(sizeof(*pcrypt), GFP_KERNEL);6969+ if (!pcrypt)7070+ return -ENOMEM;7171+7272+ pcrypt->base.destroy = nv98_crypt_destroy;7373+ pcrypt->base.init = nv98_crypt_init;7474+ pcrypt->base.fini = nv98_crypt_fini;7575+7676+ NVOBJ_ENGINE_ADD(dev, CRYPT, &pcrypt->base);7777+ return 0;7878+}
+78
drivers/gpu/drm/nouveau/nv98_ppp.c
···11+/*22+ * Copyright 2011 Red Hat Inc.33+ *44+ * Permission is hereby granted, free of charge, to any person obtaining a55+ * copy of this software and associated documentation files (the "Software"),66+ * to deal in the Software without restriction, including without limitation77+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,88+ * and/or sell copies of the Software, and to permit persons to whom the99+ * Software is furnished to do so, subject to the following conditions:1010+ *1111+ * The above copyright notice and this permission notice shall be included in1212+ * all copies or substantial portions of the Software.1313+ *1414+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR1515+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,1616+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL1717+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR1818+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,1919+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR2020+ * OTHER DEALINGS IN THE SOFTWARE.2121+ *2222+ * Authors: Ben Skeggs2323+ */2424+2525+#include "drmP.h"2626+#include "nouveau_drv.h"2727+#include "nouveau_util.h"2828+#include "nouveau_vm.h"2929+#include "nouveau_ramht.h"3030+3131+struct nv98_ppp_engine {3232+ struct nouveau_exec_engine base;3333+};3434+3535+static int3636+nv98_ppp_fini(struct drm_device *dev, int engine, bool suspend)3737+{3838+ if (!(nv_rd32(dev, 0x000200) & 0x00000002))3939+ return 0;4040+4141+ nv_mask(dev, 0x000200, 0x00000002, 0x00000000);4242+ return 0;4343+}4444+4545+static int4646+nv98_ppp_init(struct drm_device *dev, int engine)4747+{4848+ nv_mask(dev, 0x000200, 0x00000002, 0x00000000);4949+ nv_mask(dev, 0x000200, 0x00000002, 0x00000002);5050+ return 0;5151+}5252+5353+static void5454+nv98_ppp_destroy(struct drm_device *dev, int engine)5555+{5656+ struct nv98_ppp_engine *pppp = nv_engine(dev, engine);5757+5858+ NVOBJ_ENGINE_DEL(dev, PPP);5959+6060+ kfree(pppp);6161+}6262+6363+int6464+nv98_ppp_create(struct drm_device *dev)6565+{6666+ struct nv98_ppp_engine *pppp;6767+6868+ pppp = kzalloc(sizeof(*pppp), GFP_KERNEL);6969+ if (!pppp)7070+ return -ENOMEM;7171+7272+ pppp->base.destroy = nv98_ppp_destroy;7373+ pppp->base.init = nv98_ppp_init;7474+ pppp->base.fini = nv98_ppp_fini;7575+7676+ NVOBJ_ENGINE_ADD(dev, PPP, &pppp->base);7777+ return 0;7878+}