x86/speculation: Simplify the CPU bug detection logic

Only CPUs which speculate can speculate. Therefore, it seems prudent
to test for cpu_no_speculation first and only then determine whether
a specific speculating CPU is susceptible to store bypass speculation.
This is underlined by all CPUs currently listed in cpu_no_speculation
were present in cpu_no_spec_store_bypass as well.

Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: bp@suse.de
Cc: konrad.wilk@oracle.com
Link: https://lkml.kernel.org/r/20180522090539.GA24668@light.dominikbrodowski.net

authored by Dominik Brodowski and committed by Thomas Gleixner 8ecc4979 0aa48468

Changed files
+7 -15
arch
x86
kernel
cpu
+7 -15
arch/x86/kernel/cpu/common.c
··· 942 942 {} 943 943 }; 944 944 945 + /* Only list CPUs which speculate but are non susceptible to SSB */ 945 946 static const __initconst struct x86_cpu_id cpu_no_spec_store_bypass[] = { 946 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PINEVIEW }, 947 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_LINCROFT }, 948 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_PENWELL }, 949 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CLOVERVIEW }, 950 - { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_CEDARVIEW }, 951 947 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT1 }, 952 948 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_AIRMONT }, 953 949 { X86_VENDOR_INTEL, 6, INTEL_FAM6_ATOM_SILVERMONT2 }, ··· 951 955 { X86_VENDOR_INTEL, 6, INTEL_FAM6_CORE_YONAH }, 952 956 { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNL }, 953 957 { X86_VENDOR_INTEL, 6, INTEL_FAM6_XEON_PHI_KNM }, 954 - { X86_VENDOR_CENTAUR, 5, }, 955 - { X86_VENDOR_INTEL, 5, }, 956 - { X86_VENDOR_NSC, 5, }, 957 958 { X86_VENDOR_AMD, 0x12, }, 958 959 { X86_VENDOR_AMD, 0x11, }, 959 960 { X86_VENDOR_AMD, 0x10, }, 960 961 { X86_VENDOR_AMD, 0xf, }, 961 - { X86_VENDOR_ANY, 4, }, 962 962 {} 963 963 }; 964 964 ··· 962 970 { 963 971 u64 ia32_cap = 0; 964 972 973 + if (x86_match_cpu(cpu_no_speculation)) 974 + return; 975 + 976 + setup_force_cpu_bug(X86_BUG_SPECTRE_V1); 977 + setup_force_cpu_bug(X86_BUG_SPECTRE_V2); 978 + 965 979 if (cpu_has(c, X86_FEATURE_ARCH_CAPABILITIES)) 966 980 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, ia32_cap); 967 981 968 982 if (!x86_match_cpu(cpu_no_spec_store_bypass) && 969 983 !(ia32_cap & ARCH_CAP_SSB_NO)) 970 984 setup_force_cpu_bug(X86_BUG_SPEC_STORE_BYPASS); 971 - 972 - if (x86_match_cpu(cpu_no_speculation)) 973 - return; 974 - 975 - setup_force_cpu_bug(X86_BUG_SPECTRE_V1); 976 - setup_force_cpu_bug(X86_BUG_SPECTRE_V2); 977 985 978 986 if (x86_match_cpu(cpu_no_meltdown)) 979 987 return;