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Merge tag 'staging-4.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging

Pull staging driver fixes from Greg KH:
"Here are some staging driver fixes, well, really all just IIO driver
fixes, for 4.0-rc6. They fix issues that have been reported with
these drivers.

All of these patches have been in linux-next for a while"

* tag 'staging-4.0-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
iio: imu: Use iio_trigger_get for indio_dev->trig assignment
iio: adc: vf610: use ADC clock within specification
iio/adc/cc10001_adc.c: Fix !HAS_IOMEM build
iio: core: Fix double free.
iio:inv-mpu6050: Fix inconsistency for the scale channel
staging: iio: dummy: Fix undefined symbol build error
iio: inv_mpu6050: Clear timestamps fifo while resetting hardware fifo
staging: iio: hmc5843: Set iio name property in sysfs
iio: bmc150: change sampling frequency
iio: fix drivers that check buffer->scan_mask

+132 -91
+1 -1
drivers/iio/accel/bma180.c
··· 659 660 mutex_lock(&data->mutex); 661 662 - for_each_set_bit(bit, indio_dev->buffer->scan_mask, 663 indio_dev->masklength) { 664 ret = bma180_get_data_reg(data, bit); 665 if (ret < 0) {
··· 659 660 mutex_lock(&data->mutex); 661 662 + for_each_set_bit(bit, indio_dev->active_scan_mask, 663 indio_dev->masklength) { 664 ret = bma180_get_data_reg(data, bit); 665 if (ret < 0) {
+10 -10
drivers/iio/accel/bmc150-accel.c
··· 168 int val; 169 int val2; 170 u8 bw_bits; 171 - } bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08}, 172 - {15, 630000, 0x09}, 173 - {31, 250000, 0x0A}, 174 - {62, 500000, 0x0B}, 175 - {125, 0, 0x0C}, 176 - {250, 0, 0x0D}, 177 - {500, 0, 0x0E}, 178 - {1000, 0, 0x0F} }; 179 180 static const struct { 181 int bw_bits; ··· 840 } 841 842 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 843 - "7.810000 15.630000 31.250000 62.500000 125 250 500 1000"); 844 845 static struct attribute *bmc150_accel_attributes[] = { 846 &iio_const_attr_sampling_frequency_available.dev_attr.attr, ··· 986 int bit, ret, i = 0; 987 988 mutex_lock(&data->mutex); 989 - for_each_set_bit(bit, indio_dev->buffer->scan_mask, 990 indio_dev->masklength) { 991 ret = i2c_smbus_read_word_data(data->client, 992 BMC150_ACCEL_AXIS_TO_REG(bit));
··· 168 int val; 169 int val2; 170 u8 bw_bits; 171 + } bmc150_accel_samp_freq_table[] = { {15, 620000, 0x08}, 172 + {31, 260000, 0x09}, 173 + {62, 500000, 0x0A}, 174 + {125, 0, 0x0B}, 175 + {250, 0, 0x0C}, 176 + {500, 0, 0x0D}, 177 + {1000, 0, 0x0E}, 178 + {2000, 0, 0x0F} }; 179 180 static const struct { 181 int bw_bits; ··· 840 } 841 842 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( 843 + "15.620000 31.260000 62.50000 125 250 500 1000 2000"); 844 845 static struct attribute *bmc150_accel_attributes[] = { 846 &iio_const_attr_sampling_frequency_available.dev_attr.attr, ··· 986 int bit, ret, i = 0; 987 988 mutex_lock(&data->mutex); 989 + for_each_set_bit(bit, indio_dev->active_scan_mask, 990 indio_dev->masklength) { 991 ret = i2c_smbus_read_word_data(data->client, 992 BMC150_ACCEL_AXIS_TO_REG(bit));
+1 -1
drivers/iio/accel/kxcjk-1013.c
··· 956 957 mutex_lock(&data->mutex); 958 959 - for_each_set_bit(bit, indio_dev->buffer->scan_mask, 960 indio_dev->masklength) { 961 ret = kxcjk1013_get_acc_reg(data, bit); 962 if (ret < 0) {
··· 956 957 mutex_lock(&data->mutex); 958 959 + for_each_set_bit(bit, indio_dev->active_scan_mask, 960 indio_dev->masklength) { 961 ret = kxcjk1013_get_acc_reg(data, bit); 962 if (ret < 0) {
+2 -1
drivers/iio/adc/Kconfig
··· 137 138 config CC10001_ADC 139 tristate "Cosmic Circuits 10001 ADC driver" 140 - depends on HAS_IOMEM || HAVE_CLK || REGULATOR 141 select IIO_BUFFER 142 select IIO_TRIGGERED_BUFFER 143 help
··· 137 138 config CC10001_ADC 139 tristate "Cosmic Circuits 10001 ADC driver" 140 + depends on HAVE_CLK || REGULATOR 141 + depends on HAS_IOMEM 142 select IIO_BUFFER 143 select IIO_TRIGGERED_BUFFER 144 help
+2 -3
drivers/iio/adc/at91_adc.c
··· 544 { 545 struct iio_dev *idev = iio_trigger_get_drvdata(trig); 546 struct at91_adc_state *st = iio_priv(idev); 547 - struct iio_buffer *buffer = idev->buffer; 548 struct at91_adc_reg_desc *reg = st->registers; 549 u32 status = at91_adc_readl(st, reg->trigger_register); 550 int value; ··· 563 at91_adc_writel(st, reg->trigger_register, 564 status | value); 565 566 - for_each_set_bit(bit, buffer->scan_mask, 567 st->num_channels) { 568 struct iio_chan_spec const *chan = idev->channels + bit; 569 at91_adc_writel(st, AT91_ADC_CHER, ··· 578 at91_adc_writel(st, reg->trigger_register, 579 status & ~value); 580 581 - for_each_set_bit(bit, buffer->scan_mask, 582 st->num_channels) { 583 struct iio_chan_spec const *chan = idev->channels + bit; 584 at91_adc_writel(st, AT91_ADC_CHDR,
··· 544 { 545 struct iio_dev *idev = iio_trigger_get_drvdata(trig); 546 struct at91_adc_state *st = iio_priv(idev); 547 struct at91_adc_reg_desc *reg = st->registers; 548 u32 status = at91_adc_readl(st, reg->trigger_register); 549 int value; ··· 564 at91_adc_writel(st, reg->trigger_register, 565 status | value); 566 567 + for_each_set_bit(bit, idev->active_scan_mask, 568 st->num_channels) { 569 struct iio_chan_spec const *chan = idev->channels + bit; 570 at91_adc_writel(st, AT91_ADC_CHER, ··· 579 at91_adc_writel(st, reg->trigger_register, 580 status & ~value); 581 582 + for_each_set_bit(bit, idev->active_scan_mask, 583 st->num_channels) { 584 struct iio_chan_spec const *chan = idev->channels + bit; 585 at91_adc_writel(st, AT91_ADC_CHDR,
+1 -2
drivers/iio/adc/ti_am335x_adc.c
··· 188 static int tiadc_buffer_postenable(struct iio_dev *indio_dev) 189 { 190 struct tiadc_device *adc_dev = iio_priv(indio_dev); 191 - struct iio_buffer *buffer = indio_dev->buffer; 192 unsigned int enb = 0; 193 u8 bit; 194 195 tiadc_step_config(indio_dev); 196 - for_each_set_bit(bit, buffer->scan_mask, adc_dev->channels) 197 enb |= (get_adc_step_bit(adc_dev, bit) << 1); 198 adc_dev->buffer_en_ch_steps = enb; 199
··· 188 static int tiadc_buffer_postenable(struct iio_dev *indio_dev) 189 { 190 struct tiadc_device *adc_dev = iio_priv(indio_dev); 191 unsigned int enb = 0; 192 u8 bit; 193 194 tiadc_step_config(indio_dev); 195 + for_each_set_bit(bit, indio_dev->active_scan_mask, adc_dev->channels) 196 enb |= (get_adc_step_bit(adc_dev, bit) << 1); 197 adc_dev->buffer_en_ch_steps = enb; 198
+61 -30
drivers/iio/adc/vf610_adc.c
··· 141 struct regulator *vref; 142 struct vf610_adc_feature adc_feature; 143 144 struct completion completion; 145 }; 146 147 #define VF610_ADC_CHAN(_idx, _chan_type) { \ 148 .type = (_chan_type), \ ··· 184 /* sentinel */ 185 }; 186 187 - /* 188 - * ADC sample frequency, unit is ADCK cycles. 189 - * ADC clk source is ipg clock, which is the same as bus clock. 190 - * 191 - * ADC conversion time = SFCAdder + AverageNum x (BCT + LSTAdder) 192 - * SFCAdder: fixed to 6 ADCK cycles 193 - * AverageNum: 1, 4, 8, 16, 32 samples for hardware average. 194 - * BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode 195 - * LSTAdder(Long Sample Time): fixed to 3 ADCK cycles 196 - * 197 - * By default, enable 12 bit resolution mode, clock source 198 - * set to ipg clock, So get below frequency group: 199 - */ 200 - static const u32 vf610_sample_freq_avail[5] = 201 - {1941176, 559332, 286957, 145374, 73171}; 202 203 static inline void vf610_adc_cfg_init(struct vf610_adc *info) 204 { 205 /* set default Configuration for ADC controller */ 206 - info->adc_feature.clk_sel = VF610_ADCIOC_BUSCLK_SET; 207 - info->adc_feature.vol_ref = VF610_ADCIOC_VR_VREF_SET; 208 209 - info->adc_feature.calibration = true; 210 - info->adc_feature.ovwren = true; 211 212 - info->adc_feature.clk_div = 1; 213 - info->adc_feature.res_mode = 12; 214 - info->adc_feature.sample_rate = 1; 215 - info->adc_feature.lpm = true; 216 } 217 218 static void vf610_adc_cfg_post_set(struct vf610_adc *info) ··· 306 307 cfg_data = readl(info->regs + VF610_REG_ADC_CFG); 308 309 - /* low power configuration */ 310 cfg_data &= ~VF610_ADC_ADLPC_EN; 311 if (adc_feature->lpm) 312 cfg_data |= VF610_ADC_ADLPC_EN; 313 314 - /* disable high speed */ 315 cfg_data &= ~VF610_ADC_ADHSC_EN; 316 317 writel(cfg_data, info->regs + VF610_REG_ADC_CFG); ··· 449 return IRQ_HANDLED; 450 } 451 452 - static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("1941176, 559332, 286957, 145374, 73171"); 453 454 static struct attribute *vf610_attributes[] = { 455 - &iio_const_attr_sampling_frequency_available.dev_attr.attr, 456 NULL 457 }; 458 ··· 533 return IIO_VAL_FRACTIONAL_LOG2; 534 535 case IIO_CHAN_INFO_SAMP_FREQ: 536 - *val = vf610_sample_freq_avail[info->adc_feature.sample_rate]; 537 *val2 = 0; 538 return IIO_VAL_INT; 539 ··· 556 switch (mask) { 557 case IIO_CHAN_INFO_SAMP_FREQ: 558 for (i = 0; 559 - i < ARRAY_SIZE(vf610_sample_freq_avail); 560 i++) 561 - if (val == vf610_sample_freq_avail[i]) { 562 info->adc_feature.sample_rate = i; 563 vf610_adc_sample_set(info); 564 return 0;
··· 141 struct regulator *vref; 142 struct vf610_adc_feature adc_feature; 143 144 + u32 sample_freq_avail[5]; 145 + 146 struct completion completion; 147 }; 148 + 149 + static const u32 vf610_hw_avgs[] = { 1, 4, 8, 16, 32 }; 150 151 #define VF610_ADC_CHAN(_idx, _chan_type) { \ 152 .type = (_chan_type), \ ··· 180 /* sentinel */ 181 }; 182 183 + static inline void vf610_adc_calculate_rates(struct vf610_adc *info) 184 + { 185 + unsigned long adck_rate, ipg_rate = clk_get_rate(info->clk); 186 + int i; 187 + 188 + /* 189 + * Calculate ADC sample frequencies 190 + * Sample time unit is ADCK cycles. ADCK clk source is ipg clock, 191 + * which is the same as bus clock. 192 + * 193 + * ADC conversion time = SFCAdder + AverageNum x (BCT + LSTAdder) 194 + * SFCAdder: fixed to 6 ADCK cycles 195 + * AverageNum: 1, 4, 8, 16, 32 samples for hardware average. 196 + * BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode 197 + * LSTAdder(Long Sample Time): fixed to 3 ADCK cycles 198 + */ 199 + adck_rate = ipg_rate / info->adc_feature.clk_div; 200 + for (i = 0; i < ARRAY_SIZE(vf610_hw_avgs); i++) 201 + info->sample_freq_avail[i] = 202 + adck_rate / (6 + vf610_hw_avgs[i] * (25 + 3)); 203 + } 204 205 static inline void vf610_adc_cfg_init(struct vf610_adc *info) 206 { 207 + struct vf610_adc_feature *adc_feature = &info->adc_feature; 208 + 209 /* set default Configuration for ADC controller */ 210 + adc_feature->clk_sel = VF610_ADCIOC_BUSCLK_SET; 211 + adc_feature->vol_ref = VF610_ADCIOC_VR_VREF_SET; 212 213 + adc_feature->calibration = true; 214 + adc_feature->ovwren = true; 215 216 + adc_feature->res_mode = 12; 217 + adc_feature->sample_rate = 1; 218 + adc_feature->lpm = true; 219 + 220 + /* Use a save ADCK which is below 20MHz on all devices */ 221 + adc_feature->clk_div = 8; 222 + 223 + vf610_adc_calculate_rates(info); 224 } 225 226 static void vf610_adc_cfg_post_set(struct vf610_adc *info) ··· 290 291 cfg_data = readl(info->regs + VF610_REG_ADC_CFG); 292 293 cfg_data &= ~VF610_ADC_ADLPC_EN; 294 if (adc_feature->lpm) 295 cfg_data |= VF610_ADC_ADLPC_EN; 296 297 cfg_data &= ~VF610_ADC_ADHSC_EN; 298 299 writel(cfg_data, info->regs + VF610_REG_ADC_CFG); ··· 435 return IRQ_HANDLED; 436 } 437 438 + static ssize_t vf610_show_samp_freq_avail(struct device *dev, 439 + struct device_attribute *attr, char *buf) 440 + { 441 + struct vf610_adc *info = iio_priv(dev_to_iio_dev(dev)); 442 + size_t len = 0; 443 + int i; 444 + 445 + for (i = 0; i < ARRAY_SIZE(info->sample_freq_avail); i++) 446 + len += scnprintf(buf + len, PAGE_SIZE - len, 447 + "%u ", info->sample_freq_avail[i]); 448 + 449 + /* replace trailing space by newline */ 450 + buf[len - 1] = '\n'; 451 + 452 + return len; 453 + } 454 + 455 + static IIO_DEV_ATTR_SAMP_FREQ_AVAIL(vf610_show_samp_freq_avail); 456 457 static struct attribute *vf610_attributes[] = { 458 + &iio_dev_attr_sampling_frequency_available.dev_attr.attr, 459 NULL 460 }; 461 ··· 502 return IIO_VAL_FRACTIONAL_LOG2; 503 504 case IIO_CHAN_INFO_SAMP_FREQ: 505 + *val = info->sample_freq_avail[info->adc_feature.sample_rate]; 506 *val2 = 0; 507 return IIO_VAL_INT; 508 ··· 525 switch (mask) { 526 case IIO_CHAN_INFO_SAMP_FREQ: 527 for (i = 0; 528 + i < ARRAY_SIZE(info->sample_freq_avail); 529 i++) 530 + if (val == info->sample_freq_avail[i]) { 531 info->adc_feature.sample_rate = i; 532 vf610_adc_sample_set(info); 533 return 0;
+1 -1
drivers/iio/gyro/bmg160.c
··· 822 int bit, ret, i = 0; 823 824 mutex_lock(&data->mutex); 825 - for_each_set_bit(bit, indio_dev->buffer->scan_mask, 826 indio_dev->masklength) { 827 ret = i2c_smbus_read_word_data(data->client, 828 BMG160_AXIS_TO_REG(bit));
··· 822 int bit, ret, i = 0; 823 824 mutex_lock(&data->mutex); 825 + for_each_set_bit(bit, indio_dev->active_scan_mask, 826 indio_dev->masklength) { 827 ret = i2c_smbus_read_word_data(data->client, 828 BMG160_AXIS_TO_REG(bit));
+1 -1
drivers/iio/imu/adis_trigger.c
··· 60 iio_trigger_set_drvdata(adis->trig, adis); 61 ret = iio_trigger_register(adis->trig); 62 63 - indio_dev->trig = adis->trig; 64 if (ret) 65 goto error_free_irq; 66
··· 60 iio_trigger_set_drvdata(adis->trig, adis); 61 ret = iio_trigger_register(adis->trig); 62 63 + indio_dev->trig = iio_trigger_get(adis->trig); 64 if (ret) 65 goto error_free_irq; 66
+30 -26
drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
··· 410 } 411 } 412 413 - static int inv_mpu6050_write_fsr(struct inv_mpu6050_state *st, int fsr) 414 { 415 - int result; 416 u8 d; 417 418 - if (fsr < 0 || fsr > INV_MPU6050_MAX_GYRO_FS_PARAM) 419 - return -EINVAL; 420 - if (fsr == st->chip_config.fsr) 421 - return 0; 422 423 - d = (fsr << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); 424 - result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d); 425 - if (result) 426 - return result; 427 - st->chip_config.fsr = fsr; 428 429 - return 0; 430 } 431 432 - static int inv_mpu6050_write_accel_fs(struct inv_mpu6050_state *st, int fs) 433 { 434 - int result; 435 u8 d; 436 437 - if (fs < 0 || fs > INV_MPU6050_MAX_ACCL_FS_PARAM) 438 - return -EINVAL; 439 - if (fs == st->chip_config.accl_fs) 440 - return 0; 441 442 - d = (fs << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 443 - result = inv_mpu6050_write_reg(st, st->reg->accl_config, d); 444 - if (result) 445 - return result; 446 - st->chip_config.accl_fs = fs; 447 448 - return 0; 449 } 450 451 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, ··· 475 case IIO_CHAN_INFO_SCALE: 476 switch (chan->type) { 477 case IIO_ANGL_VEL: 478 - result = inv_mpu6050_write_fsr(st, val); 479 break; 480 case IIO_ACCEL: 481 - result = inv_mpu6050_write_accel_fs(st, val); 482 break; 483 default: 484 result = -EINVAL;
··· 410 } 411 } 412 413 + static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val) 414 { 415 + int result, i; 416 u8 d; 417 418 + for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) { 419 + if (gyro_scale_6050[i] == val) { 420 + d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT); 421 + result = inv_mpu6050_write_reg(st, 422 + st->reg->gyro_config, d); 423 + if (result) 424 + return result; 425 426 + st->chip_config.fsr = i; 427 + return 0; 428 + } 429 + } 430 431 + return -EINVAL; 432 } 433 434 + static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val) 435 { 436 + int result, i; 437 u8 d; 438 439 + for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) { 440 + if (accel_scale[i] == val) { 441 + d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT); 442 + result = inv_mpu6050_write_reg(st, 443 + st->reg->accl_config, d); 444 + if (result) 445 + return result; 446 447 + st->chip_config.accl_fs = i; 448 + return 0; 449 + } 450 + } 451 452 + return -EINVAL; 453 } 454 455 static int inv_mpu6050_write_raw(struct iio_dev *indio_dev, ··· 471 case IIO_CHAN_INFO_SCALE: 472 switch (chan->type) { 473 case IIO_ANGL_VEL: 474 + result = inv_mpu6050_write_gyro_scale(st, val2); 475 break; 476 case IIO_ACCEL: 477 + result = inv_mpu6050_write_accel_scale(st, val2); 478 break; 479 default: 480 result = -EINVAL;
+14 -11
drivers/iio/imu/inv_mpu6050/inv_mpu_ring.c
··· 24 #include <linux/poll.h> 25 #include "inv_mpu_iio.h" 26 27 int inv_reset_fifo(struct iio_dev *indio_dev) 28 { 29 int result; ··· 60 INV_MPU6050_BIT_FIFO_RST); 61 if (result) 62 goto reset_fifo_fail; 63 /* enable interrupt */ 64 if (st->chip_config.accl_fifo_enable || 65 st->chip_config.gyro_fifo_enable) { ··· 95 INV_MPU6050_BIT_DATA_RDY_EN); 96 97 return result; 98 - } 99 - 100 - static void inv_clear_kfifo(struct inv_mpu6050_state *st) 101 - { 102 - unsigned long flags; 103 - 104 - /* take the spin lock sem to avoid interrupt kick in */ 105 - spin_lock_irqsave(&st->time_stamp_lock, flags); 106 - kfifo_reset(&st->timestamps); 107 - spin_unlock_irqrestore(&st->time_stamp_lock, flags); 108 } 109 110 /** ··· 188 flush_fifo: 189 /* Flush HW and SW FIFOs. */ 190 inv_reset_fifo(indio_dev); 191 - inv_clear_kfifo(st); 192 mutex_unlock(&indio_dev->mlock); 193 iio_trigger_notify_done(indio_dev->trig); 194
··· 24 #include <linux/poll.h> 25 #include "inv_mpu_iio.h" 26 27 + static void inv_clear_kfifo(struct inv_mpu6050_state *st) 28 + { 29 + unsigned long flags; 30 + 31 + /* take the spin lock sem to avoid interrupt kick in */ 32 + spin_lock_irqsave(&st->time_stamp_lock, flags); 33 + kfifo_reset(&st->timestamps); 34 + spin_unlock_irqrestore(&st->time_stamp_lock, flags); 35 + } 36 + 37 int inv_reset_fifo(struct iio_dev *indio_dev) 38 { 39 int result; ··· 50 INV_MPU6050_BIT_FIFO_RST); 51 if (result) 52 goto reset_fifo_fail; 53 + 54 + /* clear timestamps fifo */ 55 + inv_clear_kfifo(st); 56 + 57 /* enable interrupt */ 58 if (st->chip_config.accl_fifo_enable || 59 st->chip_config.gyro_fifo_enable) { ··· 81 INV_MPU6050_BIT_DATA_RDY_EN); 82 83 return result; 84 } 85 86 /** ··· 184 flush_fifo: 185 /* Flush HW and SW FIFOs. */ 186 inv_reset_fifo(indio_dev); 187 mutex_unlock(&indio_dev->mlock); 188 iio_trigger_notify_done(indio_dev->trig); 189
+1 -1
drivers/iio/imu/kmx61.c
··· 1227 base = KMX61_MAG_XOUT_L; 1228 1229 mutex_lock(&data->lock); 1230 - for_each_set_bit(bit, indio_dev->buffer->scan_mask, 1231 indio_dev->masklength) { 1232 ret = kmx61_read_measurement(data, base, bit); 1233 if (ret < 0) {
··· 1227 base = KMX61_MAG_XOUT_L; 1228 1229 mutex_lock(&data->lock); 1230 + for_each_set_bit(bit, indio_dev->active_scan_mask, 1231 indio_dev->masklength) { 1232 ret = kmx61_read_measurement(data, base, bit); 1233 if (ret < 0) {
+3 -2
drivers/iio/industrialio-core.c
··· 847 * @attr_list: List of IIO device attributes 848 * 849 * This function frees the memory allocated for each of the IIO device 850 - * attributes in the list. Note: if you want to reuse the list after calling 851 - * this function you have to reinitialize it using INIT_LIST_HEAD(). 852 */ 853 void iio_free_chan_devattr_list(struct list_head *attr_list) 854 { ··· 855 856 list_for_each_entry_safe(p, n, attr_list, l) { 857 kfree(p->dev_attr.attr.name); 858 kfree(p); 859 } 860 } ··· 936 937 iio_free_chan_devattr_list(&indio_dev->channel_attr_list); 938 kfree(indio_dev->chan_attr_group.attrs); 939 } 940 941 static void iio_dev_release(struct device *device)
··· 847 * @attr_list: List of IIO device attributes 848 * 849 * This function frees the memory allocated for each of the IIO device 850 + * attributes in the list. 851 */ 852 void iio_free_chan_devattr_list(struct list_head *attr_list) 853 { ··· 856 857 list_for_each_entry_safe(p, n, attr_list, l) { 858 kfree(p->dev_attr.attr.name); 859 + list_del(&p->l); 860 kfree(p); 861 } 862 } ··· 936 937 iio_free_chan_devattr_list(&indio_dev->channel_attr_list); 938 kfree(indio_dev->chan_attr_group.attrs); 939 + indio_dev->chan_attr_group.attrs = NULL; 940 } 941 942 static void iio_dev_release(struct device *device)
+1
drivers/iio/industrialio-event.c
··· 500 error_free_setup_event_lines: 501 iio_free_chan_devattr_list(&indio_dev->event_interface->dev_attr_list); 502 kfree(indio_dev->event_interface); 503 return ret; 504 } 505
··· 500 error_free_setup_event_lines: 501 iio_free_chan_devattr_list(&indio_dev->event_interface->dev_attr_list); 502 kfree(indio_dev->event_interface); 503 + indio_dev->event_interface = NULL; 504 return ret; 505 } 506
+1 -1
drivers/iio/proximity/sx9500.c
··· 494 495 mutex_lock(&data->mutex); 496 497 - for_each_set_bit(bit, indio_dev->buffer->scan_mask, 498 indio_dev->masklength) { 499 ret = sx9500_read_proximity(data, &indio_dev->channels[bit], 500 &val);
··· 494 495 mutex_lock(&data->mutex); 496 497 + for_each_set_bit(bit, indio_dev->active_scan_mask, 498 indio_dev->masklength) { 499 ret = sx9500_read_proximity(data, &indio_dev->channels[bit], 500 &val);
+1
drivers/staging/iio/Kconfig
··· 38 config IIO_SIMPLE_DUMMY_BUFFER 39 bool "Buffered capture support" 40 select IIO_BUFFER 41 select IIO_KFIFO_BUF 42 help 43 Add buffered data capture to the simple dummy driver.
··· 38 config IIO_SIMPLE_DUMMY_BUFFER 39 bool "Buffered capture support" 40 select IIO_BUFFER 41 + select IIO_TRIGGER 42 select IIO_KFIFO_BUF 43 help 44 Add buffered data capture to the simple dummy driver.
+1
drivers/staging/iio/magnetometer/hmc5843_core.c
··· 592 mutex_init(&data->lock); 593 594 indio_dev->dev.parent = dev; 595 indio_dev->info = &hmc5843_info; 596 indio_dev->modes = INDIO_DIRECT_MODE; 597 indio_dev->channels = data->variant->channels;
··· 592 mutex_init(&data->lock); 593 594 indio_dev->dev.parent = dev; 595 + indio_dev->name = dev->driver->name; 596 indio_dev->info = &hmc5843_info; 597 indio_dev->modes = INDIO_DIRECT_MODE; 598 indio_dev->channels = data->variant->channels;