xtensa: fsf: drop nonexistent GPIO32 support

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

The toolchain for xtensa FSF core never supported GPIO32, drop it on the
linux side too.

Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>

Max Filippov 12 years ago 8e9356c6 e9d6dca5

+2 -8

2 changed files

expand all

arch

xtensa

Kconfig

variants

fsf

include

variant

tie.h

-1

arch/xtensa/Kconfig

··· 80 80 config XTENSA_VARIANT_FSF 81 81 bool "fsf - default (not generic) configuration" 82 82 select MMU 83 - select HAVE_XTENSA_GPIO32 84 83 85 84 config XTENSA_VARIANT_DC232B 86 85 bool "dc232b - Diamond 232L Standard Core Rev.B (LE)"

+2 -7

arch/xtensa/variants/fsf/include/variant/tie.h

··· 18 18 #define XCHAL_CP_MASK 0x00 /* bitmask of all CPs by ID */ 19 19 #define XCHAL_CP_PORT_MASK 0x00 /* bitmask of only port CPs */ 20 20 21 - /* Basic parameters of each coprocessor: */ 22 - #define XCHAL_CP7_NAME "XTIOP" 23 - #define XCHAL_CP7_IDENT XTIOP 24 - #define XCHAL_CP7_SA_SIZE 0 /* size of state save area */ 25 - #define XCHAL_CP7_SA_ALIGN 1 /* min alignment of save area */ 26 - #define XCHAL_CP_ID_XTIOP 7 /* coprocessor ID (0..7) */ 27 - 28 21 /* Filler info for unassigned coprocessors, to simplify arrays etc: */ 29 22 #define XCHAL_NCP_SA_SIZE 0 30 23 #define XCHAL_NCP_SA_ALIGN 1 ··· 35 42 #define XCHAL_CP5_SA_ALIGN 1 36 43 #define XCHAL_CP6_SA_SIZE 0 37 44 #define XCHAL_CP6_SA_ALIGN 1 45 + #define XCHAL_CP7_SA_SIZE 0 46 + #define XCHAL_CP7_SA_ALIGN 1 38 47 39 48 /* Save area for non-coprocessor optional and custom (TIE) state: */ 40 49 #define XCHAL_NCP_SA_SIZE 0