Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

net: dsa: mediatek: add adjust link support for user ports

Manually adjust the port settings of user ports once PHY polling has
completed. This patch extends the adjust_link callback to configure the
per port PMCR register, applying the proper values polled from the PHY.
Without this patch flow control was not always getting setup properly.

Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkavalli@openmesh.com>
Signed-off-by: Muciri Gatimu <muciri@openmesh.com>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

John Crispin and committed by
David S. Miller
8e6f1521 e718fe45

+39
+38
drivers/net/dsa/mt7530.c
··· 625 625 * all finished. 626 626 */ 627 627 mt7623_pad_clk_setup(ds); 628 + } else { 629 + u16 lcl_adv = 0, rmt_adv = 0; 630 + u8 flowctrl; 631 + u32 mcr = PMCR_USERP_LINK | PMCR_FORCE_MODE; 632 + 633 + switch (phydev->speed) { 634 + case SPEED_1000: 635 + mcr |= PMCR_FORCE_SPEED_1000; 636 + break; 637 + case SPEED_100: 638 + mcr |= PMCR_FORCE_SPEED_100; 639 + break; 640 + }; 641 + 642 + if (phydev->link) 643 + mcr |= PMCR_FORCE_LNK; 644 + 645 + if (phydev->duplex) { 646 + mcr |= PMCR_FORCE_FDX; 647 + 648 + if (phydev->pause) 649 + rmt_adv = LPA_PAUSE_CAP; 650 + if (phydev->asym_pause) 651 + rmt_adv |= LPA_PAUSE_ASYM; 652 + 653 + if (phydev->advertising & ADVERTISED_Pause) 654 + lcl_adv |= ADVERTISE_PAUSE_CAP; 655 + if (phydev->advertising & ADVERTISED_Asym_Pause) 656 + lcl_adv |= ADVERTISE_PAUSE_ASYM; 657 + 658 + flowctrl = mii_resolve_flowctrl_fdx(lcl_adv, rmt_adv); 659 + 660 + if (flowctrl & FLOW_CTRL_TX) 661 + mcr |= PMCR_TX_FC_EN; 662 + if (flowctrl & FLOW_CTRL_RX) 663 + mcr |= PMCR_RX_FC_EN; 664 + } 665 + mt7530_write(priv, MT7530_PMCR_P(port), mcr); 628 666 } 629 667 } 630 668
+1
drivers/net/dsa/mt7530.h
··· 151 151 #define PMCR_TX_FC_EN BIT(5) 152 152 #define PMCR_RX_FC_EN BIT(4) 153 153 #define PMCR_FORCE_SPEED_1000 BIT(3) 154 + #define PMCR_FORCE_SPEED_100 BIT(2) 154 155 #define PMCR_FORCE_FDX BIT(1) 155 156 #define PMCR_FORCE_LNK BIT(0) 156 157 #define PMCR_COMMON_LINK (PMCR_IFG_XMIT(1) | PMCR_MAC_MODE | \