Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

platform/mellanox: mlxbf-pmc: Add support for clock_measure performance block

The HW clock_measure counter info is passed to the driver from ACPI.
Create a new sub-directory for clock_measure events and provide
read access to the user. Writes are blocked since the fields are RO.

Signed-off-by: Shravan Kumar Ramani <shravankr@nvidia.com>
Reviewed-by: David Thompson <davthompson@nvidia.com>
Reviewed-by: Vadim Pasternak <vadimp@nvidia.com>
Link: https://lore.kernel.org/r/6ea0699497479dfde0a52fcb28aef55aee1bbc0b.1736413033.git.shravankr@nvidia.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>

authored by

Shravan Kumar Ramani and committed by
Ilpo Järvinen
8e3b3e16 5efc8009

+42 -4
+42 -4
drivers/platform/mellanox/mlxbf-pmc.c
··· 862 862 {75, "HISTOGRAM_HISTOGRAM_BIN9"}, 863 863 }; 864 864 865 + static const struct mlxbf_pmc_events mlxbf_pmc_clock_events[] = { 866 + { 0x0, "FMON_CLK_LAST_COUNT_PLL_D1_INST0" }, 867 + { 0x4, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST0" }, 868 + { 0x8, "FMON_CLK_LAST_COUNT_PLL_D1_INST1" }, 869 + { 0xc, "REFERENCE_WINDOW_WIDTH_PLL_D1_INST1" }, 870 + { 0x10, "FMON_CLK_LAST_COUNT_PLL_G1" }, 871 + { 0x14, "REFERENCE_WINDOW_WIDTH_PLL_G1" }, 872 + { 0x18, "FMON_CLK_LAST_COUNT_PLL_W1" }, 873 + { 0x1c, "REFERENCE_WINDOW_WIDTH_PLL_W1" }, 874 + { 0x20, "FMON_CLK_LAST_COUNT_PLL_T1" }, 875 + { 0x24, "REFERENCE_WINDOW_WIDTH_PLL_T1" }, 876 + { 0x28, "FMON_CLK_LAST_COUNT_PLL_A0" }, 877 + { 0x2c, "REFERENCE_WINDOW_WIDTH_PLL_A0" }, 878 + { 0x30, "FMON_CLK_LAST_COUNT_PLL_C0" }, 879 + { 0x34, "REFERENCE_WINDOW_WIDTH_PLL_C0" }, 880 + { 0x38, "FMON_CLK_LAST_COUNT_PLL_N1" }, 881 + { 0x3c, "REFERENCE_WINDOW_WIDTH_PLL_N1" }, 882 + { 0x40, "FMON_CLK_LAST_COUNT_PLL_I1" }, 883 + { 0x44, "REFERENCE_WINDOW_WIDTH_PLL_I1" }, 884 + { 0x48, "FMON_CLK_LAST_COUNT_PLL_R1" }, 885 + { 0x4c, "REFERENCE_WINDOW_WIDTH_PLL_R1" }, 886 + { 0x50, "FMON_CLK_LAST_COUNT_PLL_P1" }, 887 + { 0x54, "REFERENCE_WINDOW_WIDTH_PLL_P1" }, 888 + { 0x58, "FMON_CLK_LAST_COUNT_REF_100_INST0" }, 889 + { 0x5c, "REFERENCE_WINDOW_WIDTH_REF_100_INST0" }, 890 + { 0x60, "FMON_CLK_LAST_COUNT_REF_100_INST1" }, 891 + { 0x64, "REFERENCE_WINDOW_WIDTH_REF_100_INST1" }, 892 + { 0x68, "FMON_CLK_LAST_COUNT_REF_156" }, 893 + { 0x6c, "REFERENCE_WINDOW_WIDTH_REF_156" }, 894 + }; 895 + 865 896 static struct mlxbf_pmc_context *pmc; 866 897 867 898 /* UUID used to probe ATF service. */ ··· 1066 1035 } else if (strstr(blk, "llt")) { 1067 1036 events = mlxbf_pmc_llt_events; 1068 1037 size = ARRAY_SIZE(mlxbf_pmc_llt_events); 1038 + } else if (strstr(blk, "clock_measure")) { 1039 + events = mlxbf_pmc_clock_events; 1040 + size = ARRAY_SIZE(mlxbf_pmc_clock_events); 1069 1041 } else { 1070 1042 events = NULL; 1071 1043 size = 0; ··· 1503 1469 /* Method to read a register */ 1504 1470 static int mlxbf_pmc_read_reg(unsigned int blk_num, u32 offset, u64 *result) 1505 1471 { 1506 - u32 ecc_out; 1472 + u32 reg; 1507 1473 1508 - if (strstr(pmc->block_name[blk_num], "ecc")) { 1474 + if ((strstr(pmc->block_name[blk_num], "ecc")) || 1475 + (strstr(pmc->block_name[blk_num], "clock_measure"))) { 1509 1476 if (mlxbf_pmc_readl(pmc->block[blk_num].mmio_base + offset, 1510 - &ecc_out)) 1477 + &reg)) 1511 1478 return -EFAULT; 1512 1479 1513 - *result = ecc_out; 1480 + *result = reg; 1514 1481 return 0; 1515 1482 } 1516 1483 ··· 1525 1490 /* Method to write to a register */ 1526 1491 static int mlxbf_pmc_write_reg(unsigned int blk_num, u32 offset, u64 data) 1527 1492 { 1493 + if (strstr(pmc->block_name[blk_num], "clock_measure")) 1494 + return -EINVAL; 1495 + 1528 1496 if (strstr(pmc->block_name[blk_num], "ecc")) { 1529 1497 return mlxbf_pmc_write(pmc->block[blk_num].mmio_base + offset, 1530 1498 MLXBF_PMC_WRITE_REG_32, data);