Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branches 'ib-mfd-clk-gpio-power-regulator-rtc-5.3', 'ib-mfd-clk-regulator-rtc-5.3', 'ib-mfd-cros-5.3' and 'ib-mfd-regulator-5.3' into ibs-for-mfd-merged

+4109 -787
+36
Documentation/devicetree/bindings/mfd/lp87565.txt
··· 41 41 }; 42 42 }; 43 43 }; 44 + 45 + TI LP87561 PMIC: 46 + 47 + This is a single output 4-phase regulator configuration 48 + 49 + Required properties: 50 + - compatible: "ti,lp87561-q1" 51 + - reg: I2C slave address. 52 + - gpio-controller: Marks the device node as a GPIO Controller. 53 + - #gpio-cells: Should be two. The first cell is the pin number and 54 + the second cell is used to specify flags. 55 + See ../gpio/gpio.txt for more information. 56 + - xxx-in-supply: Phandle to parent supply node of each regulator 57 + populated under regulators node. xxx should match 58 + the supply_name populated in driver. 59 + Example: 60 + 61 + lp87561_pmic: pmic@62 { 62 + compatible = "ti,lp87561-q1"; 63 + reg = <0x62>; 64 + gpio-controller; 65 + #gpio-cells = <2>; 66 + 67 + buck3210-in-supply = <&vsys_3v3>; 68 + 69 + regulators: regulators { 70 + buck3210_reg: buck3210 { 71 + /* VDD_CORE */ 72 + regulator-name = "buck3210"; 73 + regulator-min-microvolt = <800000>; 74 + regulator-max-microvolt = <800000>; 75 + regulator-always-on; 76 + regulator-boot-on; 77 + }; 78 + }; 79 + };
+44
Documentation/devicetree/bindings/mfd/rk808.txt
··· 3 3 The rk8xx family current members: 4 4 rk805 5 5 rk808 6 + rk809 7 + rk817 6 8 rk818 7 9 8 10 Required properties: 9 11 - compatible: "rockchip,rk805" 10 12 - compatible: "rockchip,rk808" 13 + - compatible: "rockchip,rk809" 14 + - compatible: "rockchip,rk817" 11 15 - compatible: "rockchip,rk818" 12 16 - reg: I2C slave address 13 17 - interrupts: the interrupt outputs of the controller. ··· 48 44 for 2 host gpio's used for dvs. The format of the gpio specifier depends in 49 45 the gpio controller. If DVS GPIOs aren't present, voltage changes will happen 50 46 very quickly with no slow ramp time. 47 + 48 + Optional shared RK809 and RK817 properties: 49 + - vcc1-supply: The input supply for DCDC_REG1 50 + - vcc2-supply: The input supply for DCDC_REG2 51 + - vcc3-supply: The input supply for DCDC_REG3 52 + - vcc4-supply: The input supply for DCDC_REG4 53 + - vcc5-supply: The input supply for LDO_REG1, LDO_REG2, LDO_REG3 54 + - vcc6-supply: The input supply for LDO_REG4, LDO_REG5, LDO_REG6 55 + - vcc7-supply: The input supply for LDO_REG7, LDO_REG8, LDO_REG9 56 + 57 + Optional RK809 properties: 58 + - vcc8-supply: The input supply for SWITCH_REG1 59 + - vcc9-supply: The input supply for DCDC_REG5, SWITCH_REG2 60 + 61 + Optional RK817 properties: 62 + - vcc8-supply: The input supply for BOOST 63 + - vcc9-supply: The input supply for OTG_SWITCH 51 64 52 65 Optional RK818 properties: 53 66 - vcc1-supply: The input supply for DCDC_REG1 ··· 107 86 - SWITCH_REGn 108 87 - valid values for n are 1 to 2 109 88 89 + Following regulators of the RK809 and RK817 PMIC blocks are supported. Note that 90 + the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO 91 + number as described in RK809 and RK817 datasheets. 92 + 93 + - DCDC_REGn 94 + - valid values for n are 1 to 5 for RK809. 95 + - valid values for n are 1 to 4 for RK817. 96 + - LDO_REGn 97 + - valid values for n are 1 to 9 for RK809. 98 + - valid values for n are 1 to 9 for RK817. 99 + - SWITCH_REGn 100 + - valid values for n are 1 to 2 for RK809. 101 + - BOOST for RK817 102 + - OTG_SWITCH for RK817 103 + 110 104 Following regulators of the RK818 PMIC block are supported. Note that 111 105 the 'n' in regulator name, as in DCDC_REGn or LDOn, represents the DCDC or LDO 112 106 number as described in RK818 datasheet. ··· 133 97 - SWITCH_REG 134 98 - HDMI_SWITCH 135 99 - OTG_SWITCH 100 + 101 + It is necessary to configure three pins for both the RK809 and RK817, the three 102 + pins are "gpio_ts" "gpio_gt" "gpio_slp". 103 + The gpio_gt and gpio_ts pins support the gpio function. 104 + The gpio_slp pin is for controlling the pmic states, as below: 105 + - reset 106 + - power down 107 + - sleep 136 108 137 109 Standard regulator bindings are used inside regulator subnodes. Check 138 110 Documentation/devicetree/bindings/regulator/regulator.txt
+4 -5
drivers/clk/Kconfig
··· 53 53 This driver supports Maxim 9485 Programmable Audio Clock Generator 54 54 55 55 config COMMON_CLK_RK808 56 - tristate "Clock driver for RK805/RK808/RK818" 56 + tristate "Clock driver for RK805/RK808/RK809/RK817/RK818" 57 57 depends on MFD_RK808 58 58 ---help--- 59 - This driver supports RK805, RK808 and RK818 crystal oscillator clock. These 60 - multi-function devices have two fixed-rate oscillators, 61 - clocked at 32KHz each. Clkout1 is always on, Clkout2 can off 62 - by control register. 59 + This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock. 60 + These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each. 61 + Clkout1 is always on, Clkout2 can off by control register. 63 62 64 63 config COMMON_CLK_HI655X 65 64 tristate "Clock driver for Hi655x" if EXPERT
+63 -1
drivers/clk/clk-rk808.c
··· 96 96 return idx ? &rk808_clkout->clkout2_hw : &rk808_clkout->clkout1_hw; 97 97 } 98 98 99 + static int rk817_clkout2_enable(struct clk_hw *hw, bool enable) 100 + { 101 + struct rk808_clkout *rk808_clkout = container_of(hw, 102 + struct rk808_clkout, 103 + clkout2_hw); 104 + struct rk808 *rk808 = rk808_clkout->rk808; 105 + 106 + return regmap_update_bits(rk808->regmap, RK817_SYS_CFG(1), 107 + RK817_CLK32KOUT2_EN, 108 + enable ? RK817_CLK32KOUT2_EN : 0); 109 + } 110 + 111 + static int rk817_clkout2_prepare(struct clk_hw *hw) 112 + { 113 + return rk817_clkout2_enable(hw, true); 114 + } 115 + 116 + static void rk817_clkout2_unprepare(struct clk_hw *hw) 117 + { 118 + rk817_clkout2_enable(hw, false); 119 + } 120 + 121 + static int rk817_clkout2_is_prepared(struct clk_hw *hw) 122 + { 123 + struct rk808_clkout *rk808_clkout = container_of(hw, 124 + struct rk808_clkout, 125 + clkout2_hw); 126 + struct rk808 *rk808 = rk808_clkout->rk808; 127 + unsigned int val; 128 + 129 + int ret = regmap_read(rk808->regmap, RK817_SYS_CFG(1), &val); 130 + 131 + if (ret < 0) 132 + return 0; 133 + 134 + return (val & RK817_CLK32KOUT2_EN) ? 1 : 0; 135 + } 136 + 137 + static const struct clk_ops rk817_clkout2_ops = { 138 + .prepare = rk817_clkout2_prepare, 139 + .unprepare = rk817_clkout2_unprepare, 140 + .is_prepared = rk817_clkout2_is_prepared, 141 + .recalc_rate = rk808_clkout_recalc_rate, 142 + }; 143 + 144 + static const struct clk_ops *rkpmic_get_ops(long variant) 145 + { 146 + switch (variant) { 147 + case RK809_ID: 148 + case RK817_ID: 149 + return &rk817_clkout2_ops; 150 + /* 151 + * For the default case, it match the following PMIC type. 152 + * RK805_ID 153 + * RK808_ID 154 + * RK818_ID 155 + */ 156 + default: 157 + return &rk808_clkout2_ops; 158 + } 159 + } 160 + 99 161 static int rk808_clkout_probe(struct platform_device *pdev) 100 162 { 101 163 struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); ··· 189 127 return ret; 190 128 191 129 init.name = "rk808-clkout2"; 192 - init.ops = &rk808_clkout2_ops; 130 + init.ops = rkpmic_get_ops(rk808->variant); 193 131 rk808_clkout->clkout2_hw.init = &init; 194 132 195 133 /* optional override of the clockname */
+3 -3
drivers/mfd/Kconfig
··· 1030 1030 different functionality of the device. 1031 1031 1032 1032 config MFD_RK808 1033 - tristate "Rockchip RK805/RK808/RK818 Power Management Chip" 1033 + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power Management Chip" 1034 1034 depends on I2C && OF 1035 1035 select MFD_CORE 1036 1036 select REGMAP_I2C 1037 1037 select REGMAP_IRQ 1038 1038 help 1039 - If you say yes here you get support for the RK805, RK808 and RK818 1040 - Power Management chips. 1039 + If you say yes here you get support for the RK805, RK808, RK809, 1040 + RK817 and RK818 Power Management chips. 1041 1041 This driver provides common support for accessing the device 1042 1042 through I2C interface. The device supports multiple sub-devices 1043 1043 including interrupts, RTC, LDO & DCDC regulators, and onkey.
+4
drivers/mfd/lp87565.c
··· 33 33 .compatible = "ti,lp87565-q1", 34 34 .data = (void *)LP87565_DEVICE_TYPE_LP87565_Q1, 35 35 }, 36 + { 37 + .compatible = "ti,lp87561-q1", 38 + .data = (void *)LP87565_DEVICE_TYPE_LP87561_Q1, 39 + }, 36 40 {} 37 41 }; 38 42 MODULE_DEVICE_TABLE(of, of_lp87565_match_table);
+189 -3
drivers/mfd/rk808.c
··· 27 27 #include <linux/module.h> 28 28 #include <linux/of_device.h> 29 29 #include <linux/regmap.h> 30 + #include <linux/syscore_ops.h> 30 31 31 32 struct rk808_reg_data { 32 33 int addr; ··· 63 62 return false; 64 63 } 65 64 65 + static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg) 66 + { 67 + /* 68 + * Notes: 69 + * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but 70 + * we don't use that feature. It's better to cache. 71 + */ 72 + 73 + switch (reg) { 74 + case RK817_SECONDS_REG ... RK817_WEEKS_REG: 75 + case RK817_RTC_STATUS_REG: 76 + case RK817_INT_STS_REG0: 77 + case RK817_INT_STS_REG1: 78 + case RK817_INT_STS_REG2: 79 + case RK817_SYS_STS: 80 + return true; 81 + } 82 + 83 + return true; 84 + } 85 + 66 86 static const struct regmap_config rk818_regmap_config = { 67 87 .reg_bits = 8, 68 88 .val_bits = 8, ··· 108 86 .volatile_reg = rk808_is_volatile_reg, 109 87 }; 110 88 89 + static const struct regmap_config rk817_regmap_config = { 90 + .reg_bits = 8, 91 + .val_bits = 8, 92 + .max_register = RK817_GPIO_INT_CFG, 93 + .cache_type = REGCACHE_NONE, 94 + .volatile_reg = rk817_is_volatile_reg, 95 + }; 96 + 111 97 static struct resource rtc_resources[] = { 112 98 { 113 99 .start = RK808_IRQ_RTC_ALARM, 114 100 .end = RK808_IRQ_RTC_ALARM, 115 101 .flags = IORESOURCE_IRQ, 116 102 } 103 + }; 104 + 105 + static struct resource rk817_rtc_resources[] = { 106 + DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM), 117 107 }; 118 108 119 109 static struct resource rk805_key_resources[] = { ··· 139 105 .end = RK805_IRQ_PWRON_RISE, 140 106 .flags = IORESOURCE_IRQ, 141 107 } 108 + }; 109 + 110 + static struct resource rk817_pwrkey_resources[] = { 111 + DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE), 112 + DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL), 142 113 }; 143 114 144 115 static const struct mfd_cell rk805s[] = { ··· 168 129 .name = "rk808-rtc", 169 130 .num_resources = ARRAY_SIZE(rtc_resources), 170 131 .resources = rtc_resources, 132 + }, 133 + }; 134 + 135 + static const struct mfd_cell rk817s[] = { 136 + { .name = "rk808-clkout",}, 137 + { .name = "rk808-regulator",}, 138 + { 139 + .name = "rk8xx-pwrkey", 140 + .num_resources = ARRAY_SIZE(rk817_pwrkey_resources), 141 + .resources = &rk817_pwrkey_resources[0], 142 + }, 143 + { 144 + .name = "rk808-rtc", 145 + .num_resources = ARRAY_SIZE(rk817_rtc_resources), 146 + .resources = &rk817_rtc_resources[0], 171 147 }, 172 148 }; 173 149 ··· 219 165 { RK808_DCDC_UV_ACT_REG, BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE}, 220 166 { RK808_VB_MON_REG, MASK_ALL, VB_LO_ACT | 221 167 VB_LO_SEL_3500MV }, 168 + }; 169 + 170 + static const struct rk808_reg_data rk817_pre_init_reg[] = { 171 + {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP}, 172 + {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_H}, 173 + {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK, 174 + RK817_HOTDIE_105 | RK817_TSD_140}, 222 175 }; 223 176 224 177 static const struct rk808_reg_data rk818_pre_init_reg[] = { ··· 393 332 }, 394 333 }; 395 334 335 + static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = { 336 + REGMAP_IRQ_REG_LINE(0, 8), 337 + REGMAP_IRQ_REG_LINE(1, 8), 338 + REGMAP_IRQ_REG_LINE(2, 8), 339 + REGMAP_IRQ_REG_LINE(3, 8), 340 + REGMAP_IRQ_REG_LINE(4, 8), 341 + REGMAP_IRQ_REG_LINE(5, 8), 342 + REGMAP_IRQ_REG_LINE(6, 8), 343 + REGMAP_IRQ_REG_LINE(7, 8), 344 + REGMAP_IRQ_REG_LINE(8, 8), 345 + REGMAP_IRQ_REG_LINE(9, 8), 346 + REGMAP_IRQ_REG_LINE(10, 8), 347 + REGMAP_IRQ_REG_LINE(11, 8), 348 + REGMAP_IRQ_REG_LINE(12, 8), 349 + REGMAP_IRQ_REG_LINE(13, 8), 350 + REGMAP_IRQ_REG_LINE(14, 8), 351 + REGMAP_IRQ_REG_LINE(15, 8), 352 + REGMAP_IRQ_REG_LINE(16, 8), 353 + REGMAP_IRQ_REG_LINE(17, 8), 354 + REGMAP_IRQ_REG_LINE(18, 8), 355 + REGMAP_IRQ_REG_LINE(19, 8), 356 + REGMAP_IRQ_REG_LINE(20, 8), 357 + REGMAP_IRQ_REG_LINE(21, 8), 358 + REGMAP_IRQ_REG_LINE(22, 8), 359 + REGMAP_IRQ_REG_LINE(23, 8) 360 + }; 361 + 396 362 static struct regmap_irq_chip rk805_irq_chip = { 397 363 .name = "rk805", 398 364 .irqs = rk805_irqs, ··· 440 352 .status_base = RK808_INT_STS_REG1, 441 353 .mask_base = RK808_INT_STS_MSK_REG1, 442 354 .ack_base = RK808_INT_STS_REG1, 355 + .init_ack_masked = true, 356 + }; 357 + 358 + static struct regmap_irq_chip rk817_irq_chip = { 359 + .name = "rk817", 360 + .irqs = rk817_irqs, 361 + .num_irqs = ARRAY_SIZE(rk817_irqs), 362 + .num_regs = 3, 363 + .irq_reg_stride = 2, 364 + .status_base = RK817_INT_STS_REG0, 365 + .mask_base = RK817_INT_STS_MSK_REG0, 366 + .ack_base = RK817_INT_STS_REG0, 443 367 .init_ack_masked = true, 444 368 }; 445 369 ··· 523 423 dev_err(&rk808_i2c_client->dev, "power off error!\n"); 524 424 } 525 425 426 + static void rk8xx_syscore_shutdown(void) 427 + { 428 + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); 429 + int ret; 430 + 431 + if (system_state == SYSTEM_POWER_OFF && 432 + (rk808->variant == RK809_ID || rk808->variant == RK817_ID)) { 433 + ret = regmap_update_bits(rk808->regmap, 434 + RK817_SYS_CFG(3), 435 + RK817_SLPPIN_FUNC_MSK, 436 + SLPPIN_DN_FUN); 437 + if (ret) { 438 + dev_warn(&rk808_i2c_client->dev, 439 + "Cannot switch to power down function\n"); 440 + } 441 + } 442 + } 443 + 444 + static struct syscore_ops rk808_syscore_ops = { 445 + .shutdown = rk8xx_syscore_shutdown, 446 + }; 447 + 526 448 static const struct of_device_id rk808_of_match[] = { 527 449 { .compatible = "rockchip,rk805" }, 528 450 { .compatible = "rockchip,rk808" }, 451 + { .compatible = "rockchip,rk809" }, 452 + { .compatible = "rockchip,rk817" }, 529 453 { .compatible = "rockchip,rk818" }, 530 454 { }, 531 455 }; ··· 562 438 struct rk808 *rk808; 563 439 const struct rk808_reg_data *pre_init_reg; 564 440 const struct mfd_cell *cells; 565 - void (*pm_pwroff_fn)(void); 441 + void (*pm_pwroff_fn)(void) = NULL; 566 442 int nr_pre_init_regs; 567 443 int nr_cells; 568 444 int pm_off = 0, msb, lsb; 445 + unsigned char pmic_id_msb, pmic_id_lsb; 569 446 int ret; 570 447 int i; 571 448 ··· 574 449 if (!rk808) 575 450 return -ENOMEM; 576 451 452 + if (of_device_is_compatible(np, "rockchip,rk817") || 453 + of_device_is_compatible(np, "rockchip,rk809")) { 454 + pmic_id_msb = RK817_ID_MSB; 455 + pmic_id_lsb = RK817_ID_LSB; 456 + } else { 457 + pmic_id_msb = RK808_ID_MSB; 458 + pmic_id_lsb = RK808_ID_LSB; 459 + } 460 + 577 461 /* Read chip variant */ 578 - msb = i2c_smbus_read_byte_data(client, RK808_ID_MSB); 462 + msb = i2c_smbus_read_byte_data(client, pmic_id_msb); 579 463 if (msb < 0) { 580 464 dev_err(&client->dev, "failed to read the chip id at 0x%x\n", 581 465 RK808_ID_MSB); 582 466 return msb; 583 467 } 584 468 585 - lsb = i2c_smbus_read_byte_data(client, RK808_ID_LSB); 469 + lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb); 586 470 if (lsb < 0) { 587 471 dev_err(&client->dev, "failed to read the chip id at 0x%x\n", 588 472 RK808_ID_LSB); ··· 628 494 cells = rk818s; 629 495 nr_cells = ARRAY_SIZE(rk818s); 630 496 pm_pwroff_fn = rk818_device_shutdown; 497 + break; 498 + case RK809_ID: 499 + case RK817_ID: 500 + rk808->regmap_cfg = &rk817_regmap_config; 501 + rk808->regmap_irq_chip = &rk817_irq_chip; 502 + pre_init_reg = rk817_pre_init_reg; 503 + nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg); 504 + cells = rk817s; 505 + nr_cells = ARRAY_SIZE(rk817s); 506 + register_syscore_ops(&rk808_syscore_ops); 631 507 break; 632 508 default: 633 509 dev_err(&client->dev, "Unsupported RK8XX ID %lu\n", ··· 712 568 return 0; 713 569 } 714 570 571 + static int rk8xx_suspend(struct device *dev) 572 + { 573 + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); 574 + int ret = 0; 575 + 576 + switch (rk808->variant) { 577 + case RK809_ID: 578 + case RK817_ID: 579 + ret = regmap_update_bits(rk808->regmap, 580 + RK817_SYS_CFG(3), 581 + RK817_SLPPIN_FUNC_MSK, 582 + SLPPIN_SLP_FUN); 583 + break; 584 + default: 585 + break; 586 + } 587 + 588 + return ret; 589 + } 590 + 591 + static int rk8xx_resume(struct device *dev) 592 + { 593 + struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client); 594 + int ret = 0; 595 + 596 + switch (rk808->variant) { 597 + case RK809_ID: 598 + case RK817_ID: 599 + ret = regmap_update_bits(rk808->regmap, 600 + RK817_SYS_CFG(3), 601 + RK817_SLPPIN_FUNC_MSK, 602 + SLPPIN_NULL_FUN); 603 + break; 604 + default: 605 + break; 606 + } 607 + 608 + return ret; 609 + } 610 + SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume); 611 + 715 612 static struct i2c_driver rk808_i2c_driver = { 716 613 .driver = { 717 614 .name = "rk808", 718 615 .of_match_table = rk808_of_match, 616 + .pm = &rk8xx_pm_ops, 719 617 }, 720 618 .probe = rk808_probe, 721 619 .remove = rk808_remove,
+2 -2
drivers/regulator/Kconfig
··· 762 762 outputs which can be controlled by i2c communication. 763 763 764 764 config REGULATOR_RK808 765 - tristate "Rockchip RK805/RK808/RK818 Power regulators" 765 + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 Power regulators" 766 766 depends on MFD_RK808 767 767 help 768 768 Select this option to enable the power regulator of ROCKCHIP 769 - PMIC RK805,RK808 and RK818. 769 + PMIC RK805,RK809&RK817,RK808 and RK818. 770 770 This driver supports the control of different power rails of device 771 771 through regulator interface. The device supports multiple DCDC/LDO 772 772 outputs which can be controlled by i2c communication.
+17 -1
drivers/regulator/lp87565-regulator.c
··· 153 153 LP87565_REG_BUCK2_CTRL_1, 154 154 LP87565_BUCK_CTRL_1_EN, 3230, 155 155 buck0_1_2_3_ranges, LP87565_REG_BUCK2_CTRL_2), 156 + LP87565_REGULATOR("BUCK3210", LP87565_BUCK_3210, "buck3210", 157 + lp87565_buck_ops, 256, LP87565_REG_BUCK0_VOUT, 158 + LP87565_BUCK_VSET, LP87565_REG_BUCK0_CTRL_1, 159 + LP87565_BUCK_CTRL_1_EN | 160 + LP87565_BUCK_CTRL_1_FPWM_MP_0_2, 3230, 161 + buck0_1_2_3_ranges, LP87565_REG_BUCK0_CTRL_2), 156 162 }; 157 163 158 164 static int lp87565_regulator_probe(struct platform_device *pdev) ··· 175 169 config.driver_data = lp87565; 176 170 config.regmap = lp87565->regmap; 177 171 178 - if (lp87565->dev_type == LP87565_DEVICE_TYPE_LP87565_Q1) { 172 + switch (lp87565->dev_type) { 173 + case LP87565_DEVICE_TYPE_LP87565_Q1: 179 174 min_idx = LP87565_BUCK_10; 180 175 max_idx = LP87565_BUCK_23; 176 + break; 177 + case LP87565_DEVICE_TYPE_LP87561_Q1: 178 + min_idx = LP87565_BUCK_3210; 179 + max_idx = LP87565_BUCK_3210; 180 + break; 181 + default: 182 + dev_err(lp87565->dev, "Invalid lp config %d\n", 183 + lp87565->dev_type); 184 + return -EINVAL; 181 185 } 182 186 183 187 for (i = min_idx; i <= max_idx; i++) {
+621 -27
drivers/regulator/rk808-regulator.c
··· 36 36 #define RK808_BUCK4_VSEL_MASK 0xf 37 37 #define RK808_LDO_VSEL_MASK 0x1f 38 38 39 + #define RK809_BUCK5_VSEL_MASK 0x7 40 + 41 + #define RK817_LDO_VSEL_MASK 0x7f 42 + #define RK817_BOOST_VSEL_MASK 0x7 43 + #define RK817_BUCK_VSEL_MASK 0x7f 44 + 39 45 #define RK818_BUCK_VSEL_MASK 0x3f 40 46 #define RK818_BUCK4_VSEL_MASK 0x1f 41 47 #define RK818_LDO_VSEL_MASK 0x1f ··· 71 65 /* max steps for increase voltage of Buck1/2, equal 100mv*/ 72 66 #define MAX_STEPS_ONE_TIME 8 73 67 74 - #define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ 75 - _vmask, _ereg, _emask, _etime) \ 76 - [_id] = { \ 77 - .name = (_match), \ 78 - .supply_name = (_supply), \ 79 - .of_match = of_match_ptr(_match), \ 80 - .regulators_node = of_match_ptr("regulators"), \ 81 - .type = REGULATOR_VOLTAGE, \ 82 - .id = (_id), \ 83 - .n_voltages = (((_max) - (_min)) / (_step) + 1), \ 84 - .owner = THIS_MODULE, \ 85 - .min_uV = (_min) * 1000, \ 86 - .uV_step = (_step) * 1000, \ 87 - .vsel_reg = (_vreg), \ 88 - .vsel_mask = (_vmask), \ 89 - .enable_reg = (_ereg), \ 90 - .enable_mask = (_emask), \ 91 - .enable_time = (_etime), \ 92 - .ops = &rk805_reg_ops, \ 93 - } 68 + #define ENABLE_MASK(id) (BIT(id) | BIT(4 + (id))) 69 + #define DISABLE_VAL(id) (BIT(4 + (id))) 94 70 95 - #define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ 96 - _vmask, _ereg, _emask, _etime) \ 97 - [_id] = { \ 71 + #define RK817_BOOST_DESC(_id, _match, _supply, _min, _max, _step, _vreg,\ 72 + _vmask, _ereg, _emask, _enval, _disval, _etime, m_drop) \ 73 + { \ 98 74 .name = (_match), \ 99 75 .supply_name = (_supply), \ 100 76 .of_match = of_match_ptr(_match), \ ··· 91 103 .vsel_mask = (_vmask), \ 92 104 .enable_reg = (_ereg), \ 93 105 .enable_mask = (_emask), \ 106 + .enable_val = (_enval), \ 107 + .disable_val = (_disval), \ 94 108 .enable_time = (_etime), \ 95 - .ops = &rk808_reg_ops, \ 109 + .min_dropout_uV = (m_drop) * 1000, \ 110 + .ops = &rk817_boost_ops, \ 96 111 } 97 112 98 - #define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ 99 - [_id] = { \ 113 + #define RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ 114 + _vmask, _ereg, _emask, _enval, _disval, _etime, _ops) \ 115 + { \ 116 + .name = (_match), \ 117 + .supply_name = (_supply), \ 118 + .of_match = of_match_ptr(_match), \ 119 + .regulators_node = of_match_ptr("regulators"), \ 120 + .type = REGULATOR_VOLTAGE, \ 121 + .id = (_id), \ 122 + .n_voltages = (((_max) - (_min)) / (_step) + 1), \ 123 + .owner = THIS_MODULE, \ 124 + .min_uV = (_min) * 1000, \ 125 + .uV_step = (_step) * 1000, \ 126 + .vsel_reg = (_vreg), \ 127 + .vsel_mask = (_vmask), \ 128 + .enable_reg = (_ereg), \ 129 + .enable_mask = (_emask), \ 130 + .enable_val = (_enval), \ 131 + .disable_val = (_disval), \ 132 + .enable_time = (_etime), \ 133 + .ops = _ops, \ 134 + } 135 + 136 + #define RK805_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ 137 + _vmask, _ereg, _emask, _etime) \ 138 + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ 139 + _vmask, _ereg, _emask, 0, 0, _etime, &rk805_reg_ops) 140 + 141 + #define RK8XX_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ 142 + _vmask, _ereg, _emask, _etime) \ 143 + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ 144 + _vmask, _ereg, _emask, 0, 0, _etime, &rk808_reg_ops) 145 + 146 + #define RK817_DESC(_id, _match, _supply, _min, _max, _step, _vreg, \ 147 + _vmask, _ereg, _emask, _disval, _etime) \ 148 + RK8XX_DESC_COM(_id, _match, _supply, _min, _max, _step, _vreg, \ 149 + _vmask, _ereg, _emask, _emask, _disval, _etime, &rk817_reg_ops) 150 + 151 + #define RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ 152 + _enval, _disval, _ops) \ 153 + { \ 100 154 .name = (_match), \ 101 155 .supply_name = (_supply), \ 102 156 .of_match = of_match_ptr(_match), \ ··· 147 117 .id = (_id), \ 148 118 .enable_reg = (_ereg), \ 149 119 .enable_mask = (_emask), \ 120 + .enable_val = (_enval), \ 121 + .disable_val = (_disval), \ 150 122 .owner = THIS_MODULE, \ 151 - .ops = &rk808_switch_ops \ 123 + .ops = _ops \ 152 124 } 153 125 126 + #define RK817_DESC_SWITCH(_id, _match, _supply, _ereg, _emask, \ 127 + _disval) \ 128 + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ 129 + _emask, _disval, &rk817_switch_ops) 130 + 131 + #define RK8XX_DESC_SWITCH(_id, _match, _supply, _ereg, _emask) \ 132 + RKXX_DESC_SWITCH_COM(_id, _match, _supply, _ereg, _emask, \ 133 + 0, 0, &rk808_switch_ops) 154 134 155 135 struct rk808_regulator_data { 156 136 struct gpio_desc *dvs_gpio[2]; ··· 176 136 static const struct regulator_linear_range rk808_ldo3_voltage_ranges[] = { 177 137 REGULATOR_LINEAR_RANGE(800000, 0, 13, 100000), 178 138 REGULATOR_LINEAR_RANGE(2500000, 15, 15, 0), 139 + }; 140 + 141 + #define RK809_BUCK5_SEL_CNT (8) 142 + 143 + static const struct regulator_linear_range rk809_buck5_voltage_ranges[] = { 144 + REGULATOR_LINEAR_RANGE(1500000, 0, 0, 0), 145 + REGULATOR_LINEAR_RANGE(1800000, 1, 3, 200000), 146 + REGULATOR_LINEAR_RANGE(2800000, 4, 5, 200000), 147 + REGULATOR_LINEAR_RANGE(3300000, 6, 7, 300000), 148 + }; 149 + 150 + #define RK817_BUCK1_MIN0 500000 151 + #define RK817_BUCK1_MAX0 1500000 152 + 153 + #define RK817_BUCK1_MIN1 1600000 154 + #define RK817_BUCK1_MAX1 2400000 155 + 156 + #define RK817_BUCK3_MAX1 3400000 157 + 158 + #define RK817_BUCK1_STP0 12500 159 + #define RK817_BUCK1_STP1 100000 160 + 161 + #define RK817_BUCK1_SEL0 ((RK817_BUCK1_MAX0 - RK817_BUCK1_MIN0) /\ 162 + RK817_BUCK1_STP0) 163 + #define RK817_BUCK1_SEL1 ((RK817_BUCK1_MAX1 - RK817_BUCK1_MIN1) /\ 164 + RK817_BUCK1_STP1) 165 + 166 + #define RK817_BUCK3_SEL1 ((RK817_BUCK3_MAX1 - RK817_BUCK1_MIN1) /\ 167 + RK817_BUCK1_STP1) 168 + 169 + #define RK817_BUCK1_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK1_SEL1 + 1) 170 + #define RK817_BUCK3_SEL_CNT (RK817_BUCK1_SEL0 + RK817_BUCK3_SEL1 + 1) 171 + 172 + static const struct regulator_linear_range rk817_buck1_voltage_ranges[] = { 173 + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0, 174 + RK817_BUCK1_SEL0, RK817_BUCK1_STP0), 175 + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1, 176 + RK817_BUCK1_SEL_CNT, RK817_BUCK1_STP1), 177 + }; 178 + 179 + static const struct regulator_linear_range rk817_buck3_voltage_ranges[] = { 180 + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN0, 0, 181 + RK817_BUCK1_SEL0, RK817_BUCK1_STP0), 182 + REGULATOR_LINEAR_RANGE(RK817_BUCK1_MIN1, RK817_BUCK1_SEL0 + 1, 183 + RK817_BUCK3_SEL_CNT, RK817_BUCK1_STP1), 179 184 }; 180 185 181 186 static int rk808_buck1_2_get_voltage_sel_regmap(struct regulator_dev *rdev) ··· 374 289 RK808_RAMP_RATE_MASK, ramp_value); 375 290 } 376 291 292 + /* 293 + * RK817 RK809 294 + */ 295 + static int rk817_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay) 296 + { 297 + unsigned int ramp_value = RK817_RAMP_RATE_25MV_PER_US; 298 + unsigned int reg = RK817_BUCK_CONFIG_REG(rdev_get_id(rdev)); 299 + 300 + switch (ramp_delay) { 301 + case 0 ... 3000: 302 + ramp_value = RK817_RAMP_RATE_3MV_PER_US; 303 + break; 304 + case 3001 ... 6300: 305 + ramp_value = RK817_RAMP_RATE_6_3MV_PER_US; 306 + break; 307 + case 6301 ... 12500: 308 + ramp_value = RK817_RAMP_RATE_12_5MV_PER_US; 309 + break; 310 + case 12501 ... 25000: 311 + break; 312 + default: 313 + dev_warn(&rdev->dev, 314 + "%s ramp_delay: %d not supported, setting 10000\n", 315 + rdev->desc->name, ramp_delay); 316 + } 317 + 318 + return regmap_update_bits(rdev->regmap, reg, 319 + RK817_RAMP_RATE_MASK, ramp_value); 320 + } 321 + 377 322 static int rk808_set_suspend_voltage(struct regulator_dev *rdev, int uv) 378 323 { 379 324 unsigned int reg; 380 325 int sel = regulator_map_voltage_linear(rdev, uv, uv); 381 326 327 + if (sel < 0) 328 + return -EINVAL; 329 + 330 + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; 331 + 332 + return regmap_update_bits(rdev->regmap, reg, 333 + rdev->desc->vsel_mask, 334 + sel); 335 + } 336 + 337 + static int rk817_set_suspend_voltage(struct regulator_dev *rdev, int uv) 338 + { 339 + unsigned int reg; 340 + int sel = regulator_map_voltage_linear(rdev, uv, uv); 341 + /* only ldo1~ldo9 */ 382 342 if (sel < 0) 383 343 return -EINVAL; 384 344 ··· 491 361 return regmap_update_bits(rdev->regmap, reg, 492 362 rdev->desc->enable_mask, 493 363 rdev->desc->enable_mask); 364 + } 365 + 366 + static int rk817_set_suspend_enable_ctrl(struct regulator_dev *rdev, 367 + unsigned int en) 368 + { 369 + unsigned int reg; 370 + int id = rdev_get_id(rdev); 371 + unsigned int id_slp, msk, val; 372 + 373 + if (id >= RK817_ID_DCDC1 && id <= RK817_ID_DCDC4) 374 + id_slp = id; 375 + else if (id >= RK817_ID_LDO1 && id <= RK817_ID_LDO8) 376 + id_slp = 8 + (id - RK817_ID_LDO1); 377 + else if (id >= RK817_ID_LDO9 && id <= RK809_ID_SW2) 378 + id_slp = 4 + (id - RK817_ID_LDO9); 379 + else 380 + return -EINVAL; 381 + 382 + reg = RK817_POWER_SLP_EN_REG(id_slp / 8); 383 + 384 + msk = BIT(id_slp % 8); 385 + if (en) 386 + val = msk; 387 + else 388 + val = 0; 389 + 390 + return regmap_update_bits(rdev->regmap, reg, msk, val); 391 + } 392 + 393 + static int rk817_set_suspend_enable(struct regulator_dev *rdev) 394 + { 395 + return rk817_set_suspend_enable_ctrl(rdev, 1); 396 + } 397 + 398 + static int rk817_set_suspend_disable(struct regulator_dev *rdev) 399 + { 400 + return rk817_set_suspend_enable_ctrl(rdev, 0); 401 + } 402 + 403 + static int rk8xx_set_suspend_mode(struct regulator_dev *rdev, unsigned int mode) 404 + { 405 + unsigned int reg; 406 + 407 + reg = rdev->desc->vsel_reg + RK808_SLP_REG_OFFSET; 408 + 409 + switch (mode) { 410 + case REGULATOR_MODE_FAST: 411 + return regmap_update_bits(rdev->regmap, reg, 412 + PWM_MODE_MSK, FPWM_MODE); 413 + case REGULATOR_MODE_NORMAL: 414 + return regmap_update_bits(rdev->regmap, reg, 415 + PWM_MODE_MSK, AUTO_PWM_MODE); 416 + default: 417 + dev_err(&rdev->dev, "do not support this mode\n"); 418 + return -EINVAL; 419 + } 420 + 421 + return 0; 422 + } 423 + 424 + static int rk8xx_set_mode(struct regulator_dev *rdev, unsigned int mode) 425 + { 426 + switch (mode) { 427 + case REGULATOR_MODE_FAST: 428 + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, 429 + PWM_MODE_MSK, FPWM_MODE); 430 + case REGULATOR_MODE_NORMAL: 431 + return regmap_update_bits(rdev->regmap, rdev->desc->vsel_reg, 432 + PWM_MODE_MSK, AUTO_PWM_MODE); 433 + default: 434 + dev_err(&rdev->dev, "do not support this mode\n"); 435 + return -EINVAL; 436 + } 437 + 438 + return 0; 439 + } 440 + 441 + static unsigned int rk8xx_get_mode(struct regulator_dev *rdev) 442 + { 443 + unsigned int val; 444 + int err; 445 + 446 + err = regmap_read(rdev->regmap, rdev->desc->vsel_reg, &val); 447 + if (err) 448 + return err; 449 + 450 + if (val & FPWM_MODE) 451 + return REGULATOR_MODE_FAST; 452 + else 453 + return REGULATOR_MODE_NORMAL; 454 + } 455 + 456 + static int rk8xx_is_enabled_wmsk_regmap(struct regulator_dev *rdev) 457 + { 458 + unsigned int val; 459 + int ret; 460 + 461 + ret = regmap_read(rdev->regmap, rdev->desc->enable_reg, &val); 462 + if (ret != 0) 463 + return ret; 464 + 465 + /* add write mask bit */ 466 + val |= (rdev->desc->enable_mask & 0xf0); 467 + val &= rdev->desc->enable_mask; 468 + 469 + if (rdev->desc->enable_is_inverted) { 470 + if (rdev->desc->enable_val) 471 + return val != rdev->desc->enable_val; 472 + return (val == 0); 473 + } 474 + if (rdev->desc->enable_val) 475 + return val == rdev->desc->enable_val; 476 + return val != 0; 477 + } 478 + 479 + static unsigned int rk8xx_regulator_of_map_mode(unsigned int mode) 480 + { 481 + switch (mode) { 482 + case 1: 483 + return REGULATOR_MODE_FAST; 484 + case 2: 485 + return REGULATOR_MODE_NORMAL; 486 + default: 487 + return -EINVAL; 488 + } 494 489 } 495 490 496 491 static const struct regulator_ops rk805_reg_ops = { ··· 692 437 REGULATOR_LINEAR_RANGE(712500, 0, 59, 12500), 693 438 REGULATOR_LINEAR_RANGE(1800000, 60, 62, 200000), 694 439 REGULATOR_LINEAR_RANGE(2300000, 63, 63, 0), 440 + }; 441 + 442 + static struct regulator_ops rk809_buck5_ops_range = { 443 + .list_voltage = regulator_list_voltage_linear_range, 444 + .map_voltage = regulator_map_voltage_linear_range, 445 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 446 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 447 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 448 + .enable = regulator_enable_regmap, 449 + .disable = regulator_disable_regmap, 450 + .is_enabled = rk8xx_is_enabled_wmsk_regmap, 451 + .set_suspend_voltage = rk808_set_suspend_voltage_range, 452 + .set_suspend_enable = rk817_set_suspend_enable, 453 + .set_suspend_disable = rk817_set_suspend_disable, 454 + }; 455 + 456 + static struct regulator_ops rk817_reg_ops = { 457 + .list_voltage = regulator_list_voltage_linear, 458 + .map_voltage = regulator_map_voltage_linear, 459 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 460 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 461 + .enable = regulator_enable_regmap, 462 + .disable = regulator_disable_regmap, 463 + .is_enabled = rk8xx_is_enabled_wmsk_regmap, 464 + .set_suspend_voltage = rk817_set_suspend_voltage, 465 + .set_suspend_enable = rk817_set_suspend_enable, 466 + .set_suspend_disable = rk817_set_suspend_disable, 467 + }; 468 + 469 + static struct regulator_ops rk817_boost_ops = { 470 + .list_voltage = regulator_list_voltage_linear, 471 + .map_voltage = regulator_map_voltage_linear, 472 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 473 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 474 + .enable = regulator_enable_regmap, 475 + .disable = regulator_disable_regmap, 476 + .is_enabled = rk8xx_is_enabled_wmsk_regmap, 477 + .set_suspend_enable = rk817_set_suspend_enable, 478 + .set_suspend_disable = rk817_set_suspend_disable, 479 + }; 480 + 481 + static struct regulator_ops rk817_buck_ops_range = { 482 + .list_voltage = regulator_list_voltage_linear_range, 483 + .map_voltage = regulator_map_voltage_linear_range, 484 + .get_voltage_sel = regulator_get_voltage_sel_regmap, 485 + .set_voltage_sel = regulator_set_voltage_sel_regmap, 486 + .set_voltage_time_sel = regulator_set_voltage_time_sel, 487 + .enable = regulator_enable_regmap, 488 + .disable = regulator_disable_regmap, 489 + .is_enabled = rk8xx_is_enabled_wmsk_regmap, 490 + .set_mode = rk8xx_set_mode, 491 + .get_mode = rk8xx_get_mode, 492 + .set_suspend_mode = rk8xx_set_suspend_mode, 493 + .set_ramp_delay = rk817_set_ramp_delay, 494 + .set_suspend_voltage = rk808_set_suspend_voltage_range, 495 + .set_suspend_enable = rk817_set_suspend_enable, 496 + .set_suspend_disable = rk817_set_suspend_disable, 497 + }; 498 + 499 + static struct regulator_ops rk817_switch_ops = { 500 + .enable = regulator_enable_regmap, 501 + .disable = regulator_disable_regmap, 502 + .is_enabled = rk8xx_is_enabled_wmsk_regmap, 503 + .set_suspend_enable = rk817_set_suspend_enable, 504 + .set_suspend_disable = rk817_set_suspend_disable, 695 505 }; 696 506 697 507 static const struct regulator_desc rk805_reg[] = { ··· 913 593 RK808_DCDC_EN_REG, BIT(5)), 914 594 RK8XX_DESC_SWITCH(RK808_ID_SWITCH2, "SWITCH_REG2", "vcc12", 915 595 RK808_DCDC_EN_REG, BIT(6)), 596 + }; 597 + 598 + static const struct regulator_desc rk809_reg[] = { 599 + { 600 + .name = "DCDC_REG1", 601 + .supply_name = "vcc1", 602 + .of_match = of_match_ptr("DCDC_REG1"), 603 + .regulators_node = of_match_ptr("regulators"), 604 + .id = RK817_ID_DCDC1, 605 + .ops = &rk817_buck_ops_range, 606 + .type = REGULATOR_VOLTAGE, 607 + .n_voltages = RK817_BUCK1_SEL_CNT + 1, 608 + .linear_ranges = rk817_buck1_voltage_ranges, 609 + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), 610 + .vsel_reg = RK817_BUCK1_ON_VSEL_REG, 611 + .vsel_mask = RK817_BUCK_VSEL_MASK, 612 + .enable_reg = RK817_POWER_EN_REG(0), 613 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC1), 614 + .enable_val = ENABLE_MASK(RK817_ID_DCDC1), 615 + .disable_val = DISABLE_VAL(RK817_ID_DCDC1), 616 + .of_map_mode = rk8xx_regulator_of_map_mode, 617 + .owner = THIS_MODULE, 618 + }, { 619 + .name = "DCDC_REG2", 620 + .supply_name = "vcc2", 621 + .of_match = of_match_ptr("DCDC_REG2"), 622 + .regulators_node = of_match_ptr("regulators"), 623 + .id = RK817_ID_DCDC2, 624 + .ops = &rk817_buck_ops_range, 625 + .type = REGULATOR_VOLTAGE, 626 + .n_voltages = RK817_BUCK1_SEL_CNT + 1, 627 + .linear_ranges = rk817_buck1_voltage_ranges, 628 + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), 629 + .vsel_reg = RK817_BUCK2_ON_VSEL_REG, 630 + .vsel_mask = RK817_BUCK_VSEL_MASK, 631 + .enable_reg = RK817_POWER_EN_REG(0), 632 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC2), 633 + .enable_val = ENABLE_MASK(RK817_ID_DCDC2), 634 + .disable_val = DISABLE_VAL(RK817_ID_DCDC2), 635 + .of_map_mode = rk8xx_regulator_of_map_mode, 636 + .owner = THIS_MODULE, 637 + }, { 638 + .name = "DCDC_REG3", 639 + .supply_name = "vcc3", 640 + .of_match = of_match_ptr("DCDC_REG3"), 641 + .regulators_node = of_match_ptr("regulators"), 642 + .id = RK817_ID_DCDC3, 643 + .ops = &rk817_buck_ops_range, 644 + .type = REGULATOR_VOLTAGE, 645 + .n_voltages = RK817_BUCK1_SEL_CNT + 1, 646 + .linear_ranges = rk817_buck1_voltage_ranges, 647 + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), 648 + .vsel_reg = RK817_BUCK3_ON_VSEL_REG, 649 + .vsel_mask = RK817_BUCK_VSEL_MASK, 650 + .enable_reg = RK817_POWER_EN_REG(0), 651 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC3), 652 + .enable_val = ENABLE_MASK(RK817_ID_DCDC3), 653 + .disable_val = DISABLE_VAL(RK817_ID_DCDC3), 654 + .of_map_mode = rk8xx_regulator_of_map_mode, 655 + .owner = THIS_MODULE, 656 + }, { 657 + .name = "DCDC_REG4", 658 + .supply_name = "vcc4", 659 + .of_match = of_match_ptr("DCDC_REG4"), 660 + .regulators_node = of_match_ptr("regulators"), 661 + .id = RK817_ID_DCDC4, 662 + .ops = &rk817_buck_ops_range, 663 + .type = REGULATOR_VOLTAGE, 664 + .n_voltages = RK817_BUCK3_SEL_CNT + 1, 665 + .linear_ranges = rk817_buck3_voltage_ranges, 666 + .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges), 667 + .vsel_reg = RK817_BUCK4_ON_VSEL_REG, 668 + .vsel_mask = RK817_BUCK_VSEL_MASK, 669 + .enable_reg = RK817_POWER_EN_REG(0), 670 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC4), 671 + .enable_val = ENABLE_MASK(RK817_ID_DCDC4), 672 + .disable_val = DISABLE_VAL(RK817_ID_DCDC4), 673 + .of_map_mode = rk8xx_regulator_of_map_mode, 674 + .owner = THIS_MODULE, 675 + }, 676 + { 677 + .name = "DCDC_REG5", 678 + .supply_name = "vcc9", 679 + .of_match = of_match_ptr("DCDC_REG5"), 680 + .regulators_node = of_match_ptr("regulators"), 681 + .id = RK809_ID_DCDC5, 682 + .ops = &rk809_buck5_ops_range, 683 + .type = REGULATOR_VOLTAGE, 684 + .n_voltages = RK809_BUCK5_SEL_CNT, 685 + .linear_ranges = rk809_buck5_voltage_ranges, 686 + .n_linear_ranges = ARRAY_SIZE(rk809_buck5_voltage_ranges), 687 + .vsel_reg = RK809_BUCK5_CONFIG(0), 688 + .vsel_mask = RK809_BUCK5_VSEL_MASK, 689 + .enable_reg = RK817_POWER_EN_REG(3), 690 + .enable_mask = ENABLE_MASK(1), 691 + .enable_val = ENABLE_MASK(1), 692 + .disable_val = DISABLE_VAL(1), 693 + .of_map_mode = rk8xx_regulator_of_map_mode, 694 + .owner = THIS_MODULE, 695 + }, 696 + RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25, 697 + RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK, 698 + RK817_POWER_EN_REG(1), ENABLE_MASK(0), 699 + DISABLE_VAL(0), 400), 700 + RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25, 701 + RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK, 702 + RK817_POWER_EN_REG(1), ENABLE_MASK(1), 703 + DISABLE_VAL(1), 400), 704 + RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25, 705 + RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK, 706 + RK817_POWER_EN_REG(1), ENABLE_MASK(2), 707 + DISABLE_VAL(2), 400), 708 + RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25, 709 + RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK, 710 + RK817_POWER_EN_REG(1), ENABLE_MASK(3), 711 + DISABLE_VAL(3), 400), 712 + RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25, 713 + RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK, 714 + RK817_POWER_EN_REG(2), ENABLE_MASK(0), 715 + DISABLE_VAL(0), 400), 716 + RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25, 717 + RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK, 718 + RK817_POWER_EN_REG(2), ENABLE_MASK(1), 719 + DISABLE_VAL(1), 400), 720 + RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25, 721 + RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK, 722 + RK817_POWER_EN_REG(2), ENABLE_MASK(2), 723 + DISABLE_VAL(2), 400), 724 + RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25, 725 + RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK, 726 + RK817_POWER_EN_REG(2), ENABLE_MASK(3), 727 + DISABLE_VAL(3), 400), 728 + RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25, 729 + RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK, 730 + RK817_POWER_EN_REG(3), ENABLE_MASK(0), 731 + DISABLE_VAL(0), 400), 732 + RK817_DESC_SWITCH(RK809_ID_SW1, "SWITCH_REG1", "vcc9", 733 + RK817_POWER_EN_REG(3), ENABLE_MASK(2), 734 + DISABLE_VAL(2)), 735 + RK817_DESC_SWITCH(RK809_ID_SW2, "SWITCH_REG2", "vcc8", 736 + RK817_POWER_EN_REG(3), ENABLE_MASK(3), 737 + DISABLE_VAL(3)), 738 + }; 739 + 740 + static const struct regulator_desc rk817_reg[] = { 741 + { 742 + .name = "DCDC_REG1", 743 + .supply_name = "vcc1", 744 + .of_match = of_match_ptr("DCDC_REG1"), 745 + .regulators_node = of_match_ptr("regulators"), 746 + .id = RK817_ID_DCDC1, 747 + .ops = &rk817_buck_ops_range, 748 + .type = REGULATOR_VOLTAGE, 749 + .n_voltages = RK817_BUCK1_SEL_CNT + 1, 750 + .linear_ranges = rk817_buck1_voltage_ranges, 751 + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), 752 + .vsel_reg = RK817_BUCK1_ON_VSEL_REG, 753 + .vsel_mask = RK817_BUCK_VSEL_MASK, 754 + .enable_reg = RK817_POWER_EN_REG(0), 755 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC1), 756 + .enable_val = ENABLE_MASK(RK817_ID_DCDC1), 757 + .disable_val = DISABLE_VAL(RK817_ID_DCDC1), 758 + .of_map_mode = rk8xx_regulator_of_map_mode, 759 + .owner = THIS_MODULE, 760 + }, { 761 + .name = "DCDC_REG2", 762 + .supply_name = "vcc2", 763 + .of_match = of_match_ptr("DCDC_REG2"), 764 + .regulators_node = of_match_ptr("regulators"), 765 + .id = RK817_ID_DCDC2, 766 + .ops = &rk817_buck_ops_range, 767 + .type = REGULATOR_VOLTAGE, 768 + .n_voltages = RK817_BUCK1_SEL_CNT + 1, 769 + .linear_ranges = rk817_buck1_voltage_ranges, 770 + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), 771 + .vsel_reg = RK817_BUCK2_ON_VSEL_REG, 772 + .vsel_mask = RK817_BUCK_VSEL_MASK, 773 + .enable_reg = RK817_POWER_EN_REG(0), 774 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC2), 775 + .enable_val = ENABLE_MASK(RK817_ID_DCDC2), 776 + .disable_val = DISABLE_VAL(RK817_ID_DCDC2), 777 + .of_map_mode = rk8xx_regulator_of_map_mode, 778 + .owner = THIS_MODULE, 779 + }, { 780 + .name = "DCDC_REG3", 781 + .supply_name = "vcc3", 782 + .of_match = of_match_ptr("DCDC_REG3"), 783 + .regulators_node = of_match_ptr("regulators"), 784 + .id = RK817_ID_DCDC3, 785 + .ops = &rk817_buck_ops_range, 786 + .type = REGULATOR_VOLTAGE, 787 + .n_voltages = RK817_BUCK1_SEL_CNT + 1, 788 + .linear_ranges = rk817_buck1_voltage_ranges, 789 + .n_linear_ranges = ARRAY_SIZE(rk817_buck1_voltage_ranges), 790 + .vsel_reg = RK817_BUCK3_ON_VSEL_REG, 791 + .vsel_mask = RK817_BUCK_VSEL_MASK, 792 + .enable_reg = RK817_POWER_EN_REG(0), 793 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC3), 794 + .enable_val = ENABLE_MASK(RK817_ID_DCDC3), 795 + .disable_val = DISABLE_VAL(RK817_ID_DCDC3), 796 + .of_map_mode = rk8xx_regulator_of_map_mode, 797 + .owner = THIS_MODULE, 798 + }, { 799 + .name = "DCDC_REG4", 800 + .supply_name = "vcc4", 801 + .of_match = of_match_ptr("DCDC_REG4"), 802 + .regulators_node = of_match_ptr("regulators"), 803 + .id = RK817_ID_DCDC4, 804 + .ops = &rk817_buck_ops_range, 805 + .type = REGULATOR_VOLTAGE, 806 + .n_voltages = RK817_BUCK3_SEL_CNT + 1, 807 + .linear_ranges = rk817_buck3_voltage_ranges, 808 + .n_linear_ranges = ARRAY_SIZE(rk817_buck3_voltage_ranges), 809 + .vsel_reg = RK817_BUCK4_ON_VSEL_REG, 810 + .vsel_mask = RK817_BUCK_VSEL_MASK, 811 + .enable_reg = RK817_POWER_EN_REG(0), 812 + .enable_mask = ENABLE_MASK(RK817_ID_DCDC4), 813 + .enable_val = ENABLE_MASK(RK817_ID_DCDC4), 814 + .disable_val = DISABLE_VAL(RK817_ID_DCDC4), 815 + .of_map_mode = rk8xx_regulator_of_map_mode, 816 + .owner = THIS_MODULE, 817 + }, 818 + RK817_DESC(RK817_ID_LDO1, "LDO_REG1", "vcc5", 600, 3400, 25, 819 + RK817_LDO_ON_VSEL_REG(0), RK817_LDO_VSEL_MASK, 820 + RK817_POWER_EN_REG(1), ENABLE_MASK(0), 821 + DISABLE_VAL(0), 400), 822 + RK817_DESC(RK817_ID_LDO2, "LDO_REG2", "vcc5", 600, 3400, 25, 823 + RK817_LDO_ON_VSEL_REG(1), RK817_LDO_VSEL_MASK, 824 + RK817_POWER_EN_REG(1), ENABLE_MASK(1), 825 + DISABLE_VAL(1), 400), 826 + RK817_DESC(RK817_ID_LDO3, "LDO_REG3", "vcc5", 600, 3400, 25, 827 + RK817_LDO_ON_VSEL_REG(2), RK817_LDO_VSEL_MASK, 828 + RK817_POWER_EN_REG(1), ENABLE_MASK(2), 829 + DISABLE_VAL(2), 400), 830 + RK817_DESC(RK817_ID_LDO4, "LDO_REG4", "vcc6", 600, 3400, 25, 831 + RK817_LDO_ON_VSEL_REG(3), RK817_LDO_VSEL_MASK, 832 + RK817_POWER_EN_REG(1), ENABLE_MASK(3), 833 + DISABLE_VAL(3), 400), 834 + RK817_DESC(RK817_ID_LDO5, "LDO_REG5", "vcc6", 600, 3400, 25, 835 + RK817_LDO_ON_VSEL_REG(4), RK817_LDO_VSEL_MASK, 836 + RK817_POWER_EN_REG(2), ENABLE_MASK(0), 837 + DISABLE_VAL(0), 400), 838 + RK817_DESC(RK817_ID_LDO6, "LDO_REG6", "vcc6", 600, 3400, 25, 839 + RK817_LDO_ON_VSEL_REG(5), RK817_LDO_VSEL_MASK, 840 + RK817_POWER_EN_REG(2), ENABLE_MASK(1), 841 + DISABLE_VAL(1), 400), 842 + RK817_DESC(RK817_ID_LDO7, "LDO_REG7", "vcc7", 600, 3400, 25, 843 + RK817_LDO_ON_VSEL_REG(6), RK817_LDO_VSEL_MASK, 844 + RK817_POWER_EN_REG(2), ENABLE_MASK(2), 845 + DISABLE_VAL(2), 400), 846 + RK817_DESC(RK817_ID_LDO8, "LDO_REG8", "vcc7", 600, 3400, 25, 847 + RK817_LDO_ON_VSEL_REG(7), RK817_LDO_VSEL_MASK, 848 + RK817_POWER_EN_REG(2), ENABLE_MASK(3), 849 + DISABLE_VAL(3), 400), 850 + RK817_DESC(RK817_ID_LDO9, "LDO_REG9", "vcc7", 600, 3400, 25, 851 + RK817_LDO_ON_VSEL_REG(8), RK817_LDO_VSEL_MASK, 852 + RK817_POWER_EN_REG(3), ENABLE_MASK(0), 853 + DISABLE_VAL(0), 400), 854 + RK817_BOOST_DESC(RK817_ID_BOOST, "BOOST", "vcc8", 4700, 5400, 100, 855 + RK817_BOOST_OTG_CFG, RK817_BOOST_VSEL_MASK, 856 + RK817_POWER_EN_REG(3), ENABLE_MASK(1), ENABLE_MASK(1), 857 + DISABLE_VAL(1), 400, 3500 - 5400), 858 + RK817_DESC_SWITCH(RK817_ID_BOOST_OTG_SW, "OTG_SWITCH", "vcc9", 859 + RK817_POWER_EN_REG(3), ENABLE_MASK(2), 860 + DISABLE_VAL(2)), 916 861 }; 917 862 918 863 static const struct regulator_desc rk818_reg[] = { ··· 1350 765 regulators = rk808_reg; 1351 766 nregulators = RK808_NUM_REGULATORS; 1352 767 break; 768 + case RK809_ID: 769 + regulators = rk809_reg; 770 + nregulators = RK809_NUM_REGULATORS; 771 + break; 772 + case RK817_ID: 773 + regulators = rk817_reg; 774 + nregulators = RK817_NUM_REGULATORS; 775 + break; 1353 776 case RK818_ID: 1354 777 regulators = rk818_reg; 1355 778 nregulators = RK818_NUM_REGULATORS; ··· 1396 803 module_platform_driver(rk808_regulator_driver); 1397 804 1398 805 MODULE_DESCRIPTION("regulator driver for the RK805/RK808/RK818 series PMICs"); 806 + MODULE_AUTHOR("Tony xie <tony.xie@rock-chips.com>"); 1399 807 MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>"); 1400 808 MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>"); 1401 809 MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
+2 -2
drivers/rtc/Kconfig
··· 373 373 will be called rtc-max77686. 374 374 375 375 config RTC_DRV_RK808 376 - tristate "Rockchip RK805/RK808/RK818 RTC" 376 + tristate "Rockchip RK805/RK808/RK809/RK817/RK818 RTC" 377 377 depends on MFD_RK808 378 378 help 379 379 If you say yes here you will get support for the 380 - RTC of RK805, RK808 and RK818 PMIC. 380 + RTC of RK805, RK809 and RK817, RK808 and RK818 PMIC. 381 381 382 382 This driver can also be built as a module. If so, the module 383 383 will be called rk808-rtc.
+54 -14
drivers/rtc/rtc-rk808.c
··· 50 50 #define NUM_TIME_REGS (RK808_WEEKS_REG - RK808_SECONDS_REG + 1) 51 51 #define NUM_ALARM_REGS (RK808_ALARM_YEARS_REG - RK808_ALARM_SECONDS_REG + 1) 52 52 53 + struct rk_rtc_compat_reg { 54 + unsigned int ctrl_reg; 55 + unsigned int status_reg; 56 + unsigned int alarm_seconds_reg; 57 + unsigned int int_reg; 58 + unsigned int seconds_reg; 59 + }; 60 + 53 61 struct rk808_rtc { 54 62 struct rk808 *rk808; 55 63 struct rtc_device *rtc; 64 + struct rk_rtc_compat_reg *creg; 56 65 int irq; 57 66 }; 58 67 ··· 110 101 int ret; 111 102 112 103 /* Force an update of the shadowed registers right now */ 113 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, 104 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 114 105 BIT_RTC_CTRL_REG_RTC_GET_TIME, 115 106 BIT_RTC_CTRL_REG_RTC_GET_TIME); 116 107 if (ret) { ··· 124 115 * 32khz. If we clear the GET_TIME bit here, the time of i2c transfer 125 116 * certainly more than 31.25us: 16 * 2.5us at 400kHz bus frequency. 126 117 */ 127 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, 118 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 128 119 BIT_RTC_CTRL_REG_RTC_GET_TIME, 129 120 0); 130 121 if (ret) { ··· 132 123 return ret; 133 124 } 134 125 135 - ret = regmap_bulk_read(rk808->regmap, RK808_SECONDS_REG, 126 + ret = regmap_bulk_read(rk808->regmap, rk808_rtc->creg->seconds_reg, 136 127 rtc_data, NUM_TIME_REGS); 137 128 if (ret) { 138 129 dev_err(dev, "Failed to bulk read rtc_data: %d\n", ret); ··· 171 162 rtc_data[6] = bin2bcd(tm->tm_wday); 172 163 173 164 /* Stop RTC while updating the RTC registers */ 174 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, 165 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 175 166 BIT_RTC_CTRL_REG_STOP_RTC_M, 176 167 BIT_RTC_CTRL_REG_STOP_RTC_M); 177 168 if (ret) { ··· 179 170 return ret; 180 171 } 181 172 182 - ret = regmap_bulk_write(rk808->regmap, RK808_SECONDS_REG, 173 + ret = regmap_bulk_write(rk808->regmap, rk808_rtc->creg->seconds_reg, 183 174 rtc_data, NUM_TIME_REGS); 184 175 if (ret) { 185 176 dev_err(dev, "Failed to bull write rtc_data: %d\n", ret); 186 177 return ret; 187 178 } 188 179 /* Start RTC again */ 189 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, 180 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 190 181 BIT_RTC_CTRL_REG_STOP_RTC_M, 0); 191 182 if (ret) { 192 183 dev_err(dev, "Failed to update RTC control: %d\n", ret); ··· 204 195 uint32_t int_reg; 205 196 int ret; 206 197 207 - ret = regmap_bulk_read(rk808->regmap, RK808_ALARM_SECONDS_REG, 198 + ret = regmap_bulk_read(rk808->regmap, 199 + rk808_rtc->creg->alarm_seconds_reg, 208 200 alrm_data, NUM_ALARM_REGS); 201 + if (ret) { 202 + dev_err(dev, "Failed to read RTC alarm date REG: %d\n", ret); 203 + return ret; 204 + } 209 205 210 206 alrm->time.tm_sec = bcd2bin(alrm_data[0] & SECONDS_REG_MSK); 211 207 alrm->time.tm_min = bcd2bin(alrm_data[1] & MINUTES_REG_MAK); ··· 220 206 alrm->time.tm_year = (bcd2bin(alrm_data[5] & YEARS_REG_MSK)) + 100; 221 207 rockchip_to_gregorian(&alrm->time); 222 208 223 - ret = regmap_read(rk808->regmap, RK808_RTC_INT_REG, &int_reg); 209 + ret = regmap_read(rk808->regmap, rk808_rtc->creg->int_reg, &int_reg); 224 210 if (ret) { 225 211 dev_err(dev, "Failed to read RTC INT REG: %d\n", ret); 226 212 return ret; ··· 239 225 struct rk808 *rk808 = rk808_rtc->rk808; 240 226 int ret; 241 227 242 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_INT_REG, 228 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, 243 229 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 0); 244 230 245 231 return ret; ··· 250 236 struct rk808 *rk808 = rk808_rtc->rk808; 251 237 int ret; 252 238 253 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_INT_REG, 239 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->int_reg, 254 240 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M, 255 241 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M); 256 242 ··· 280 266 alrm_data[4] = bin2bcd(alrm->time.tm_mon + 1); 281 267 alrm_data[5] = bin2bcd(alrm->time.tm_year - 100); 282 268 283 - ret = regmap_bulk_write(rk808->regmap, RK808_ALARM_SECONDS_REG, 269 + ret = regmap_bulk_write(rk808->regmap, 270 + rk808_rtc->creg->alarm_seconds_reg, 284 271 alrm_data, NUM_ALARM_REGS); 285 272 if (ret) { 286 273 dev_err(dev, "Failed to bulk write: %d\n", ret); ··· 325 310 struct i2c_client *client = rk808->i2c; 326 311 int ret; 327 312 328 - ret = regmap_write(rk808->regmap, RK808_RTC_STATUS_REG, 313 + ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, 329 314 RTC_STATUS_MASK); 330 315 if (ret) { 331 316 dev_err(&client->dev, ··· 376 361 static SIMPLE_DEV_PM_OPS(rk808_rtc_pm_ops, 377 362 rk808_rtc_suspend, rk808_rtc_resume); 378 363 364 + static struct rk_rtc_compat_reg rk808_creg = { 365 + .ctrl_reg = RK808_RTC_CTRL_REG, 366 + .status_reg = RK808_RTC_STATUS_REG, 367 + .alarm_seconds_reg = RK808_ALARM_SECONDS_REG, 368 + .int_reg = RK808_RTC_INT_REG, 369 + .seconds_reg = RK808_SECONDS_REG, 370 + }; 371 + 372 + static struct rk_rtc_compat_reg rk817_creg = { 373 + .ctrl_reg = RK817_RTC_CTRL_REG, 374 + .status_reg = RK817_RTC_STATUS_REG, 375 + .alarm_seconds_reg = RK817_ALARM_SECONDS_REG, 376 + .int_reg = RK817_RTC_INT_REG, 377 + .seconds_reg = RK817_SECONDS_REG, 378 + }; 379 + 379 380 static int rk808_rtc_probe(struct platform_device *pdev) 380 381 { 381 382 struct rk808 *rk808 = dev_get_drvdata(pdev->dev.parent); ··· 402 371 if (rk808_rtc == NULL) 403 372 return -ENOMEM; 404 373 374 + switch (rk808->variant) { 375 + case RK809_ID: 376 + case RK817_ID: 377 + rk808_rtc->creg = &rk817_creg; 378 + break; 379 + default: 380 + rk808_rtc->creg = &rk808_creg; 381 + break; 382 + } 405 383 platform_set_drvdata(pdev, rk808_rtc); 406 384 rk808_rtc->rk808 = rk808; 407 385 408 386 /* start rtc running by default, and use shadowed timer. */ 409 - ret = regmap_update_bits(rk808->regmap, RK808_RTC_CTRL_REG, 387 + ret = regmap_update_bits(rk808->regmap, rk808_rtc->creg->ctrl_reg, 410 388 BIT_RTC_CTRL_REG_STOP_RTC_M | 411 389 BIT_RTC_CTRL_REG_RTC_READSEL_M, 412 390 BIT_RTC_CTRL_REG_RTC_READSEL_M); ··· 425 385 return ret; 426 386 } 427 387 428 - ret = regmap_write(rk808->regmap, RK808_RTC_STATUS_REG, 388 + ret = regmap_write(rk808->regmap, rk808_rtc->creg->status_reg, 429 389 RTC_STATUS_MASK); 430 390 if (ret) { 431 391 dev_err(&pdev->dev,
+2889 -725
include/linux/mfd/cros_ec_commands.h
··· 1 + /* SPDX-License-Identifier: GPL-2.0 */ 1 2 /* 2 3 * Host communication command constants for ChromeOS EC 3 4 * 4 5 * Copyright (C) 2012 Google, Inc 5 6 * 6 - * This software is licensed under the terms of the GNU General Public 7 - * License version 2, as published by the Free Software Foundation, and 8 - * may be copied, distributed, and modified under those terms. 9 - * 10 - * This program is distributed in the hope that it will be useful, 11 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 - * GNU General Public License for more details. 14 - * 15 - * The ChromeOS EC multi function device is used to mux all the requests 16 - * to the EC device for its multiple features: keyboard controller, 17 - * battery charging and regulator control, firmware update. 18 - * 19 - * NOTE: This file is copied verbatim from the ChromeOS EC Open Source 20 - * project in an attempt to make future updates easy to make. 7 + * NOTE: This file is auto-generated from ChromeOS EC Open Source code from 8 + * https://chromium.googlesource.com/chromiumos/platform/ec/+/master/include/ec_commands.h 21 9 */ 10 + 11 + /* Host communication command constants for Chrome EC */ 22 12 23 13 #ifndef __CROS_EC_COMMANDS_H 24 14 #define __CROS_EC_COMMANDS_H 15 + 16 + 17 + 18 + 19 + #define BUILD_ASSERT(_cond) 25 20 26 21 /* 27 22 * Current version of this protocol ··· 28 33 #define EC_PROTO_VERSION 0x00000002 29 34 30 35 /* Command version mask */ 31 - #define EC_VER_MASK(version) (1UL << (version)) 36 + #define EC_VER_MASK(version) BIT(version) 32 37 33 38 /* I/O addresses for ACPI commands */ 34 39 #define EC_LPC_ADDR_ACPI_DATA 0x62 ··· 42 47 /* Protocol version 2 */ 43 48 #define EC_LPC_ADDR_HOST_ARGS 0x800 /* And 0x801, 0x802, 0x803 */ 44 49 #define EC_LPC_ADDR_HOST_PARAM 0x804 /* For version 2 params; size is 45 - * EC_PROTO2_MAX_PARAM_SIZE */ 50 + * EC_PROTO2_MAX_PARAM_SIZE 51 + */ 46 52 /* Protocol version 3 */ 47 53 #define EC_LPC_ADDR_HOST_PACKET 0x800 /* Offset of version 3 packet */ 48 54 #define EC_LPC_HOST_PACKET_SIZE 0x100 /* Max size of version 3 packet */ 49 55 50 - /* The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 51 - * and they tell the kernel that so we have to think of it as two parts. */ 56 + /* 57 + * The actual block is 0x800-0x8ff, but some BIOSes think it's 0x880-0x8ff 58 + * and they tell the kernel that so we have to think of it as two parts. 59 + */ 52 60 #define EC_HOST_CMD_REGION0 0x800 53 61 #define EC_HOST_CMD_REGION1 0x880 54 62 #define EC_HOST_CMD_REGION_SIZE 0x80 55 63 56 64 /* EC command register bit functions */ 57 - #define EC_LPC_CMDR_DATA (1 << 0) /* Data ready for host to read */ 58 - #define EC_LPC_CMDR_PENDING (1 << 1) /* Write pending to EC */ 59 - #define EC_LPC_CMDR_BUSY (1 << 2) /* EC is busy processing a command */ 60 - #define EC_LPC_CMDR_CMD (1 << 3) /* Last host write was a command */ 61 - #define EC_LPC_CMDR_ACPI_BRST (1 << 4) /* Burst mode (not used) */ 62 - #define EC_LPC_CMDR_SCI (1 << 5) /* SCI event is pending */ 63 - #define EC_LPC_CMDR_SMI (1 << 6) /* SMI event is pending */ 65 + #define EC_LPC_CMDR_DATA BIT(0) /* Data ready for host to read */ 66 + #define EC_LPC_CMDR_PENDING BIT(1) /* Write pending to EC */ 67 + #define EC_LPC_CMDR_BUSY BIT(2) /* EC is busy processing a command */ 68 + #define EC_LPC_CMDR_CMD BIT(3) /* Last host write was a command */ 69 + #define EC_LPC_CMDR_ACPI_BRST BIT(4) /* Burst mode (not used) */ 70 + #define EC_LPC_CMDR_SCI BIT(5) /* SCI event is pending */ 71 + #define EC_LPC_CMDR_SMI BIT(6) /* SMI event is pending */ 64 72 65 73 #define EC_LPC_ADDR_MEMMAP 0x900 66 74 #define EC_MEMMAP_SIZE 255 /* ACPI IO buffer max is 255 bytes */ ··· 83 85 /* Unused 0x28 - 0x2f */ 84 86 #define EC_MEMMAP_SWITCHES 0x30 /* 8 bits */ 85 87 /* Unused 0x31 - 0x33 */ 86 - #define EC_MEMMAP_HOST_EVENTS 0x34 /* 32 bits */ 87 - /* Reserve 0x38 - 0x3f for additional host event-related stuff */ 88 - /* Battery values are all 32 bits */ 88 + #define EC_MEMMAP_HOST_EVENTS 0x34 /* 64 bits */ 89 + /* Battery values are all 32 bits, unless otherwise noted. */ 89 90 #define EC_MEMMAP_BATT_VOLT 0x40 /* Battery Present Voltage */ 90 91 #define EC_MEMMAP_BATT_RATE 0x44 /* Battery Present Rate */ 91 92 #define EC_MEMMAP_BATT_CAP 0x48 /* Battery Remaining Capacity */ 92 - #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, defined below */ 93 + #define EC_MEMMAP_BATT_FLAG 0x4c /* Battery State, see below (8-bit) */ 94 + #define EC_MEMMAP_BATT_COUNT 0x4d /* Battery Count (8-bit) */ 95 + #define EC_MEMMAP_BATT_INDEX 0x4e /* Current Battery Data Index (8-bit) */ 96 + /* Unused 0x4f */ 93 97 #define EC_MEMMAP_BATT_DCAP 0x50 /* Battery Design Capacity */ 94 98 #define EC_MEMMAP_BATT_DVLT 0x54 /* Battery Design Voltage */ 95 99 #define EC_MEMMAP_BATT_LFCC 0x58 /* Battery Last Full Charge Capacity */ ··· 105 105 /* Unused 0x84 - 0x8f */ 106 106 #define EC_MEMMAP_ACC_STATUS 0x90 /* Accelerometer status (8 bits )*/ 107 107 /* Unused 0x91 */ 108 - #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometer data 0x92 - 0x9f */ 108 + #define EC_MEMMAP_ACC_DATA 0x92 /* Accelerometers data 0x92 - 0x9f */ 109 + /* 0x92: Lid Angle if available, LID_ANGLE_UNRELIABLE otherwise */ 110 + /* 0x94 - 0x99: 1st Accelerometer */ 111 + /* 0x9a - 0x9f: 2nd Accelerometer */ 109 112 #define EC_MEMMAP_GYRO_DATA 0xa0 /* Gyroscope data 0xa0 - 0xa5 */ 110 - /* Unused 0xa6 - 0xfe (remember, 0xff is NOT part of the memmap region) */ 113 + /* Unused 0xa6 - 0xdf */ 111 114 115 + /* 116 + * ACPI is unable to access memory mapped data at or above this offset due to 117 + * limitations of the ACPI protocol. Do not place data in the range 0xe0 - 0xfe 118 + * which might be needed by ACPI. 119 + */ 120 + #define EC_MEMMAP_NO_ACPI 0xe0 112 121 113 122 /* Define the format of the accelerometer mapped memory status byte. */ 114 123 #define EC_MEMMAP_ACC_STATUS_SAMPLE_ID_MASK 0x0f 115 - #define EC_MEMMAP_ACC_STATUS_BUSY_BIT (1 << 4) 116 - #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT (1 << 7) 124 + #define EC_MEMMAP_ACC_STATUS_BUSY_BIT BIT(4) 125 + #define EC_MEMMAP_ACC_STATUS_PRESENCE_BIT BIT(7) 117 126 118 127 /* Number of temp sensors at EC_MEMMAP_TEMP_SENSOR */ 119 128 #define EC_TEMP_SENSOR_ENTRIES 16 ··· 166 157 #define EC_BATT_FLAG_DISCHARGING 0x04 167 158 #define EC_BATT_FLAG_CHARGING 0x08 168 159 #define EC_BATT_FLAG_LEVEL_CRITICAL 0x10 160 + /* Set if some of the static/dynamic data is invalid (or outdated). */ 161 + #define EC_BATT_FLAG_INVALID_DATA 0x20 169 162 170 163 /* Switch flags at EC_MEMMAP_SWITCHES */ 171 164 #define EC_SWITCH_LID_OPEN 0x01 ··· 193 182 #define EC_WIRELESS_SWITCH_WWAN 0x04 /* WWAN power */ 194 183 #define EC_WIRELESS_SWITCH_WLAN_POWER 0x08 /* WLAN power */ 195 184 185 + /*****************************************************************************/ 186 + /* 187 + * ACPI commands 188 + * 189 + * These are valid ONLY on the ACPI command/data port. 190 + */ 191 + 192 + /* 193 + * ACPI Read Embedded Controller 194 + * 195 + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 196 + * 197 + * Use the following sequence: 198 + * 199 + * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 200 + * - Wait for EC_LPC_CMDR_PENDING bit to clear 201 + * - Write address to EC_LPC_ADDR_ACPI_DATA 202 + * - Wait for EC_LPC_CMDR_DATA bit to set 203 + * - Read value from EC_LPC_ADDR_ACPI_DATA 204 + */ 205 + #define EC_CMD_ACPI_READ 0x0080 206 + 207 + /* 208 + * ACPI Write Embedded Controller 209 + * 210 + * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 211 + * 212 + * Use the following sequence: 213 + * 214 + * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 215 + * - Wait for EC_LPC_CMDR_PENDING bit to clear 216 + * - Write address to EC_LPC_ADDR_ACPI_DATA 217 + * - Wait for EC_LPC_CMDR_PENDING bit to clear 218 + * - Write value to EC_LPC_ADDR_ACPI_DATA 219 + */ 220 + #define EC_CMD_ACPI_WRITE 0x0081 221 + 222 + /* 223 + * ACPI Burst Enable Embedded Controller 224 + * 225 + * This enables burst mode on the EC to allow the host to issue several 226 + * commands back-to-back. While in this mode, writes to mapped multi-byte 227 + * data are locked out to ensure data consistency. 228 + */ 229 + #define EC_CMD_ACPI_BURST_ENABLE 0x0082 230 + 231 + /* 232 + * ACPI Burst Disable Embedded Controller 233 + * 234 + * This disables burst mode on the EC and stops preventing EC writes to mapped 235 + * multi-byte data. 236 + */ 237 + #define EC_CMD_ACPI_BURST_DISABLE 0x0083 238 + 239 + /* 240 + * ACPI Query Embedded Controller 241 + * 242 + * This clears the lowest-order bit in the currently pending host events, and 243 + * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 244 + * event 0x80000000 = 32), or 0 if no event was pending. 245 + */ 246 + #define EC_CMD_ACPI_QUERY_EVENT 0x0084 247 + 248 + /* Valid addresses in ACPI memory space, for read/write commands */ 249 + 250 + /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 251 + #define EC_ACPI_MEM_VERSION 0x00 252 + /* 253 + * Test location; writing value here updates test compliment byte to (0xff - 254 + * value). 255 + */ 256 + #define EC_ACPI_MEM_TEST 0x01 257 + /* Test compliment; writes here are ignored. */ 258 + #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 259 + 260 + /* Keyboard backlight brightness percent (0 - 100) */ 261 + #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 262 + /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 263 + #define EC_ACPI_MEM_FAN_DUTY 0x04 264 + 265 + /* 266 + * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 267 + * independent thresholds attached to them. The current value of the ID 268 + * register determines which sensor is affected by the THRESHOLD and COMMIT 269 + * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 270 + * as the memory-mapped sensors. The COMMIT register applies those settings. 271 + * 272 + * The spec does not mandate any way to read back the threshold settings 273 + * themselves, but when a threshold is crossed the AP needs a way to determine 274 + * which sensor(s) are responsible. Each reading of the ID register clears and 275 + * returns one sensor ID that has crossed one of its threshold (in either 276 + * direction) since the last read. A value of 0xFF means "no new thresholds 277 + * have tripped". Setting or enabling the thresholds for a sensor will clear 278 + * the unread event count for that sensor. 279 + */ 280 + #define EC_ACPI_MEM_TEMP_ID 0x05 281 + #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 282 + #define EC_ACPI_MEM_TEMP_COMMIT 0x07 283 + /* 284 + * Here are the bits for the COMMIT register: 285 + * bit 0 selects the threshold index for the chosen sensor (0/1) 286 + * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 287 + * Each write to the commit register affects one threshold. 288 + */ 289 + #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK BIT(0) 290 + #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK BIT(1) 291 + /* 292 + * Example: 293 + * 294 + * Set the thresholds for sensor 2 to 50 C and 60 C: 295 + * write 2 to [0x05] -- select temp sensor 2 296 + * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 297 + * write 0x2 to [0x07] -- enable threshold 0 with this value 298 + * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 299 + * write 0x3 to [0x07] -- enable threshold 1 with this value 300 + * 301 + * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 302 + * write 2 to [0x05] -- select temp sensor 2 303 + * write 0x1 to [0x07] -- disable threshold 1 304 + */ 305 + 306 + /* DPTF battery charging current limit */ 307 + #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 308 + 309 + /* Charging limit is specified in 64 mA steps */ 310 + #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 311 + /* Value to disable DPTF battery charging limit */ 312 + #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 313 + 314 + /* 315 + * Report device orientation 316 + * Bits Definition 317 + * 3:1 Device DPTF Profile Number (DDPN) 318 + * 0 = Reserved for backward compatibility (indicates no valid 319 + * profile number. Host should fall back to using TBMD). 320 + * 1..7 = DPTF Profile number to indicate to host which table needs 321 + * to be loaded. 322 + * 0 Tablet Mode Device Indicator (TBMD) 323 + */ 324 + #define EC_ACPI_MEM_DEVICE_ORIENTATION 0x09 325 + #define EC_ACPI_MEM_TBMD_SHIFT 0 326 + #define EC_ACPI_MEM_TBMD_MASK 0x1 327 + #define EC_ACPI_MEM_DDPN_SHIFT 1 328 + #define EC_ACPI_MEM_DDPN_MASK 0x7 329 + 330 + /* 331 + * Report device features. Uses the same format as the host command, except: 332 + * 333 + * bit 0 (EC_FEATURE_LIMITED) changes meaning from "EC code has a limited set 334 + * of features", which is of limited interest when the system is already 335 + * interpreting ACPI bytecode, to "EC_FEATURES[0-7] is not supported". Since 336 + * these are supported, it defaults to 0. 337 + * This allows detecting the presence of this field since older versions of 338 + * the EC codebase would simply return 0xff to that unknown address. Check 339 + * FEATURES0 != 0xff (or FEATURES0[0] == 0) to make sure that the other bits 340 + * are valid. 341 + */ 342 + #define EC_ACPI_MEM_DEVICE_FEATURES0 0x0a 343 + #define EC_ACPI_MEM_DEVICE_FEATURES1 0x0b 344 + #define EC_ACPI_MEM_DEVICE_FEATURES2 0x0c 345 + #define EC_ACPI_MEM_DEVICE_FEATURES3 0x0d 346 + #define EC_ACPI_MEM_DEVICE_FEATURES4 0x0e 347 + #define EC_ACPI_MEM_DEVICE_FEATURES5 0x0f 348 + #define EC_ACPI_MEM_DEVICE_FEATURES6 0x10 349 + #define EC_ACPI_MEM_DEVICE_FEATURES7 0x11 350 + 351 + #define EC_ACPI_MEM_BATTERY_INDEX 0x12 352 + 353 + /* 354 + * USB Port Power. Each bit indicates whether the corresponding USB ports' power 355 + * is enabled (1) or disabled (0). 356 + * bit 0 USB port ID 0 357 + * ... 358 + * bit 7 USB port ID 7 359 + */ 360 + #define EC_ACPI_MEM_USB_PORT_POWER 0x13 361 + 362 + /* 363 + * ACPI addresses 0x20 - 0xff map to EC_MEMMAP offset 0x00 - 0xdf. This data 364 + * is read-only from the AP. Added in EC_ACPI_MEM_VERSION 2. 365 + */ 366 + #define EC_ACPI_MEM_MAPPED_BEGIN 0x20 367 + #define EC_ACPI_MEM_MAPPED_SIZE 0xe0 368 + 369 + /* Current version of ACPI memory address space */ 370 + #define EC_ACPI_MEM_VERSION_CURRENT 2 371 + 372 + 196 373 /* 197 374 * This header file is used in coreboot both in C and ACPI code. The ACPI code 198 375 * is pre-processed to handle constants but the ASL compiler is unable to 199 376 * handle actual C code so keep it separate. 200 377 */ 201 - #ifndef __ACPI__ 378 + 202 379 203 380 /* 204 - * Define __packed if someone hasn't beat us to it. Linux kernel style 205 - * checking prefers __packed over __attribute__((packed)). 381 + * Attributes for EC request and response packets. Just defining __packed 382 + * results in inefficient assembly code on ARM, if the structure is actually 383 + * 32-bit aligned, as it should be for all buffers. 384 + * 385 + * Be very careful when adding these to existing structures. They will round 386 + * up the structure size to the specified boundary. 387 + * 388 + * Also be very careful to make that if a structure is included in some other 389 + * parent structure that the alignment will still be true given the packing of 390 + * the parent structure. This is particularly important if the sub-structure 391 + * will be passed as a pointer to another function, since that function will 392 + * not know about the misaligment caused by the parent structure's packing. 393 + * 394 + * Also be very careful using __packed - particularly when nesting non-packed 395 + * structures inside packed ones. In fact, DO NOT use __packed directly; 396 + * always use one of these attributes. 397 + * 398 + * Once everything is annotated properly, the following search strings should 399 + * not return ANY matches in this file other than right here: 400 + * 401 + * "__packed" - generates inefficient code; all sub-structs must also be packed 402 + * 403 + * "struct [^_]" - all structs should be annotated, except for structs that are 404 + * members of other structs/unions (and their original declarations should be 405 + * annotated). 206 406 */ 207 - #ifndef __packed 208 - #define __packed __attribute__((packed)) 209 - #endif 407 + 408 + /* 409 + * Packed structures make no assumption about alignment, so they do inefficient 410 + * byte-wise reads. 411 + */ 412 + #define __ec_align1 __packed 413 + #define __ec_align2 __packed 414 + #define __ec_align4 __packed 415 + #define __ec_align_size1 __packed 416 + #define __ec_align_offset1 __packed 417 + #define __ec_align_offset2 __packed 418 + #define __ec_todo_packed __packed 419 + #define __ec_todo_unpacked 420 + 210 421 211 422 /* LPC command status byte masks */ 212 423 /* EC has written a byte in the data register and host hasn't read it yet */ ··· 439 206 #define EC_LPC_STATUS_PROCESSING 0x04 440 207 /* Last write to EC was a command, not data */ 441 208 #define EC_LPC_STATUS_LAST_CMD 0x08 442 - /* EC is in burst mode. Unsupported by Chrome EC, so this bit is never set */ 209 + /* EC is in burst mode */ 443 210 #define EC_LPC_STATUS_BURST_MODE 0x10 444 211 /* SCI event is pending (requesting SCI query) */ 445 212 #define EC_LPC_STATUS_SCI_PENDING 0x20 ··· 455 222 #define EC_LPC_STATUS_BUSY_MASK \ 456 223 (EC_LPC_STATUS_FROM_HOST | EC_LPC_STATUS_PROCESSING) 457 224 458 - /* Host command response codes */ 225 + /* 226 + * Host command response codes (16-bit). Note that response codes should be 227 + * stored in a uint16_t rather than directly in a value of this type. 228 + */ 459 229 enum ec_status { 460 230 EC_RES_SUCCESS = 0, 461 231 EC_RES_INVALID_COMMAND = 1, ··· 474 238 EC_RES_OVERFLOW = 11, /* Table / data overflow */ 475 239 EC_RES_INVALID_HEADER = 12, /* Header contains invalid data */ 476 240 EC_RES_REQUEST_TRUNCATED = 13, /* Didn't get the entire request */ 477 - EC_RES_RESPONSE_TOO_BIG = 14 /* Response was too big to handle */ 241 + EC_RES_RESPONSE_TOO_BIG = 14, /* Response was too big to handle */ 242 + EC_RES_BUS_ERROR = 15, /* Communications bus error */ 243 + EC_RES_BUSY = 16, /* Up but too busy. Should retry */ 244 + EC_RES_INVALID_HEADER_VERSION = 17, /* Header version invalid */ 245 + EC_RES_INVALID_HEADER_CRC = 18, /* Header CRC invalid */ 246 + EC_RES_INVALID_DATA_CRC = 19, /* Data CRC invalid */ 247 + EC_RES_DUP_UNAVAILABLE = 20, /* Can't resend response */ 478 248 }; 479 249 480 250 /* ··· 500 258 EC_HOST_EVENT_BATTERY_CRITICAL = 7, 501 259 EC_HOST_EVENT_BATTERY = 8, 502 260 EC_HOST_EVENT_THERMAL_THRESHOLD = 9, 503 - EC_HOST_EVENT_THERMAL_OVERLOAD = 10, 261 + /* Event generated by a device attached to the EC */ 262 + EC_HOST_EVENT_DEVICE = 10, 504 263 EC_HOST_EVENT_THERMAL = 11, 505 264 EC_HOST_EVENT_USB_CHARGER = 12, 506 265 EC_HOST_EVENT_KEY_PRESSED = 13, ··· 528 285 EC_HOST_EVENT_HANG_DETECT = 20, 529 286 /* Hang detect logic detected a hang and warm rebooted the AP */ 530 287 EC_HOST_EVENT_HANG_REBOOT = 21, 288 + 531 289 /* PD MCU triggering host event */ 532 290 EC_HOST_EVENT_PD_MCU = 22, 291 + 292 + /* Battery Status flags have changed */ 293 + EC_HOST_EVENT_BATTERY_STATUS = 23, 294 + 295 + /* EC encountered a panic, triggering a reset */ 296 + EC_HOST_EVENT_PANIC = 24, 297 + 298 + /* Keyboard fastboot combo has been pressed */ 299 + EC_HOST_EVENT_KEYBOARD_FASTBOOT = 25, 300 + 301 + /* EC RTC event occurred */ 302 + EC_HOST_EVENT_RTC = 26, 303 + 304 + /* Emulate MKBP event */ 305 + EC_HOST_EVENT_MKBP = 27, 533 306 534 307 /* EC desires to change state of host-controlled USB mux */ 535 308 EC_HOST_EVENT_USB_MUX = 28, 536 309 537 - /* EC RTC event occurred */ 538 - EC_HOST_EVENT_RTC = 26, 310 + /* TABLET/LAPTOP mode or detachable base attach/detach event */ 311 + EC_HOST_EVENT_MODE_CHANGE = 29, 312 + 313 + /* Keyboard recovery combo with hardware reinitialization */ 314 + EC_HOST_EVENT_KEYBOARD_RECOVERY_HW_REINIT = 30, 539 315 540 316 /* 541 317 * The high bit of the event mask is not used as a host event code. If ··· 566 304 EC_HOST_EVENT_INVALID = 32 567 305 }; 568 306 /* Host event mask */ 569 - #define EC_HOST_EVENT_MASK(event_code) (1UL << ((event_code) - 1)) 307 + #define EC_HOST_EVENT_MASK(event_code) BIT_ULL((event_code) - 1) 570 308 571 309 /** 572 310 * struct ec_lpc_host_args - Arguments at EC_LPC_ADDR_HOST_ARGS ··· 581 319 uint8_t command_version; 582 320 uint8_t data_size; 583 321 uint8_t checksum; 584 - } __packed; 322 + } __ec_align4; 585 323 586 324 /* Flags for ec_lpc_host_args.flags */ 587 325 /* ··· 591 329 * If EC gets a command and this flag is not set, this is an old-style command. 592 330 * Command version is 0 and params from host are at EC_LPC_ADDR_OLD_PARAM with 593 331 * unknown length. EC must respond with an old-style response (that is, 594 - * withouth setting EC_HOST_ARGS_FLAG_TO_HOST). 332 + * without setting EC_HOST_ARGS_FLAG_TO_HOST). 595 333 */ 596 334 #define EC_HOST_ARGS_FLAG_FROM_HOST 0x01 597 335 /* ··· 752 490 uint8_t command_version; 753 491 uint8_t reserved; 754 492 uint16_t data_len; 755 - } __packed; 493 + } __ec_align4; 756 494 757 495 #define EC_HOST_RESPONSE_VERSION 3 758 496 ··· 771 509 uint16_t result; 772 510 uint16_t data_len; 773 511 uint16_t reserved; 774 - } __packed; 512 + } __ec_align4; 513 + 514 + /*****************************************************************************/ 515 + 516 + /* 517 + * Host command protocol V4. 518 + * 519 + * Packets always start with a request or response header. They are followed 520 + * by data_len bytes of data. If the data_crc_present flag is set, the data 521 + * bytes are followed by a CRC-8 of that data, using using x^8 + x^2 + x + 1 522 + * polynomial. 523 + * 524 + * Host algorithm when sending a request q: 525 + * 526 + * 101) tries_left=(some value, e.g. 3); 527 + * 102) q.seq_num++ 528 + * 103) q.seq_dup=0 529 + * 104) Calculate q.header_crc. 530 + * 105) Send request q to EC. 531 + * 106) Wait for response r. Go to 201 if received or 301 if timeout. 532 + * 533 + * 201) If r.struct_version != 4, go to 301. 534 + * 202) If r.header_crc mismatches calculated CRC for r header, go to 301. 535 + * 203) If r.data_crc_present and r.data_crc mismatches, go to 301. 536 + * 204) If r.seq_num != q.seq_num, go to 301. 537 + * 205) If r.seq_dup == q.seq_dup, return success. 538 + * 207) If r.seq_dup == 1, go to 301. 539 + * 208) Return error. 540 + * 541 + * 301) If --tries_left <= 0, return error. 542 + * 302) If q.seq_dup == 1, go to 105. 543 + * 303) q.seq_dup = 1 544 + * 304) Go to 104. 545 + * 546 + * EC algorithm when receiving a request q. 547 + * EC has response buffer r, error buffer e. 548 + * 549 + * 101) If q.struct_version != 4, set e.result = EC_RES_INVALID_HEADER_VERSION 550 + * and go to 301 551 + * 102) If q.header_crc mismatches calculated CRC, set e.result = 552 + * EC_RES_INVALID_HEADER_CRC and go to 301 553 + * 103) If q.data_crc_present, calculate data CRC. If that mismatches the CRC 554 + * byte at the end of the packet, set e.result = EC_RES_INVALID_DATA_CRC 555 + * and go to 301. 556 + * 104) If q.seq_dup == 0, go to 201. 557 + * 105) If q.seq_num != r.seq_num, go to 201. 558 + * 106) If q.seq_dup == r.seq_dup, go to 205, else go to 203. 559 + * 560 + * 201) Process request q into response r. 561 + * 202) r.seq_num = q.seq_num 562 + * 203) r.seq_dup = q.seq_dup 563 + * 204) Calculate r.header_crc 564 + * 205) If r.data_len > 0 and data is no longer available, set e.result = 565 + * EC_RES_DUP_UNAVAILABLE and go to 301. 566 + * 206) Send response r. 567 + * 568 + * 301) e.seq_num = q.seq_num 569 + * 302) e.seq_dup = q.seq_dup 570 + * 303) Calculate e.header_crc. 571 + * 304) Send error response e. 572 + */ 573 + 574 + /* Version 4 request from host */ 575 + struct ec_host_request4 { 576 + /* 577 + * bits 0-3: struct_version: Structure version (=4) 578 + * bit 4: is_response: Is response (=0) 579 + * bits 5-6: seq_num: Sequence number 580 + * bit 7: seq_dup: Sequence duplicate flag 581 + */ 582 + uint8_t fields0; 583 + 584 + /* 585 + * bits 0-4: command_version: Command version 586 + * bits 5-6: Reserved (set 0, ignore on read) 587 + * bit 7: data_crc_present: Is data CRC present after data 588 + */ 589 + uint8_t fields1; 590 + 591 + /* Command code (EC_CMD_*) */ 592 + uint16_t command; 593 + 594 + /* Length of data which follows this header (not including data CRC) */ 595 + uint16_t data_len; 596 + 597 + /* Reserved (set 0, ignore on read) */ 598 + uint8_t reserved; 599 + 600 + /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 601 + uint8_t header_crc; 602 + } __ec_align4; 603 + 604 + /* Version 4 response from EC */ 605 + struct ec_host_response4 { 606 + /* 607 + * bits 0-3: struct_version: Structure version (=4) 608 + * bit 4: is_response: Is response (=1) 609 + * bits 5-6: seq_num: Sequence number 610 + * bit 7: seq_dup: Sequence duplicate flag 611 + */ 612 + uint8_t fields0; 613 + 614 + /* 615 + * bits 0-6: Reserved (set 0, ignore on read) 616 + * bit 7: data_crc_present: Is data CRC present after data 617 + */ 618 + uint8_t fields1; 619 + 620 + /* Result code (EC_RES_*) */ 621 + uint16_t result; 622 + 623 + /* Length of data which follows this header (not including data CRC) */ 624 + uint16_t data_len; 625 + 626 + /* Reserved (set 0, ignore on read) */ 627 + uint8_t reserved; 628 + 629 + /* CRC-8 of above fields, using x^8 + x^2 + x + 1 polynomial */ 630 + uint8_t header_crc; 631 + } __ec_align4; 632 + 633 + /* Fields in fields0 byte */ 634 + #define EC_PACKET4_0_STRUCT_VERSION_MASK 0x0f 635 + #define EC_PACKET4_0_IS_RESPONSE_MASK 0x10 636 + #define EC_PACKET4_0_SEQ_NUM_SHIFT 5 637 + #define EC_PACKET4_0_SEQ_NUM_MASK 0x60 638 + #define EC_PACKET4_0_SEQ_DUP_MASK 0x80 639 + 640 + /* Fields in fields1 byte */ 641 + #define EC_PACKET4_1_COMMAND_VERSION_MASK 0x1f /* (request only) */ 642 + #define EC_PACKET4_1_DATA_CRC_PRESENT_MASK 0x80 775 643 776 644 /*****************************************************************************/ 777 645 /* 778 646 * Notes on commands: 779 647 * 780 648 * Each command is an 16-bit command value. Commands which take params or 781 - * return response data specify structs for that data. If no struct is 649 + * return response data specify structures for that data. If no structure is 782 650 * specified, the command does not input or output data, respectively. 783 651 * Parameter/response length is implicit in the structs. Some underlying 784 652 * communication protocols (I2C, SPI) may add length or checksum headers, but 785 653 * those are implementation-dependent and not defined here. 654 + * 655 + * All commands MUST be #defined to be 4-digit UPPER CASE hex values 656 + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 786 657 */ 787 658 788 659 /*****************************************************************************/ ··· 925 530 * Get protocol version, used to deal with non-backward compatible protocol 926 531 * changes. 927 532 */ 928 - #define EC_CMD_PROTO_VERSION 0x00 533 + #define EC_CMD_PROTO_VERSION 0x0000 929 534 930 535 /** 931 536 * struct ec_response_proto_version - Response to the proto version command. ··· 933 538 */ 934 539 struct ec_response_proto_version { 935 540 uint32_t version; 936 - } __packed; 541 + } __ec_align4; 937 542 938 543 /* 939 544 * Hello. This is a simple command to test the EC is responsive to 940 545 * commands. 941 546 */ 942 - #define EC_CMD_HELLO 0x01 547 + #define EC_CMD_HELLO 0x0001 943 548 944 549 /** 945 550 * struct ec_params_hello - Parameters to the hello command. ··· 947 552 */ 948 553 struct ec_params_hello { 949 554 uint32_t in_data; 950 - } __packed; 555 + } __ec_align4; 951 556 952 557 /** 953 558 * struct ec_response_hello - Response to the hello command. ··· 955 560 */ 956 561 struct ec_response_hello { 957 562 uint32_t out_data; 958 - } __packed; 563 + } __ec_align4; 959 564 960 565 /* Get version number */ 961 - #define EC_CMD_GET_VERSION 0x02 566 + #define EC_CMD_GET_VERSION 0x0002 962 567 963 568 enum ec_current_image { 964 569 EC_IMAGE_UNKNOWN = 0, ··· 978 583 char version_string_rw[32]; 979 584 char reserved[32]; 980 585 uint32_t current_image; 981 - } __packed; 586 + } __ec_align4; 982 587 983 588 /* Read test */ 984 - #define EC_CMD_READ_TEST 0x03 589 + #define EC_CMD_READ_TEST 0x0003 985 590 986 591 /** 987 592 * struct ec_params_read_test - Parameters for the read test command. ··· 991 596 struct ec_params_read_test { 992 597 uint32_t offset; 993 598 uint32_t size; 994 - } __packed; 599 + } __ec_align4; 995 600 996 601 /** 997 602 * struct ec_response_read_test - Response to the read test command. ··· 999 604 */ 1000 605 struct ec_response_read_test { 1001 606 uint32_t data[32]; 1002 - } __packed; 607 + } __ec_align4; 1003 608 1004 609 /* 1005 610 * Get build information 1006 611 * 1007 612 * Response is null-terminated string. 1008 613 */ 1009 - #define EC_CMD_GET_BUILD_INFO 0x04 614 + #define EC_CMD_GET_BUILD_INFO 0x0004 1010 615 1011 616 /* Get chip info */ 1012 - #define EC_CMD_GET_CHIP_INFO 0x05 617 + #define EC_CMD_GET_CHIP_INFO 0x0005 1013 618 1014 619 /** 1015 620 * struct ec_response_get_chip_info - Response to the get chip info command. ··· 1021 626 char vendor[32]; 1022 627 char name[32]; 1023 628 char revision[32]; 1024 - } __packed; 629 + } __ec_align4; 1025 630 1026 631 /* Get board HW version */ 1027 - #define EC_CMD_GET_BOARD_VERSION 0x06 632 + #define EC_CMD_GET_BOARD_VERSION 0x0006 1028 633 1029 634 /** 1030 635 * struct ec_response_board_version - Response to the board version command. ··· 1032 637 */ 1033 638 struct ec_response_board_version { 1034 639 uint16_t board_version; 1035 - } __packed; 640 + } __ec_align2; 1036 641 1037 642 /* 1038 643 * Read memory-mapped data. ··· 1042 647 * 1043 648 * Response is params.size bytes of data. 1044 649 */ 1045 - #define EC_CMD_READ_MEMMAP 0x07 650 + #define EC_CMD_READ_MEMMAP 0x0007 1046 651 1047 652 /** 1048 653 * struct ec_params_read_memmap - Parameters for the read memory map command. ··· 1052 657 struct ec_params_read_memmap { 1053 658 uint8_t offset; 1054 659 uint8_t size; 1055 - } __packed; 660 + } __ec_align1; 1056 661 1057 662 /* Read versions supported for a command */ 1058 - #define EC_CMD_GET_CMD_VERSIONS 0x08 663 + #define EC_CMD_GET_CMD_VERSIONS 0x0008 1059 664 1060 665 /** 1061 666 * struct ec_params_get_cmd_versions - Parameters for the get command versions. ··· 1063 668 */ 1064 669 struct ec_params_get_cmd_versions { 1065 670 uint8_t cmd; 1066 - } __packed; 671 + } __ec_align1; 1067 672 1068 673 /** 1069 674 * struct ec_params_get_cmd_versions_v1 - Parameters for the get command ··· 1072 677 */ 1073 678 struct ec_params_get_cmd_versions_v1 { 1074 679 uint16_t cmd; 1075 - } __packed; 680 + } __ec_align2; 1076 681 1077 682 /** 1078 683 * struct ec_response_get_cmd_version - Response to the get command versions. ··· 1081 686 */ 1082 687 struct ec_response_get_cmd_versions { 1083 688 uint32_t version_mask; 1084 - } __packed; 689 + } __ec_align4; 1085 690 1086 691 /* 1087 - * Check EC communcations status (busy). This is needed on i2c/spi but not 692 + * Check EC communications status (busy). This is needed on i2c/spi but not 1088 693 * on lpc since it has its own out-of-band busy indicator. 1089 694 * 1090 695 * lpc must read the status from the command register. Attempting this on 1091 696 * lpc will overwrite the args/parameter space and corrupt its data. 1092 697 */ 1093 - #define EC_CMD_GET_COMMS_STATUS 0x09 698 + #define EC_CMD_GET_COMMS_STATUS 0x0009 1094 699 1095 700 /* Avoid using ec_status which is for return values */ 1096 701 enum ec_comms_status { 1097 - EC_COMMS_STATUS_PROCESSING = 1 << 0, /* Processing cmd */ 702 + EC_COMMS_STATUS_PROCESSING = BIT(0), /* Processing cmd */ 1098 703 }; 1099 704 1100 705 /** ··· 1104 709 */ 1105 710 struct ec_response_get_comms_status { 1106 711 uint32_t flags; /* Mask of enum ec_comms_status */ 1107 - } __packed; 712 + } __ec_align4; 1108 713 1109 714 /* Fake a variety of responses, purely for testing purposes. */ 1110 - #define EC_CMD_TEST_PROTOCOL 0x0a 715 + #define EC_CMD_TEST_PROTOCOL 0x000A 1111 716 1112 717 /* Tell the EC what to send back to us. */ 1113 718 struct ec_params_test_protocol { 1114 719 uint32_t ec_result; 1115 720 uint32_t ret_len; 1116 721 uint8_t buf[32]; 1117 - } __packed; 722 + } __ec_align4; 1118 723 1119 724 /* Here it comes... */ 1120 725 struct ec_response_test_protocol { 1121 726 uint8_t buf[32]; 1122 - } __packed; 727 + } __ec_align4; 1123 728 1124 - /* Get prococol information */ 1125 - #define EC_CMD_GET_PROTOCOL_INFO 0x0b 729 + /* Get protocol information */ 730 + #define EC_CMD_GET_PROTOCOL_INFO 0x000B 1126 731 1127 732 /* Flags for ec_response_get_protocol_info.flags */ 1128 733 /* EC_RES_IN_PROGRESS may be returned if a command is slow */ 1129 - #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED (1 << 0) 734 + #define EC_PROTOCOL_INFO_IN_PROGRESS_SUPPORTED BIT(0) 1130 735 1131 736 /** 1132 737 * struct ec_response_get_protocol_info - Response to the get protocol info. ··· 1142 747 uint16_t max_request_packet_size; 1143 748 uint16_t max_response_packet_size; 1144 749 uint32_t flags; 1145 - } __packed; 750 + } __ec_align4; 1146 751 1147 752 1148 753 /*****************************************************************************/ ··· 1160 765 struct ec_params_get_set_value { 1161 766 uint32_t flags; 1162 767 uint32_t value; 1163 - } __packed; 768 + } __ec_align4; 1164 769 1165 770 struct ec_response_get_set_value { 1166 771 uint32_t flags; 1167 772 uint32_t value; 1168 - } __packed; 773 + } __ec_align4; 1169 774 1170 - /* More than one command can use these structs to get/set paramters. */ 1171 - #define EC_CMD_GSV_PAUSE_IN_S5 0x0c 775 + /* More than one command can use these structs to get/set parameters. */ 776 + #define EC_CMD_GSV_PAUSE_IN_S5 0x000C 1172 777 1173 778 /*****************************************************************************/ 1174 779 /* List the features supported by the firmware */ 1175 - #define EC_CMD_GET_FEATURES 0x0d 780 + #define EC_CMD_GET_FEATURES 0x000D 1176 781 1177 782 /* Supported features */ 1178 783 enum ec_feature_code { ··· 1279 884 EC_FEATURE_REFINED_TABLET_MODE_HYSTERESIS = 37, 1280 885 /* EC supports audio codec. */ 1281 886 EC_FEATURE_AUDIO_CODEC = 38, 1282 - /* EC Supports SCP. */ 887 + /* The MCU is a System Companion Processor (SCP). */ 1283 888 EC_FEATURE_SCP = 39, 1284 889 /* The MCU is an Integrated Sensor Hub */ 1285 890 EC_FEATURE_ISH = 40, 1286 891 }; 1287 892 1288 - #define EC_FEATURE_MASK_0(event_code) (1UL << (event_code % 32)) 1289 - #define EC_FEATURE_MASK_1(event_code) (1UL << (event_code - 32)) 893 + #define EC_FEATURE_MASK_0(event_code) BIT(event_code % 32) 894 + #define EC_FEATURE_MASK_1(event_code) BIT(event_code - 32) 1290 895 1291 896 struct ec_response_get_features { 1292 897 uint32_t flags[2]; 1293 - } __packed; 898 + } __ec_align4; 899 + 900 + /*****************************************************************************/ 901 + /* Get the board's SKU ID from EC */ 902 + #define EC_CMD_GET_SKU_ID 0x000E 903 + 904 + /* Set SKU ID from AP */ 905 + #define EC_CMD_SET_SKU_ID 0x000F 906 + 907 + struct ec_sku_id_info { 908 + uint32_t sku_id; 909 + } __ec_align4; 1294 910 1295 911 /*****************************************************************************/ 1296 912 /* Flash commands */ 1297 913 1298 914 /* Get flash info */ 1299 - #define EC_CMD_FLASH_INFO 0x10 915 + #define EC_CMD_FLASH_INFO 0x0010 916 + #define EC_VER_FLASH_INFO 2 1300 917 1301 918 /** 1302 919 * struct ec_response_flash_info - Response to the flash info command. ··· 1327 920 uint32_t write_block_size; 1328 921 uint32_t erase_block_size; 1329 922 uint32_t protect_block_size; 1330 - } __packed; 923 + } __ec_align4; 1331 924 1332 - /* Flags for version 1+ flash info command */ 1333 - /* EC flash erases bits to 0 instead of 1 */ 1334 - #define EC_FLASH_INFO_ERASE_TO_0 (1 << 0) 925 + /* 926 + * Flags for version 1+ flash info command 927 + * EC flash erases bits to 0 instead of 1. 928 + */ 929 + #define EC_FLASH_INFO_ERASE_TO_0 BIT(0) 930 + 931 + /* 932 + * Flash must be selected for read/write/erase operations to succeed. This may 933 + * be necessary on a chip where write/erase can be corrupted by other board 934 + * activity, or where the chip needs to enable some sort of programming voltage, 935 + * or where the read/write/erase operations require cleanly suspending other 936 + * chip functionality. 937 + */ 938 + #define EC_FLASH_INFO_SELECT_REQUIRED BIT(1) 1335 939 1336 940 /** 1337 941 * struct ec_response_flash_info_1 - Response to the flash info v1 command. ··· 1364 946 * fields following. 1365 947 * 1366 948 * gcc anonymous structs don't seem to get along with the __packed directive; 1367 - * if they did we'd define the version 0 struct as a sub-struct of this one. 949 + * if they did we'd define the version 0 structure as a sub-structure of this 950 + * one. 951 + * 952 + * Version 2 supports flash banks of different sizes: 953 + * The caller specified the number of banks it has preallocated 954 + * (num_banks_desc) 955 + * The EC returns the number of banks describing the flash memory. 956 + * It adds banks descriptions up to num_banks_desc. 1368 957 */ 1369 958 struct ec_response_flash_info_1 { 1370 959 /* Version 0 fields; see above for description */ ··· 1383 958 /* Version 1 adds these fields: */ 1384 959 uint32_t write_ideal_size; 1385 960 uint32_t flags; 1386 - } __packed; 961 + } __ec_align4; 962 + 963 + struct ec_params_flash_info_2 { 964 + /* Number of banks to describe */ 965 + uint16_t num_banks_desc; 966 + /* Reserved; set 0; ignore on read */ 967 + uint8_t reserved[2]; 968 + } __ec_align4; 969 + 970 + struct ec_flash_bank { 971 + /* Number of sector is in this bank. */ 972 + uint16_t count; 973 + /* Size in power of 2 of each sector (8 --> 256 bytes) */ 974 + uint8_t size_exp; 975 + /* Minimal write size for the sectors in this bank */ 976 + uint8_t write_size_exp; 977 + /* Erase size for the sectors in this bank */ 978 + uint8_t erase_size_exp; 979 + /* Size for write protection, usually identical to erase size. */ 980 + uint8_t protect_size_exp; 981 + /* Reserved; set 0; ignore on read */ 982 + uint8_t reserved[2]; 983 + }; 984 + 985 + struct ec_response_flash_info_2 { 986 + /* Total flash in the EC. */ 987 + uint32_t flash_size; 988 + /* Flags; see EC_FLASH_INFO_* */ 989 + uint32_t flags; 990 + /* Maximum size to use to send data to write to the EC. */ 991 + uint32_t write_ideal_size; 992 + /* Number of banks present in the EC. */ 993 + uint16_t num_banks_total; 994 + /* Number of banks described in banks array. */ 995 + uint16_t num_banks_desc; 996 + struct ec_flash_bank banks[0]; 997 + } __ec_align4; 1387 998 1388 999 /* 1389 1000 * Read flash 1390 1001 * 1391 1002 * Response is params.size bytes of data. 1392 1003 */ 1393 - #define EC_CMD_FLASH_READ 0x11 1004 + #define EC_CMD_FLASH_READ 0x0011 1394 1005 1395 1006 /** 1396 1007 * struct ec_params_flash_read - Parameters for the flash read command. ··· 1436 975 struct ec_params_flash_read { 1437 976 uint32_t offset; 1438 977 uint32_t size; 1439 - } __packed; 978 + } __ec_align4; 1440 979 1441 980 /* Write flash */ 1442 - #define EC_CMD_FLASH_WRITE 0x12 981 + #define EC_CMD_FLASH_WRITE 0x0012 1443 982 #define EC_VER_FLASH_WRITE 1 1444 983 1445 984 /* Version 0 of the flash command supported only 64 bytes of data */ ··· 1454 993 uint32_t offset; 1455 994 uint32_t size; 1456 995 /* Followed by data to write */ 1457 - } __packed; 996 + } __ec_align4; 1458 997 1459 998 /* Erase flash */ 1460 - #define EC_CMD_FLASH_ERASE 0x13 999 + #define EC_CMD_FLASH_ERASE 0x0013 1461 1000 1462 1001 /** 1463 - * struct ec_params_flash_erase - Parameters for the flash erase command. 1002 + * struct ec_params_flash_erase - Parameters for the flash erase command, v0. 1464 1003 * @offset: Byte offset to erase. 1465 1004 * @size: Size to erase in bytes. 1466 1005 */ 1467 1006 struct ec_params_flash_erase { 1468 1007 uint32_t offset; 1469 1008 uint32_t size; 1470 - } __packed; 1009 + } __ec_align4; 1010 + 1011 + /* 1012 + * v1 add async erase: 1013 + * subcommands can returns: 1014 + * EC_RES_SUCCESS : erased (see ERASE_SECTOR_ASYNC case below). 1015 + * EC_RES_INVALID_PARAM : offset/size are not aligned on a erase boundary. 1016 + * EC_RES_ERROR : other errors. 1017 + * EC_RES_BUSY : an existing erase operation is in progress. 1018 + * EC_RES_ACCESS_DENIED: Trying to erase running image. 1019 + * 1020 + * When ERASE_SECTOR_ASYNC returns EC_RES_SUCCESS, the operation is just 1021 + * properly queued. The user must call ERASE_GET_RESULT subcommand to get 1022 + * the proper result. 1023 + * When ERASE_GET_RESULT returns EC_RES_BUSY, the caller must wait and send 1024 + * ERASE_GET_RESULT again to get the result of ERASE_SECTOR_ASYNC. 1025 + * ERASE_GET_RESULT command may timeout on EC where flash access is not 1026 + * permitted while erasing. (For instance, STM32F4). 1027 + */ 1028 + enum ec_flash_erase_cmd { 1029 + FLASH_ERASE_SECTOR, /* Erase and wait for result */ 1030 + FLASH_ERASE_SECTOR_ASYNC, /* Erase and return immediately. */ 1031 + FLASH_ERASE_GET_RESULT, /* Ask for last erase result */ 1032 + }; 1033 + 1034 + /** 1035 + * struct ec_params_flash_erase_v1 - Parameters for the flash erase command, v1. 1036 + * @cmd: One of ec_flash_erase_cmd. 1037 + * @reserved: Pad byte; currently always contains 0. 1038 + * @flag: No flags defined yet; set to 0. 1039 + * @params: Same as v0 parameters. 1040 + */ 1041 + struct ec_params_flash_erase_v1 { 1042 + uint8_t cmd; 1043 + uint8_t reserved; 1044 + uint16_t flag; 1045 + struct ec_params_flash_erase params; 1046 + } __ec_align4; 1471 1047 1472 1048 /* 1473 1049 * Get/set flash protection. ··· 1516 1018 * 1517 1019 * If mask=0, simply returns the current flags state. 1518 1020 */ 1519 - #define EC_CMD_FLASH_PROTECT 0x15 1021 + #define EC_CMD_FLASH_PROTECT 0x0015 1520 1022 #define EC_VER_FLASH_PROTECT 1 /* Command version 1 */ 1521 1023 1522 1024 /* Flags for flash protection */ 1523 1025 /* RO flash code protected when the EC boots */ 1524 - #define EC_FLASH_PROTECT_RO_AT_BOOT (1 << 0) 1026 + #define EC_FLASH_PROTECT_RO_AT_BOOT BIT(0) 1525 1027 /* 1526 1028 * RO flash code protected now. If this bit is set, at-boot status cannot 1527 1029 * be changed. 1528 1030 */ 1529 - #define EC_FLASH_PROTECT_RO_NOW (1 << 1) 1031 + #define EC_FLASH_PROTECT_RO_NOW BIT(1) 1530 1032 /* Entire flash code protected now, until reboot. */ 1531 - #define EC_FLASH_PROTECT_ALL_NOW (1 << 2) 1033 + #define EC_FLASH_PROTECT_ALL_NOW BIT(2) 1532 1034 /* Flash write protect GPIO is asserted now */ 1533 - #define EC_FLASH_PROTECT_GPIO_ASSERTED (1 << 3) 1035 + #define EC_FLASH_PROTECT_GPIO_ASSERTED BIT(3) 1534 1036 /* Error - at least one bank of flash is stuck locked, and cannot be unlocked */ 1535 - #define EC_FLASH_PROTECT_ERROR_STUCK (1 << 4) 1037 + #define EC_FLASH_PROTECT_ERROR_STUCK BIT(4) 1536 1038 /* 1537 1039 * Error - flash protection is in inconsistent state. At least one bank of 1538 1040 * flash which should be protected is not protected. Usually fixed by 1539 1041 * re-requesting the desired flags, or by a hard reset if that fails. 1540 1042 */ 1541 - #define EC_FLASH_PROTECT_ERROR_INCONSISTENT (1 << 5) 1542 - /* Entile flash code protected when the EC boots */ 1543 - #define EC_FLASH_PROTECT_ALL_AT_BOOT (1 << 6) 1043 + #define EC_FLASH_PROTECT_ERROR_INCONSISTENT BIT(5) 1044 + /* Entire flash code protected when the EC boots */ 1045 + #define EC_FLASH_PROTECT_ALL_AT_BOOT BIT(6) 1046 + /* RW flash code protected when the EC boots */ 1047 + #define EC_FLASH_PROTECT_RW_AT_BOOT BIT(7) 1048 + /* RW flash code protected now. */ 1049 + #define EC_FLASH_PROTECT_RW_NOW BIT(8) 1050 + /* Rollback information flash region protected when the EC boots */ 1051 + #define EC_FLASH_PROTECT_ROLLBACK_AT_BOOT BIT(9) 1052 + /* Rollback information flash region protected now */ 1053 + #define EC_FLASH_PROTECT_ROLLBACK_NOW BIT(10) 1054 + 1544 1055 1545 1056 /** 1546 1057 * struct ec_params_flash_protect - Parameters for the flash protect command. ··· 1559 1052 struct ec_params_flash_protect { 1560 1053 uint32_t mask; 1561 1054 uint32_t flags; 1562 - } __packed; 1055 + } __ec_align4; 1563 1056 1564 1057 /** 1565 1058 * struct ec_response_flash_protect - Response to the flash protect command. ··· 1574 1067 uint32_t flags; 1575 1068 uint32_t valid_flags; 1576 1069 uint32_t writable_flags; 1577 - } __packed; 1070 + } __ec_align4; 1578 1071 1579 1072 /* 1580 1073 * Note: commands 0x14 - 0x19 version 0 were old commands to get/set flash ··· 1582 1075 */ 1583 1076 1584 1077 /* Get the region offset/size */ 1585 - #define EC_CMD_FLASH_REGION_INFO 0x16 1078 + #define EC_CMD_FLASH_REGION_INFO 0x0016 1586 1079 #define EC_VER_FLASH_REGION_INFO 1 1587 1080 1588 1081 enum ec_flash_region { 1589 1082 /* Region which holds read-only EC image */ 1590 1083 EC_FLASH_REGION_RO = 0, 1591 - /* Region which holds rewritable EC image */ 1592 - EC_FLASH_REGION_RW, 1084 + /* 1085 + * Region which holds active RW image. 'Active' is different from 1086 + * 'running'. Active means 'scheduled-to-run'. Since RO image always 1087 + * scheduled to run, active/non-active applies only to RW images (for 1088 + * the same reason 'update' applies only to RW images. It's a state of 1089 + * an image on a flash. Running image can be RO, RW_A, RW_B but active 1090 + * image can only be RW_A or RW_B. In recovery mode, an active RW image 1091 + * doesn't enter 'running' state but it's still active on a flash. 1092 + */ 1093 + EC_FLASH_REGION_ACTIVE, 1593 1094 /* 1594 1095 * Region which should be write-protected in the factory (a superset of 1595 1096 * EC_FLASH_REGION_RO) 1596 1097 */ 1597 1098 EC_FLASH_REGION_WP_RO, 1099 + /* Region which holds updatable (non-active) RW image */ 1100 + EC_FLASH_REGION_UPDATE, 1598 1101 /* Number of regions */ 1599 1102 EC_FLASH_REGION_COUNT, 1600 1103 }; 1104 + /* 1105 + * 'RW' is vague if there are multiple RW images; we mean the active one, 1106 + * so the old constant is deprecated. 1107 + */ 1108 + #define EC_FLASH_REGION_RW EC_FLASH_REGION_ACTIVE 1601 1109 1602 1110 /** 1603 1111 * struct ec_params_flash_region_info - Parameters for the flash region info ··· 1621 1099 */ 1622 1100 struct ec_params_flash_region_info { 1623 1101 uint32_t region; 1624 - } __packed; 1102 + } __ec_align4; 1625 1103 1626 1104 struct ec_response_flash_region_info { 1627 1105 uint32_t offset; 1628 1106 uint32_t size; 1629 - } __packed; 1107 + } __ec_align4; 1630 1108 1631 1109 /* Read/write VbNvContext */ 1632 - #define EC_CMD_VBNV_CONTEXT 0x17 1110 + #define EC_CMD_VBNV_CONTEXT 0x0017 1633 1111 #define EC_VER_VBNV_CONTEXT 1 1634 1112 #define EC_VBNV_BLOCK_SIZE 16 1635 1113 ··· 1641 1119 struct ec_params_vbnvcontext { 1642 1120 uint32_t op; 1643 1121 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1644 - } __packed; 1122 + } __ec_align4; 1645 1123 1646 1124 struct ec_response_vbnvcontext { 1647 1125 uint8_t block[EC_VBNV_BLOCK_SIZE]; 1648 - } __packed; 1126 + } __ec_align4; 1127 + 1128 + 1129 + /* Get SPI flash information */ 1130 + #define EC_CMD_FLASH_SPI_INFO 0x0018 1131 + 1132 + struct ec_response_flash_spi_info { 1133 + /* JEDEC info from command 0x9F (manufacturer, memory type, size) */ 1134 + uint8_t jedec[3]; 1135 + 1136 + /* Pad byte; currently always contains 0 */ 1137 + uint8_t reserved0; 1138 + 1139 + /* Manufacturer / device ID from command 0x90 */ 1140 + uint8_t mfr_dev_id[2]; 1141 + 1142 + /* Status registers from command 0x05 and 0x35 */ 1143 + uint8_t sr1, sr2; 1144 + } __ec_align1; 1145 + 1146 + 1147 + /* Select flash during flash operations */ 1148 + #define EC_CMD_FLASH_SELECT 0x0019 1149 + 1150 + /** 1151 + * struct ec_params_flash_select - Parameters for the flash select command. 1152 + * @select: 1 to select flash, 0 to deselect flash 1153 + */ 1154 + struct ec_params_flash_select { 1155 + uint8_t select; 1156 + } __ec_align4; 1157 + 1649 1158 1650 1159 /*****************************************************************************/ 1651 1160 /* PWM commands */ 1652 1161 1653 1162 /* Get fan target RPM */ 1654 - #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x20 1163 + #define EC_CMD_PWM_GET_FAN_TARGET_RPM 0x0020 1655 1164 1656 1165 struct ec_response_pwm_get_fan_rpm { 1657 1166 uint32_t rpm; 1658 - } __packed; 1167 + } __ec_align4; 1659 1168 1660 1169 /* Set target fan RPM */ 1661 - #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x21 1170 + #define EC_CMD_PWM_SET_FAN_TARGET_RPM 0x0021 1662 1171 1663 - struct ec_params_pwm_set_fan_target_rpm { 1172 + /* Version 0 of input params */ 1173 + struct ec_params_pwm_set_fan_target_rpm_v0 { 1664 1174 uint32_t rpm; 1665 - } __packed; 1175 + } __ec_align4; 1176 + 1177 + /* Version 1 of input params */ 1178 + struct ec_params_pwm_set_fan_target_rpm_v1 { 1179 + uint32_t rpm; 1180 + uint8_t fan_idx; 1181 + } __ec_align_size1; 1666 1182 1667 1183 /* Get keyboard backlight */ 1668 - #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x22 1184 + /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1185 + #define EC_CMD_PWM_GET_KEYBOARD_BACKLIGHT 0x0022 1669 1186 1670 1187 struct ec_response_pwm_get_keyboard_backlight { 1671 1188 uint8_t percent; 1672 1189 uint8_t enabled; 1673 - } __packed; 1190 + } __ec_align1; 1674 1191 1675 1192 /* Set keyboard backlight */ 1676 - #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x23 1193 + /* OBSOLETE - Use EC_CMD_PWM_SET_DUTY */ 1194 + #define EC_CMD_PWM_SET_KEYBOARD_BACKLIGHT 0x0023 1677 1195 1678 1196 struct ec_params_pwm_set_keyboard_backlight { 1679 1197 uint8_t percent; 1680 - } __packed; 1198 + } __ec_align1; 1681 1199 1682 1200 /* Set target fan PWM duty cycle */ 1683 - #define EC_CMD_PWM_SET_FAN_DUTY 0x24 1201 + #define EC_CMD_PWM_SET_FAN_DUTY 0x0024 1684 1202 1685 - struct ec_params_pwm_set_fan_duty { 1203 + /* Version 0 of input params */ 1204 + struct ec_params_pwm_set_fan_duty_v0 { 1686 1205 uint32_t percent; 1687 - } __packed; 1206 + } __ec_align4; 1688 1207 1689 - #define EC_CMD_PWM_SET_DUTY 0x25 1208 + /* Version 1 of input params */ 1209 + struct ec_params_pwm_set_fan_duty_v1 { 1210 + uint32_t percent; 1211 + uint8_t fan_idx; 1212 + } __ec_align_size1; 1213 + 1214 + #define EC_CMD_PWM_SET_DUTY 0x0025 1690 1215 /* 16 bit duty cycle, 0xffff = 100% */ 1691 1216 #define EC_PWM_MAX_DUTY 0xffff 1692 1217 ··· 1751 1182 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1752 1183 uint8_t pwm_type; /* ec_pwm_type */ 1753 1184 uint8_t index; /* Type-specific index, or 0 if unique */ 1754 - } __packed; 1185 + } __ec_align4; 1755 1186 1756 - #define EC_CMD_PWM_GET_DUTY 0x26 1187 + #define EC_CMD_PWM_GET_DUTY 0x0026 1757 1188 1758 1189 struct ec_params_pwm_get_duty { 1759 1190 uint8_t pwm_type; /* ec_pwm_type */ 1760 1191 uint8_t index; /* Type-specific index, or 0 if unique */ 1761 - } __packed; 1192 + } __ec_align1; 1762 1193 1763 1194 struct ec_response_pwm_get_duty { 1764 1195 uint16_t duty; /* Duty cycle, EC_PWM_MAX_DUTY = 100% */ 1765 - } __packed; 1196 + } __ec_align2; 1766 1197 1767 1198 /*****************************************************************************/ 1768 1199 /* ··· 1771 1202 * into a subcommand. We'll make separate structs for subcommands with 1772 1203 * different input args, so that we know how much to expect. 1773 1204 */ 1774 - #define EC_CMD_LIGHTBAR_CMD 0x28 1205 + #define EC_CMD_LIGHTBAR_CMD 0x0028 1775 1206 1776 1207 struct rgb_s { 1777 1208 uint8_t r, g, b; 1778 - }; 1209 + } __ec_todo_unpacked; 1779 1210 1780 1211 #define LB_BATTERY_LEVELS 4 1781 1212 ··· 1815 1246 1816 1247 /* Color palette */ 1817 1248 struct rgb_s color[8]; /* 0-3 are Google colors */ 1818 - } __packed; 1249 + } __ec_todo_packed; 1819 1250 1820 1251 struct lightbar_params_v1 { 1821 1252 /* Timing */ ··· 1828 1259 int32_t s3_sleep_for; 1829 1260 int32_t s3_ramp_up; 1830 1261 int32_t s3_ramp_down; 1262 + int32_t s5_ramp_up; 1263 + int32_t s5_ramp_down; 1831 1264 int32_t tap_tick_delay; 1265 + int32_t tap_gate_delay; 1832 1266 int32_t tap_display_time; 1833 1267 1834 1268 /* Tap-for-battery params */ ··· 1859 1287 uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1860 1288 uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1861 1289 1290 + /* s5: single color pulse on inhibited power-up */ 1291 + uint8_t s5_idx; 1292 + 1862 1293 /* Color palette */ 1863 1294 struct rgb_s color[8]; /* 0-3 are Google colors */ 1864 - } __packed; 1295 + } __ec_todo_packed; 1865 1296 1866 - /* Lightbar program */ 1297 + /* Lightbar command params v2 1298 + * crbug.com/467716 1299 + * 1300 + * lightbar_parms_v1 was too big for i2c, therefore in v2, we split them up by 1301 + * logical groups to make it more manageable ( < 120 bytes). 1302 + * 1303 + * NOTE: Each of these groups must be less than 120 bytes. 1304 + */ 1305 + 1306 + struct lightbar_params_v2_timing { 1307 + /* Timing */ 1308 + int32_t google_ramp_up; 1309 + int32_t google_ramp_down; 1310 + int32_t s3s0_ramp_up; 1311 + int32_t s0_tick_delay[2]; /* AC=0/1 */ 1312 + int32_t s0a_tick_delay[2]; /* AC=0/1 */ 1313 + int32_t s0s3_ramp_down; 1314 + int32_t s3_sleep_for; 1315 + int32_t s3_ramp_up; 1316 + int32_t s3_ramp_down; 1317 + int32_t s5_ramp_up; 1318 + int32_t s5_ramp_down; 1319 + int32_t tap_tick_delay; 1320 + int32_t tap_gate_delay; 1321 + int32_t tap_display_time; 1322 + } __ec_todo_packed; 1323 + 1324 + struct lightbar_params_v2_tap { 1325 + /* Tap-for-battery params */ 1326 + uint8_t tap_pct_red; 1327 + uint8_t tap_pct_green; 1328 + uint8_t tap_seg_min_on; 1329 + uint8_t tap_seg_max_on; 1330 + uint8_t tap_seg_osc; 1331 + uint8_t tap_idx[3]; 1332 + } __ec_todo_packed; 1333 + 1334 + struct lightbar_params_v2_oscillation { 1335 + /* Oscillation */ 1336 + uint8_t osc_min[2]; /* AC=0/1 */ 1337 + uint8_t osc_max[2]; /* AC=0/1 */ 1338 + uint8_t w_ofs[2]; /* AC=0/1 */ 1339 + } __ec_todo_packed; 1340 + 1341 + struct lightbar_params_v2_brightness { 1342 + /* Brightness limits based on the backlight and AC. */ 1343 + uint8_t bright_bl_off_fixed[2]; /* AC=0/1 */ 1344 + uint8_t bright_bl_on_min[2]; /* AC=0/1 */ 1345 + uint8_t bright_bl_on_max[2]; /* AC=0/1 */ 1346 + } __ec_todo_packed; 1347 + 1348 + struct lightbar_params_v2_thresholds { 1349 + /* Battery level thresholds */ 1350 + uint8_t battery_threshold[LB_BATTERY_LEVELS - 1]; 1351 + } __ec_todo_packed; 1352 + 1353 + struct lightbar_params_v2_colors { 1354 + /* Map [AC][battery_level] to color index */ 1355 + uint8_t s0_idx[2][LB_BATTERY_LEVELS]; /* AP is running */ 1356 + uint8_t s3_idx[2][LB_BATTERY_LEVELS]; /* AP is sleeping */ 1357 + 1358 + /* s5: single color pulse on inhibited power-up */ 1359 + uint8_t s5_idx; 1360 + 1361 + /* Color palette */ 1362 + struct rgb_s color[8]; /* 0-3 are Google colors */ 1363 + } __ec_todo_packed; 1364 + 1365 + /* Lightbar program. */ 1867 1366 #define EC_LB_PROG_LEN 192 1868 1367 struct lightbar_program { 1869 1368 uint8_t size; 1870 1369 uint8_t data[EC_LB_PROG_LEN]; 1871 - }; 1370 + } __ec_todo_unpacked; 1872 1371 1873 1372 struct ec_params_lightbar { 1874 1373 uint8_t cmd; /* Command (see enum lightbar_command) */ 1875 1374 union { 1876 - struct { 1877 - /* no args */ 1878 - } dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1879 - version, get_brightness, get_demo, suspend, resume; 1375 + /* 1376 + * The following commands have no args: 1377 + * 1378 + * dump, off, on, init, get_seq, get_params_v0, get_params_v1, 1379 + * version, get_brightness, get_demo, suspend, resume, 1380 + * get_params_v2_timing, get_params_v2_tap, get_params_v2_osc, 1381 + * get_params_v2_bright, get_params_v2_thlds, 1382 + * get_params_v2_colors 1383 + * 1384 + * Don't use an empty struct, because C++ hates that. 1385 + */ 1880 1386 1881 - struct { 1387 + struct __ec_todo_unpacked { 1882 1388 uint8_t num; 1883 1389 } set_brightness, seq, demo; 1884 1390 1885 - struct { 1391 + struct __ec_todo_unpacked { 1886 1392 uint8_t ctrl, reg, value; 1887 1393 } reg; 1888 1394 1889 - struct { 1395 + struct __ec_todo_unpacked { 1890 1396 uint8_t led, red, green, blue; 1891 1397 } set_rgb; 1892 1398 1893 - struct { 1399 + struct __ec_todo_unpacked { 1894 1400 uint8_t led; 1895 1401 } get_rgb; 1896 1402 1897 - struct { 1403 + struct __ec_todo_unpacked { 1898 1404 uint8_t enable; 1899 1405 } manual_suspend_ctrl; 1900 1406 1901 1407 struct lightbar_params_v0 set_params_v0; 1902 1408 struct lightbar_params_v1 set_params_v1; 1409 + 1410 + struct lightbar_params_v2_timing set_v2par_timing; 1411 + struct lightbar_params_v2_tap set_v2par_tap; 1412 + struct lightbar_params_v2_oscillation set_v2par_osc; 1413 + struct lightbar_params_v2_brightness set_v2par_bright; 1414 + struct lightbar_params_v2_thresholds set_v2par_thlds; 1415 + struct lightbar_params_v2_colors set_v2par_colors; 1416 + 1903 1417 struct lightbar_program set_program; 1904 1418 }; 1905 - } __packed; 1419 + } __ec_todo_packed; 1906 1420 1907 1421 struct ec_response_lightbar { 1908 1422 union { 1909 - struct { 1910 - struct { 1423 + struct __ec_todo_unpacked { 1424 + struct __ec_todo_unpacked { 1911 1425 uint8_t reg; 1912 1426 uint8_t ic0; 1913 1427 uint8_t ic1; 1914 1428 } vals[23]; 1915 1429 } dump; 1916 1430 1917 - struct { 1431 + struct __ec_todo_unpacked { 1918 1432 uint8_t num; 1919 1433 } get_seq, get_brightness, get_demo; 1920 1434 1921 1435 struct lightbar_params_v0 get_params_v0; 1922 1436 struct lightbar_params_v1 get_params_v1; 1923 1437 1924 - struct { 1438 + 1439 + struct lightbar_params_v2_timing get_params_v2_timing; 1440 + struct lightbar_params_v2_tap get_params_v2_tap; 1441 + struct lightbar_params_v2_oscillation get_params_v2_osc; 1442 + struct lightbar_params_v2_brightness get_params_v2_bright; 1443 + struct lightbar_params_v2_thresholds get_params_v2_thlds; 1444 + struct lightbar_params_v2_colors get_params_v2_colors; 1445 + 1446 + struct __ec_todo_unpacked { 1925 1447 uint32_t num; 1926 1448 uint32_t flags; 1927 1449 } version; 1928 1450 1929 - struct { 1451 + struct __ec_todo_unpacked { 1930 1452 uint8_t red, green, blue; 1931 1453 } get_rgb; 1932 1454 1933 - struct { 1934 - /* no return params */ 1935 - } off, on, init, set_brightness, seq, reg, set_rgb, 1936 - demo, set_params_v0, set_params_v1, 1937 - set_program, manual_suspend_ctrl, suspend, resume; 1455 + /* 1456 + * The following commands have no response: 1457 + * 1458 + * off, on, init, set_brightness, seq, reg, set_rgb, demo, 1459 + * set_params_v0, set_params_v1, set_program, 1460 + * manual_suspend_ctrl, suspend, resume, set_v2par_timing, 1461 + * set_v2par_tap, set_v2par_osc, set_v2par_bright, 1462 + * set_v2par_thlds, set_v2par_colors 1463 + */ 1938 1464 }; 1939 - } __packed; 1465 + } __ec_todo_packed; 1940 1466 1941 1467 /* Lightbar commands */ 1942 1468 enum lightbar_command { ··· 2060 1390 LIGHTBAR_CMD_MANUAL_SUSPEND_CTRL = 19, 2061 1391 LIGHTBAR_CMD_SUSPEND = 20, 2062 1392 LIGHTBAR_CMD_RESUME = 21, 1393 + LIGHTBAR_CMD_GET_PARAMS_V2_TIMING = 22, 1394 + LIGHTBAR_CMD_SET_PARAMS_V2_TIMING = 23, 1395 + LIGHTBAR_CMD_GET_PARAMS_V2_TAP = 24, 1396 + LIGHTBAR_CMD_SET_PARAMS_V2_TAP = 25, 1397 + LIGHTBAR_CMD_GET_PARAMS_V2_OSCILLATION = 26, 1398 + LIGHTBAR_CMD_SET_PARAMS_V2_OSCILLATION = 27, 1399 + LIGHTBAR_CMD_GET_PARAMS_V2_BRIGHTNESS = 28, 1400 + LIGHTBAR_CMD_SET_PARAMS_V2_BRIGHTNESS = 29, 1401 + LIGHTBAR_CMD_GET_PARAMS_V2_THRESHOLDS = 30, 1402 + LIGHTBAR_CMD_SET_PARAMS_V2_THRESHOLDS = 31, 1403 + LIGHTBAR_CMD_GET_PARAMS_V2_COLORS = 32, 1404 + LIGHTBAR_CMD_SET_PARAMS_V2_COLORS = 33, 2063 1405 LIGHTBAR_NUM_CMDS 2064 1406 }; 2065 1407 2066 1408 /*****************************************************************************/ 2067 1409 /* LED control commands */ 2068 1410 2069 - #define EC_CMD_LED_CONTROL 0x29 1411 + #define EC_CMD_LED_CONTROL 0x0029 2070 1412 2071 1413 enum ec_led_id { 2072 1414 /* LED to indicate battery state of charge */ ··· 2090 1408 EC_LED_ID_POWER_LED, 2091 1409 /* LED on power adapter or its plug */ 2092 1410 EC_LED_ID_ADAPTER_LED, 1411 + /* LED to indicate left side */ 1412 + EC_LED_ID_LEFT_LED, 1413 + /* LED to indicate right side */ 1414 + EC_LED_ID_RIGHT_LED, 1415 + /* LED to indicate recovery mode with HW_REINIT */ 1416 + EC_LED_ID_RECOVERY_HW_REINIT_LED, 1417 + /* LED to indicate sysrq debug mode. */ 1418 + EC_LED_ID_SYSRQ_DEBUG_LED, 2093 1419 2094 1420 EC_LED_ID_COUNT 2095 1421 }; 2096 1422 2097 1423 /* LED control flags */ 2098 - #define EC_LED_FLAGS_QUERY (1 << 0) /* Query LED capability only */ 2099 - #define EC_LED_FLAGS_AUTO (1 << 1) /* Switch LED back to automatic control */ 1424 + #define EC_LED_FLAGS_QUERY BIT(0) /* Query LED capability only */ 1425 + #define EC_LED_FLAGS_AUTO BIT(1) /* Switch LED back to automatic control */ 2100 1426 2101 1427 enum ec_led_colors { 2102 1428 EC_LED_COLOR_RED = 0, ··· 2112 1422 EC_LED_COLOR_BLUE, 2113 1423 EC_LED_COLOR_YELLOW, 2114 1424 EC_LED_COLOR_WHITE, 1425 + EC_LED_COLOR_AMBER, 2115 1426 2116 1427 EC_LED_COLOR_COUNT 2117 1428 }; ··· 2122 1431 uint8_t flags; /* Control flags */ 2123 1432 2124 1433 uint8_t brightness[EC_LED_COLOR_COUNT]; 2125 - } __packed; 1434 + } __ec_align1; 2126 1435 2127 1436 struct ec_response_led_control { 2128 1437 /* ··· 2133 1442 * Other values means the LED is control by PWM. 2134 1443 */ 2135 1444 uint8_t brightness_range[EC_LED_COLOR_COUNT]; 2136 - } __packed; 1445 + } __ec_align1; 2137 1446 2138 1447 /*****************************************************************************/ 2139 1448 /* Verified boot commands */ ··· 2144 1453 */ 2145 1454 2146 1455 /* Verified boot hash command */ 2147 - #define EC_CMD_VBOOT_HASH 0x2A 1456 + #define EC_CMD_VBOOT_HASH 0x002A 2148 1457 2149 1458 struct ec_params_vboot_hash { 2150 1459 uint8_t cmd; /* enum ec_vboot_hash_cmd */ ··· 2154 1463 uint32_t offset; /* Offset in flash to hash */ 2155 1464 uint32_t size; /* Number of bytes to hash */ 2156 1465 uint8_t nonce_data[64]; /* Nonce data; ignored if nonce_size=0 */ 2157 - } __packed; 1466 + } __ec_align4; 2158 1467 2159 1468 struct ec_response_vboot_hash { 2160 1469 uint8_t status; /* enum ec_vboot_hash_status */ ··· 2164 1473 uint32_t offset; /* Offset in flash which was hashed */ 2165 1474 uint32_t size; /* Number of bytes hashed */ 2166 1475 uint8_t hash_digest[64]; /* Hash digest data */ 2167 - } __packed; 1476 + } __ec_align4; 2168 1477 2169 1478 enum ec_vboot_hash_cmd { 2170 1479 EC_VBOOT_HASH_GET = 0, /* Get current hash status */ ··· 2188 1497 * If one of these is specified, the EC will automatically update offset and 2189 1498 * size to the correct values for the specified image (RO or RW). 2190 1499 */ 2191 - #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 2192 - #define EC_VBOOT_HASH_OFFSET_RW 0xfffffffd 1500 + #define EC_VBOOT_HASH_OFFSET_RO 0xfffffffe 1501 + #define EC_VBOOT_HASH_OFFSET_ACTIVE 0xfffffffd 1502 + #define EC_VBOOT_HASH_OFFSET_UPDATE 0xfffffffc 1503 + 1504 + /* 1505 + * 'RW' is vague if there are multiple RW images; we mean the active one, 1506 + * so the old constant is deprecated. 1507 + */ 1508 + #define EC_VBOOT_HASH_OFFSET_RW EC_VBOOT_HASH_OFFSET_ACTIVE 2193 1509 2194 1510 /*****************************************************************************/ 2195 1511 /* 2196 1512 * Motion sense commands. We'll make separate structs for sub-commands with 2197 1513 * different input args, so that we know how much to expect. 2198 1514 */ 2199 - #define EC_CMD_MOTION_SENSE_CMD 0x2B 1515 + #define EC_CMD_MOTION_SENSE_CMD 0x002B 2200 1516 2201 1517 /* Motion sense commands */ 2202 1518 enum motionsense_command { ··· 2222 1524 2223 1525 /* 2224 1526 * EC Rate command is a setter/getter command for the EC sampling rate 2225 - * of all motion sensors in milliseconds. 1527 + * in milliseconds. 1528 + * It is per sensor, the EC run sample task at the minimum of all 1529 + * sensors EC_RATE. 1530 + * For sensors without hardware FIFO, EC_RATE should be equals to 1/ODR 1531 + * to collect all the sensor samples. 1532 + * For sensor with hardware FIFO, EC_RATE is used as the maximal delay 1533 + * to process of all motion sensors in milliseconds. 2226 1534 */ 2227 1535 MOTIONSENSE_CMD_EC_RATE = 2, 2228 1536 ··· 2259 1555 MOTIONSENSE_CMD_DATA = 6, 2260 1556 2261 1557 /* 2262 - * Perform low level calibration.. On sensors that support it, ask to 2263 - * do offset calibration. 1558 + * Return sensor fifo info. 1559 + */ 1560 + MOTIONSENSE_CMD_FIFO_INFO = 7, 1561 + 1562 + /* 1563 + * Insert a flush element in the fifo and return sensor fifo info. 1564 + * The host can use that element to synchronize its operation. 1565 + */ 1566 + MOTIONSENSE_CMD_FIFO_FLUSH = 8, 1567 + 1568 + /* 1569 + * Return a portion of the fifo. 1570 + */ 1571 + MOTIONSENSE_CMD_FIFO_READ = 9, 1572 + 1573 + /* 1574 + * Perform low level calibration. 1575 + * On sensors that support it, ask to do offset calibration. 2264 1576 */ 2265 1577 MOTIONSENSE_CMD_PERFORM_CALIB = 10, 2266 1578 2267 1579 /* 2268 - * Sensor Offset command is a setter/getter command for the offset used 2269 - * for calibration. The offsets can be calculated by the host, or via 1580 + * Sensor Offset command is a setter/getter command for the offset 1581 + * used for calibration. 1582 + * The offsets can be calculated by the host, or via 2270 1583 * PERFORM_CALIB command. 2271 1584 */ 2272 1585 MOTIONSENSE_CMD_SENSOR_OFFSET = 11, 2273 1586 2274 - /* Number of motionsense sub-commands. */ 2275 - MOTIONSENSE_NUM_CMDS 2276 - }; 2277 - 2278 - enum motionsensor_id { 2279 - EC_MOTION_SENSOR_ACCEL_BASE = 0, 2280 - EC_MOTION_SENSOR_ACCEL_LID = 1, 2281 - EC_MOTION_SENSOR_GYRO = 2, 1587 + /* 1588 + * List available activities for a MOTION sensor. 1589 + * Indicates if they are enabled or disabled. 1590 + */ 1591 + MOTIONSENSE_CMD_LIST_ACTIVITIES = 12, 2282 1592 2283 1593 /* 2284 - * Note, if more sensors are added and this count changes, the padding 2285 - * in ec_response_motion_sense dump command must be modified. 1594 + * Activity management 1595 + * Enable/Disable activity recognition. 2286 1596 */ 2287 - EC_MOTION_SENSOR_COUNT = 3 1597 + MOTIONSENSE_CMD_SET_ACTIVITY = 13, 1598 + 1599 + /* 1600 + * Lid Angle 1601 + */ 1602 + MOTIONSENSE_CMD_LID_ANGLE = 14, 1603 + 1604 + /* 1605 + * Allow the FIFO to trigger interrupt via MKBP events. 1606 + * By default the FIFO does not send interrupt to process the FIFO 1607 + * until the AP is ready or it is coming from a wakeup sensor. 1608 + */ 1609 + MOTIONSENSE_CMD_FIFO_INT_ENABLE = 15, 1610 + 1611 + /* 1612 + * Spoof the readings of the sensors. The spoofed readings can be set 1613 + * to arbitrary values, or will lock to the last read actual values. 1614 + */ 1615 + MOTIONSENSE_CMD_SPOOF = 16, 1616 + 1617 + /* Set lid angle for tablet mode detection. */ 1618 + MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE = 17, 1619 + 1620 + /* 1621 + * Sensor Scale command is a setter/getter command for the calibration 1622 + * scale. 1623 + */ 1624 + MOTIONSENSE_CMD_SENSOR_SCALE = 18, 1625 + 1626 + /* Number of motionsense sub-commands. */ 1627 + MOTIONSENSE_NUM_CMDS 2288 1628 }; 2289 1629 2290 1630 /* List of motion sensor types. */ ··· 2340 1592 MOTIONSENSE_TYPE_LIGHT = 4, 2341 1593 MOTIONSENSE_TYPE_ACTIVITY = 5, 2342 1594 MOTIONSENSE_TYPE_BARO = 6, 1595 + MOTIONSENSE_TYPE_SYNC = 7, 2343 1596 MOTIONSENSE_TYPE_MAX, 2344 1597 }; 2345 1598 ··· 2348 1599 enum motionsensor_location { 2349 1600 MOTIONSENSE_LOC_BASE = 0, 2350 1601 MOTIONSENSE_LOC_LID = 1, 1602 + MOTIONSENSE_LOC_CAMERA = 2, 2351 1603 MOTIONSENSE_LOC_MAX, 2352 1604 }; 2353 1605 2354 1606 /* List of motion sensor chips. */ 2355 1607 enum motionsensor_chip { 2356 1608 MOTIONSENSE_CHIP_KXCJ9 = 0, 1609 + MOTIONSENSE_CHIP_LSM6DS0 = 1, 1610 + MOTIONSENSE_CHIP_BMI160 = 2, 1611 + MOTIONSENSE_CHIP_SI1141 = 3, 1612 + MOTIONSENSE_CHIP_SI1142 = 4, 1613 + MOTIONSENSE_CHIP_SI1143 = 5, 1614 + MOTIONSENSE_CHIP_KX022 = 6, 1615 + MOTIONSENSE_CHIP_L3GD20H = 7, 1616 + MOTIONSENSE_CHIP_BMA255 = 8, 1617 + MOTIONSENSE_CHIP_BMP280 = 9, 1618 + MOTIONSENSE_CHIP_OPT3001 = 10, 1619 + MOTIONSENSE_CHIP_BH1730 = 11, 1620 + MOTIONSENSE_CHIP_GPIO = 12, 1621 + MOTIONSENSE_CHIP_LIS2DH = 13, 1622 + MOTIONSENSE_CHIP_LSM6DSM = 14, 1623 + MOTIONSENSE_CHIP_LIS2DE = 15, 1624 + MOTIONSENSE_CHIP_LIS2MDL = 16, 1625 + MOTIONSENSE_CHIP_LSM6DS3 = 17, 1626 + MOTIONSENSE_CHIP_LSM6DSO = 18, 1627 + MOTIONSENSE_CHIP_LNG2DM = 19, 1628 + MOTIONSENSE_CHIP_MAX, 2357 1629 }; 2358 1630 1631 + /* List of orientation positions */ 1632 + enum motionsensor_orientation { 1633 + MOTIONSENSE_ORIENTATION_LANDSCAPE = 0, 1634 + MOTIONSENSE_ORIENTATION_PORTRAIT = 1, 1635 + MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_PORTRAIT = 2, 1636 + MOTIONSENSE_ORIENTATION_UPSIDE_DOWN_LANDSCAPE = 3, 1637 + MOTIONSENSE_ORIENTATION_UNKNOWN = 4, 1638 + }; 1639 + 1640 + struct ec_response_motion_sensor_data { 1641 + /* Flags for each sensor. */ 1642 + uint8_t flags; 1643 + /* Sensor number the data comes from. */ 1644 + uint8_t sensor_num; 1645 + /* Each sensor is up to 3-axis. */ 1646 + union { 1647 + int16_t data[3]; 1648 + struct __ec_todo_packed { 1649 + uint16_t reserved; 1650 + uint32_t timestamp; 1651 + }; 1652 + struct __ec_todo_unpacked { 1653 + uint8_t activity; /* motionsensor_activity */ 1654 + uint8_t state; 1655 + int16_t add_info[2]; 1656 + }; 1657 + }; 1658 + } __ec_todo_packed; 1659 + 1660 + /* Note: used in ec_response_get_next_data */ 1661 + struct ec_response_motion_sense_fifo_info { 1662 + /* Size of the fifo */ 1663 + uint16_t size; 1664 + /* Amount of space used in the fifo */ 1665 + uint16_t count; 1666 + /* Timestamp recorded in us. 1667 + * aka accurate timestamp when host event was triggered. 1668 + */ 1669 + uint32_t timestamp; 1670 + /* Total amount of vector lost */ 1671 + uint16_t total_lost; 1672 + /* Lost events since the last fifo_info, per sensors */ 1673 + uint16_t lost[0]; 1674 + } __ec_todo_packed; 1675 + 1676 + struct ec_response_motion_sense_fifo_data { 1677 + uint32_t number_data; 1678 + struct ec_response_motion_sensor_data data[0]; 1679 + } __ec_todo_packed; 1680 + 1681 + /* List supported activity recognition */ 1682 + enum motionsensor_activity { 1683 + MOTIONSENSE_ACTIVITY_RESERVED = 0, 1684 + MOTIONSENSE_ACTIVITY_SIG_MOTION = 1, 1685 + MOTIONSENSE_ACTIVITY_DOUBLE_TAP = 2, 1686 + MOTIONSENSE_ACTIVITY_ORIENTATION = 3, 1687 + }; 1688 + 1689 + struct ec_motion_sense_activity { 1690 + uint8_t sensor_num; 1691 + uint8_t activity; /* one of enum motionsensor_activity */ 1692 + uint8_t enable; /* 1: enable, 0: disable */ 1693 + uint8_t reserved; 1694 + uint16_t parameters[3]; /* activity dependent parameters */ 1695 + } __ec_todo_unpacked; 1696 + 2359 1697 /* Module flag masks used for the dump sub-command. */ 2360 - #define MOTIONSENSE_MODULE_FLAG_ACTIVE (1<<0) 1698 + #define MOTIONSENSE_MODULE_FLAG_ACTIVE BIT(0) 2361 1699 2362 1700 /* Sensor flag masks used for the dump sub-command. */ 2363 - #define MOTIONSENSE_SENSOR_FLAG_PRESENT (1<<0) 1701 + #define MOTIONSENSE_SENSOR_FLAG_PRESENT BIT(0) 1702 + 1703 + /* 1704 + * Flush entry for synchronization. 1705 + * data contains time stamp 1706 + */ 1707 + #define MOTIONSENSE_SENSOR_FLAG_FLUSH BIT(0) 1708 + #define MOTIONSENSE_SENSOR_FLAG_TIMESTAMP BIT(1) 1709 + #define MOTIONSENSE_SENSOR_FLAG_WAKEUP BIT(2) 1710 + #define MOTIONSENSE_SENSOR_FLAG_TABLET_MODE BIT(3) 1711 + #define MOTIONSENSE_SENSOR_FLAG_ODR BIT(4) 2364 1712 2365 1713 /* 2366 1714 * Send this value for the data element to only perform a read. If you ··· 2468 1622 2469 1623 #define EC_MOTION_SENSE_INVALID_CALIB_TEMP 0x8000 2470 1624 1625 + /* MOTIONSENSE_CMD_SENSOR_OFFSET subcommand flag */ 2471 1626 /* Set Calibration information */ 2472 - #define MOTION_SENSE_SET_OFFSET 1 1627 + #define MOTION_SENSE_SET_OFFSET BIT(0) 2473 1628 2474 - struct ec_response_motion_sensor_data { 2475 - /* Flags for each sensor. */ 2476 - uint8_t flags; 2477 - /* Sensor number the data comes from */ 2478 - uint8_t sensor_num; 2479 - /* Each sensor is up to 3-axis. */ 2480 - union { 2481 - int16_t data[3]; 2482 - struct { 2483 - uint16_t rsvd; 2484 - uint32_t timestamp; 2485 - } __packed; 2486 - struct { 2487 - uint8_t activity; /* motionsensor_activity */ 2488 - uint8_t state; 2489 - int16_t add_info[2]; 2490 - }; 2491 - }; 2492 - } __packed; 1629 + /* Default Scale value, factor 1. */ 1630 + #define MOTION_SENSE_DEFAULT_SCALE BIT(15) 1631 + 1632 + #define LID_ANGLE_UNRELIABLE 500 1633 + 1634 + enum motionsense_spoof_mode { 1635 + /* Disable spoof mode. */ 1636 + MOTIONSENSE_SPOOF_MODE_DISABLE = 0, 1637 + 1638 + /* Enable spoof mode, but use provided component values. */ 1639 + MOTIONSENSE_SPOOF_MODE_CUSTOM, 1640 + 1641 + /* Enable spoof mode, but use the current sensor values. */ 1642 + MOTIONSENSE_SPOOF_MODE_LOCK_CURRENT, 1643 + 1644 + /* Query the current spoof mode status for the sensor. */ 1645 + MOTIONSENSE_SPOOF_MODE_QUERY, 1646 + }; 2493 1647 2494 1648 struct ec_params_motion_sense { 2495 1649 uint8_t cmd; 2496 1650 union { 2497 1651 /* Used for MOTIONSENSE_CMD_DUMP. */ 2498 - struct { 2499 - /* no args */ 1652 + struct __ec_todo_unpacked { 1653 + /* 1654 + * Maximal number of sensor the host is expecting. 1655 + * 0 means the host is only interested in the number 1656 + * of sensors controlled by the EC. 1657 + */ 1658 + uint8_t max_sensor_count; 2500 1659 } dump; 2501 1660 2502 1661 /* 2503 - * Used for MOTIONSENSE_CMD_EC_RATE and 2504 - * MOTIONSENSE_CMD_KB_WAKE_ANGLE. 1662 + * Used for MOTIONSENSE_CMD_KB_WAKE_ANGLE. 2505 1663 */ 2506 - struct { 2507 - /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 1664 + struct __ec_todo_unpacked { 1665 + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. 1666 + * kb_wake_angle: angle to wakup AP. 1667 + */ 2508 1668 int16_t data; 2509 - } ec_rate, kb_wake_angle; 1669 + } kb_wake_angle; 1670 + 1671 + /* 1672 + * Used for MOTIONSENSE_CMD_INFO, MOTIONSENSE_CMD_DATA 1673 + * and MOTIONSENSE_CMD_PERFORM_CALIB. 1674 + */ 1675 + struct __ec_todo_unpacked { 1676 + uint8_t sensor_num; 1677 + } info, info_3, data, fifo_flush, perform_calib, 1678 + list_activities; 1679 + 1680 + /* 1681 + * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR 1682 + * and MOTIONSENSE_CMD_SENSOR_RANGE. 1683 + */ 1684 + struct __ec_todo_unpacked { 1685 + uint8_t sensor_num; 1686 + 1687 + /* Rounding flag, true for round-up, false for down. */ 1688 + uint8_t roundup; 1689 + 1690 + uint16_t reserved; 1691 + 1692 + /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 1693 + int32_t data; 1694 + } ec_rate, sensor_odr, sensor_range; 2510 1695 2511 1696 /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2512 - struct { 1697 + struct __ec_todo_packed { 2513 1698 uint8_t sensor_num; 2514 1699 2515 1700 /* ··· 2566 1689 * Compass: 1/16 uT 2567 1690 */ 2568 1691 int16_t offset[3]; 2569 - } __packed sensor_offset; 1692 + } sensor_offset; 2570 1693 2571 - /* Used for MOTIONSENSE_CMD_INFO. */ 2572 - struct { 2573 - uint8_t sensor_num; 2574 - } info; 2575 - 2576 - /* 2577 - * Used for MOTIONSENSE_CMD_SENSOR_ODR and 2578 - * MOTIONSENSE_CMD_SENSOR_RANGE. 2579 - */ 2580 - struct { 2581 - /* Should be element of enum motionsensor_id. */ 1694 + /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 1695 + struct __ec_todo_packed { 2582 1696 uint8_t sensor_num; 2583 1697 2584 - /* Rounding flag, true for round-up, false for down. */ 2585 - uint8_t roundup; 1698 + /* 1699 + * bit 0: If set (MOTION_SENSE_SET_OFFSET), set 1700 + * the calibration information in the EC. 1701 + * If unset, just retrieve calibration information. 1702 + */ 1703 + uint16_t flags; 2586 1704 2587 - uint16_t reserved; 1705 + /* 1706 + * Temperature at calibration, in units of 0.01 C 1707 + * 0x8000: invalid / unknown. 1708 + * 0x0: 0C 1709 + * 0x7fff: +327.67C 1710 + */ 1711 + int16_t temp; 2588 1712 2589 - /* Data to set or EC_MOTION_SENSE_NO_VALUE to read. */ 2590 - int32_t data; 2591 - } sensor_odr, sensor_range; 1713 + /* 1714 + * Scale for calibration: 1715 + * By default scale is 1, it is encoded on 16bits: 1716 + * 1 = BIT(15) 1717 + * ~2 = 0xFFFF 1718 + * ~0 = 0. 1719 + */ 1720 + uint16_t scale[3]; 1721 + } sensor_scale; 1722 + 1723 + 1724 + /* Used for MOTIONSENSE_CMD_FIFO_INFO */ 1725 + /* (no params) */ 1726 + 1727 + /* Used for MOTIONSENSE_CMD_FIFO_READ */ 1728 + struct __ec_todo_unpacked { 1729 + /* 1730 + * Number of expected vector to return. 1731 + * EC may return less or 0 if none available. 1732 + */ 1733 + uint32_t max_data_vector; 1734 + } fifo_read; 1735 + 1736 + struct ec_motion_sense_activity set_activity; 1737 + 1738 + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 1739 + /* (no params) */ 1740 + 1741 + /* Used for MOTIONSENSE_CMD_FIFO_INT_ENABLE */ 1742 + struct __ec_todo_unpacked { 1743 + /* 1744 + * 1: enable, 0 disable fifo, 1745 + * EC_MOTION_SENSE_NO_VALUE return value. 1746 + */ 1747 + int8_t enable; 1748 + } fifo_int_enable; 1749 + 1750 + /* Used for MOTIONSENSE_CMD_SPOOF */ 1751 + struct __ec_todo_packed { 1752 + uint8_t sensor_id; 1753 + 1754 + /* See enum motionsense_spoof_mode. */ 1755 + uint8_t spoof_enable; 1756 + 1757 + /* Ignored, used for alignment. */ 1758 + uint8_t reserved; 1759 + 1760 + /* Individual component values to spoof. */ 1761 + int16_t components[3]; 1762 + } spoof; 1763 + 1764 + /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 1765 + struct __ec_todo_unpacked { 1766 + /* 1767 + * Lid angle threshold for switching between tablet and 1768 + * clamshell mode. 1769 + */ 1770 + int16_t lid_angle; 1771 + 1772 + /* 1773 + * Hysteresis degree to prevent fluctuations between 1774 + * clamshell and tablet mode if lid angle keeps 1775 + * changing around the threshold. Lid motion driver will 1776 + * use lid_angle + hys_degree to trigger tablet mode and 1777 + * lid_angle - hys_degree to trigger clamshell mode. 1778 + */ 1779 + int16_t hys_degree; 1780 + } tablet_mode_threshold; 2592 1781 }; 2593 - } __packed; 1782 + } __ec_todo_packed; 2594 1783 2595 1784 struct ec_response_motion_sense { 2596 1785 union { 2597 - /* Used for MOTIONSENSE_CMD_DUMP. */ 2598 - struct { 1786 + /* Used for MOTIONSENSE_CMD_DUMP */ 1787 + struct __ec_todo_unpacked { 2599 1788 /* Flags representing the motion sensor module. */ 2600 1789 uint8_t module_flags; 2601 1790 ··· 2676 1733 } dump; 2677 1734 2678 1735 /* Used for MOTIONSENSE_CMD_INFO. */ 2679 - struct { 1736 + struct __ec_todo_unpacked { 2680 1737 /* Should be element of enum motionsensor_type. */ 2681 1738 uint8_t type; 2682 1739 ··· 2687 1744 uint8_t chip; 2688 1745 } info; 2689 1746 1747 + /* Used for MOTIONSENSE_CMD_INFO version 3 */ 1748 + struct __ec_todo_unpacked { 1749 + /* Should be element of enum motionsensor_type. */ 1750 + uint8_t type; 1751 + 1752 + /* Should be element of enum motionsensor_location. */ 1753 + uint8_t location; 1754 + 1755 + /* Should be element of enum motionsensor_chip. */ 1756 + uint8_t chip; 1757 + 1758 + /* Minimum sensor sampling frequency */ 1759 + uint32_t min_frequency; 1760 + 1761 + /* Maximum sensor sampling frequency */ 1762 + uint32_t max_frequency; 1763 + 1764 + /* Max number of sensor events that could be in fifo */ 1765 + uint32_t fifo_max_event_count; 1766 + } info_3; 1767 + 2690 1768 /* Used for MOTIONSENSE_CMD_DATA */ 2691 1769 struct ec_response_motion_sensor_data data; 2692 1770 2693 1771 /* 2694 1772 * Used for MOTIONSENSE_CMD_EC_RATE, MOTIONSENSE_CMD_SENSOR_ODR, 2695 - * MOTIONSENSE_CMD_SENSOR_RANGE, and 2696 - * MOTIONSENSE_CMD_KB_WAKE_ANGLE. 1773 + * MOTIONSENSE_CMD_SENSOR_RANGE, 1774 + * MOTIONSENSE_CMD_KB_WAKE_ANGLE, 1775 + * MOTIONSENSE_CMD_FIFO_INT_ENABLE and 1776 + * MOTIONSENSE_CMD_SPOOF. 2697 1777 */ 2698 - struct { 1778 + struct __ec_todo_unpacked { 2699 1779 /* Current value of the parameter queried. */ 2700 1780 int32_t ret; 2701 - } ec_rate, sensor_odr, sensor_range, kb_wake_angle; 1781 + } ec_rate, sensor_odr, sensor_range, kb_wake_angle, 1782 + fifo_int_enable, spoof; 2702 1783 2703 - /* Used for MOTIONSENSE_CMD_SENSOR_OFFSET */ 2704 - struct { 1784 + /* 1785 + * Used for MOTIONSENSE_CMD_SENSOR_OFFSET, 1786 + * PERFORM_CALIB. 1787 + */ 1788 + struct __ec_todo_unpacked { 2705 1789 int16_t temp; 2706 1790 int16_t offset[3]; 2707 1791 } sensor_offset, perform_calib; 1792 + 1793 + /* Used for MOTIONSENSE_CMD_SENSOR_SCALE */ 1794 + struct __ec_todo_unpacked { 1795 + int16_t temp; 1796 + uint16_t scale[3]; 1797 + } sensor_scale; 1798 + 1799 + struct ec_response_motion_sense_fifo_info fifo_info, fifo_flush; 1800 + 1801 + struct ec_response_motion_sense_fifo_data fifo_read; 1802 + 1803 + struct __ec_todo_packed { 1804 + uint16_t reserved; 1805 + uint32_t enabled; 1806 + uint32_t disabled; 1807 + } list_activities; 1808 + 1809 + /* No params for set activity */ 1810 + 1811 + /* Used for MOTIONSENSE_CMD_LID_ANGLE */ 1812 + struct __ec_todo_unpacked { 1813 + /* 1814 + * Angle between 0 and 360 degree if available, 1815 + * LID_ANGLE_UNRELIABLE otherwise. 1816 + */ 1817 + uint16_t value; 1818 + } lid_angle; 1819 + 1820 + /* Used for MOTIONSENSE_CMD_TABLET_MODE_LID_ANGLE. */ 1821 + struct __ec_todo_unpacked { 1822 + /* 1823 + * Lid angle threshold for switching between tablet and 1824 + * clamshell mode. 1825 + */ 1826 + uint16_t lid_angle; 1827 + 1828 + /* Hysteresis degree. */ 1829 + uint16_t hys_degree; 1830 + } tablet_mode_threshold; 1831 + 2708 1832 }; 2709 - } __packed; 1833 + } __ec_todo_packed; 1834 + 1835 + /*****************************************************************************/ 1836 + /* Force lid open command */ 1837 + 1838 + /* Make lid event always open */ 1839 + #define EC_CMD_FORCE_LID_OPEN 0x002C 1840 + 1841 + struct ec_params_force_lid_open { 1842 + uint8_t enabled; 1843 + } __ec_align1; 1844 + 1845 + /*****************************************************************************/ 1846 + /* Configure the behavior of the power button */ 1847 + #define EC_CMD_CONFIG_POWER_BUTTON 0x002D 1848 + 1849 + enum ec_config_power_button_flags { 1850 + /* Enable/Disable power button pulses for x86 devices */ 1851 + EC_POWER_BUTTON_ENABLE_PULSE = BIT(0), 1852 + }; 1853 + 1854 + struct ec_params_config_power_button { 1855 + /* See enum ec_config_power_button_flags */ 1856 + uint8_t flags; 1857 + } __ec_align1; 2710 1858 2711 1859 /*****************************************************************************/ 2712 1860 /* USB charging control commands */ 2713 1861 2714 1862 /* Set USB port charging mode */ 2715 - #define EC_CMD_USB_CHARGE_SET_MODE 0x30 1863 + #define EC_CMD_USB_CHARGE_SET_MODE 0x0030 2716 1864 2717 1865 struct ec_params_usb_charge_set_mode { 2718 1866 uint8_t usb_port_id; 2719 - uint8_t mode; 2720 - } __packed; 1867 + uint8_t mode:7; 1868 + uint8_t inhibit_charge:1; 1869 + } __ec_align1; 2721 1870 2722 1871 /*****************************************************************************/ 2723 1872 /* Persistent storage for host */ ··· 2818 1783 #define EC_PSTORE_SIZE_MAX 64 2819 1784 2820 1785 /* Get persistent storage info */ 2821 - #define EC_CMD_PSTORE_INFO 0x40 1786 + #define EC_CMD_PSTORE_INFO 0x0040 2822 1787 2823 1788 struct ec_response_pstore_info { 2824 1789 /* Persistent storage size, in bytes */ 2825 1790 uint32_t pstore_size; 2826 1791 /* Access size; read/write offset and size must be a multiple of this */ 2827 1792 uint32_t access_size; 2828 - } __packed; 1793 + } __ec_align4; 2829 1794 2830 1795 /* 2831 1796 * Read persistent storage 2832 1797 * 2833 1798 * Response is params.size bytes of data. 2834 1799 */ 2835 - #define EC_CMD_PSTORE_READ 0x41 1800 + #define EC_CMD_PSTORE_READ 0x0041 2836 1801 2837 1802 struct ec_params_pstore_read { 2838 1803 uint32_t offset; /* Byte offset to read */ 2839 1804 uint32_t size; /* Size to read in bytes */ 2840 - } __packed; 1805 + } __ec_align4; 2841 1806 2842 1807 /* Write persistent storage */ 2843 - #define EC_CMD_PSTORE_WRITE 0x42 1808 + #define EC_CMD_PSTORE_WRITE 0x0042 2844 1809 2845 1810 struct ec_params_pstore_write { 2846 1811 uint32_t offset; /* Byte offset to write */ 2847 1812 uint32_t size; /* Size to write in bytes */ 2848 1813 uint8_t data[EC_PSTORE_SIZE_MAX]; 2849 - } __packed; 1814 + } __ec_align4; 2850 1815 2851 1816 /*****************************************************************************/ 2852 1817 /* Real-time clock */ ··· 2854 1819 /* RTC params and response structures */ 2855 1820 struct ec_params_rtc { 2856 1821 uint32_t time; 2857 - } __packed; 1822 + } __ec_align4; 2858 1823 2859 1824 struct ec_response_rtc { 2860 1825 uint32_t time; 2861 - } __packed; 1826 + } __ec_align4; 2862 1827 2863 1828 /* These use ec_response_rtc */ 2864 - #define EC_CMD_RTC_GET_VALUE 0x44 2865 - #define EC_CMD_RTC_GET_ALARM 0x45 1829 + #define EC_CMD_RTC_GET_VALUE 0x0044 1830 + #define EC_CMD_RTC_GET_ALARM 0x0045 2866 1831 2867 1832 /* These all use ec_params_rtc */ 2868 - #define EC_CMD_RTC_SET_VALUE 0x46 2869 - #define EC_CMD_RTC_SET_ALARM 0x47 1833 + #define EC_CMD_RTC_SET_VALUE 0x0046 1834 + #define EC_CMD_RTC_SET_ALARM 0x0047 2870 1835 2871 - /* Pass as param to SET_ALARM to clear the current alarm */ 1836 + /* Pass as time param to SET_ALARM to clear the current alarm */ 2872 1837 #define EC_RTC_ALARM_CLEAR 0 2873 1838 2874 1839 /*****************************************************************************/ ··· 2878 1843 #define EC_PORT80_SIZE_MAX 32 2879 1844 2880 1845 /* Get last port80 code from previous boot */ 2881 - #define EC_CMD_PORT80_LAST_BOOT 0x48 2882 - #define EC_CMD_PORT80_READ 0x48 1846 + #define EC_CMD_PORT80_LAST_BOOT 0x0048 1847 + #define EC_CMD_PORT80_READ 0x0048 2883 1848 2884 1849 enum ec_port80_subcmd { 2885 1850 EC_PORT80_GET_INFO = 0, ··· 2889 1854 struct ec_params_port80_read { 2890 1855 uint16_t subcmd; 2891 1856 union { 2892 - struct { 1857 + struct __ec_todo_unpacked { 2893 1858 uint32_t offset; 2894 1859 uint32_t num_entries; 2895 1860 } read_buffer; 2896 1861 }; 2897 - } __packed; 1862 + } __ec_todo_packed; 2898 1863 2899 1864 struct ec_response_port80_read { 2900 1865 union { 2901 - struct { 1866 + struct __ec_todo_unpacked { 2902 1867 uint32_t writes; 2903 1868 uint32_t history_size; 2904 1869 uint32_t last_boot; 2905 1870 } get_info; 2906 - struct { 1871 + struct __ec_todo_unpacked { 2907 1872 uint16_t codes[EC_PORT80_SIZE_MAX]; 2908 1873 } data; 2909 1874 }; 2910 - } __packed; 1875 + } __ec_todo_packed; 2911 1876 2912 1877 struct ec_response_port80_last_boot { 2913 1878 uint16_t code; 2914 - } __packed; 1879 + } __ec_align2; 1880 + 1881 + /*****************************************************************************/ 1882 + /* Temporary secure storage for host verified boot use */ 1883 + 1884 + /* Number of bytes in a vstore slot */ 1885 + #define EC_VSTORE_SLOT_SIZE 64 1886 + 1887 + /* Maximum number of vstore slots */ 1888 + #define EC_VSTORE_SLOT_MAX 32 1889 + 1890 + /* Get persistent storage info */ 1891 + #define EC_CMD_VSTORE_INFO 0x0049 1892 + struct ec_response_vstore_info { 1893 + /* Indicates which slots are locked */ 1894 + uint32_t slot_locked; 1895 + /* Total number of slots available */ 1896 + uint8_t slot_count; 1897 + } __ec_align_size1; 1898 + 1899 + /* 1900 + * Read temporary secure storage 1901 + * 1902 + * Response is EC_VSTORE_SLOT_SIZE bytes of data. 1903 + */ 1904 + #define EC_CMD_VSTORE_READ 0x004A 1905 + 1906 + struct ec_params_vstore_read { 1907 + uint8_t slot; /* Slot to read from */ 1908 + } __ec_align1; 1909 + 1910 + struct ec_response_vstore_read { 1911 + uint8_t data[EC_VSTORE_SLOT_SIZE]; 1912 + } __ec_align1; 1913 + 1914 + /* 1915 + * Write temporary secure storage and lock it. 1916 + */ 1917 + #define EC_CMD_VSTORE_WRITE 0x004B 1918 + 1919 + struct ec_params_vstore_write { 1920 + uint8_t slot; /* Slot to write to */ 1921 + uint8_t data[EC_VSTORE_SLOT_SIZE]; 1922 + } __ec_align1; 2915 1923 2916 1924 /*****************************************************************************/ 2917 1925 /* Thermal engine commands. Note that there are two implementations. We'll ··· 2963 1885 * Version 1 separates the CPU thermal limits from the fan control. 2964 1886 */ 2965 1887 2966 - #define EC_CMD_THERMAL_SET_THRESHOLD 0x50 2967 - #define EC_CMD_THERMAL_GET_THRESHOLD 0x51 1888 + #define EC_CMD_THERMAL_SET_THRESHOLD 0x0050 1889 + #define EC_CMD_THERMAL_GET_THRESHOLD 0x0051 2968 1890 2969 1891 /* The version 0 structs are opaque. You have to know what they are for 2970 1892 * the get/set commands to make any sense. ··· 2975 1897 uint8_t sensor_type; 2976 1898 uint8_t threshold_id; 2977 1899 uint16_t value; 2978 - } __packed; 1900 + } __ec_align2; 2979 1901 2980 1902 /* Version 0 - get */ 2981 1903 struct ec_params_thermal_get_threshold { 2982 1904 uint8_t sensor_type; 2983 1905 uint8_t threshold_id; 2984 - } __packed; 1906 + } __ec_align1; 2985 1907 2986 1908 struct ec_response_thermal_get_threshold { 2987 1909 uint16_t value; 2988 - } __packed; 1910 + } __ec_align2; 2989 1911 2990 1912 2991 1913 /* The version 1 structs are visible. */ ··· 2997 1919 EC_TEMP_THRESH_COUNT 2998 1920 }; 2999 1921 3000 - /* Thermal configuration for one temperature sensor. Temps are in degrees K. 1922 + /* 1923 + * Thermal configuration for one temperature sensor. Temps are in degrees K. 3001 1924 * Zero values will be silently ignored by the thermal task. 1925 + * 1926 + * Set 'temp_host' value allows thermal task to trigger some event with 1 degree 1927 + * hysteresis. 1928 + * For example, 1929 + * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 1930 + * temp_host_release[EC_TEMP_THRESH_HIGH] = 0 K 1931 + * EC will throttle ap when temperature >= 301 K, and release throttling when 1932 + * temperature <= 299 K. 1933 + * 1934 + * Set 'temp_host_release' value allows thermal task has a custom hysteresis. 1935 + * For example, 1936 + * temp_host[EC_TEMP_THRESH_HIGH] = 300 K 1937 + * temp_host_release[EC_TEMP_THRESH_HIGH] = 295 K 1938 + * EC will throttle ap when temperature >= 301 K, and release throttling when 1939 + * temperature <= 294 K. 1940 + * 1941 + * Note that this structure is a sub-structure of 1942 + * ec_params_thermal_set_threshold_v1, but maintains its alignment there. 3002 1943 */ 3003 1944 struct ec_thermal_config { 3004 1945 uint32_t temp_host[EC_TEMP_THRESH_COUNT]; /* levels of hotness */ 1946 + uint32_t temp_host_release[EC_TEMP_THRESH_COUNT]; /* release levels */ 3005 1947 uint32_t temp_fan_off; /* no active cooling needed */ 3006 1948 uint32_t temp_fan_max; /* max active cooling needed */ 3007 - } __packed; 1949 + } __ec_align4; 3008 1950 3009 1951 /* Version 1 - get config for one sensor. */ 3010 1952 struct ec_params_thermal_get_threshold_v1 { 3011 1953 uint32_t sensor_num; 3012 - } __packed; 1954 + } __ec_align4; 3013 1955 /* This returns a struct ec_thermal_config */ 3014 1956 3015 - /* Version 1 - set config for one sensor. 3016 - * Use read-modify-write for best results! */ 1957 + /* 1958 + * Version 1 - set config for one sensor. 1959 + * Use read-modify-write for best results! 1960 + */ 3017 1961 struct ec_params_thermal_set_threshold_v1 { 3018 1962 uint32_t sensor_num; 3019 1963 struct ec_thermal_config cfg; 3020 - } __packed; 1964 + } __ec_align4; 3021 1965 /* This returns no data */ 3022 1966 3023 1967 /****************************************************************************/ 3024 1968 3025 1969 /* Toggle automatic fan control */ 3026 - #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x52 1970 + #define EC_CMD_THERMAL_AUTO_FAN_CTRL 0x0052 3027 1971 3028 - /* Get TMP006 calibration data */ 3029 - #define EC_CMD_TMP006_GET_CALIBRATION 0x53 1972 + /* Version 1 of input params */ 1973 + struct ec_params_auto_fan_ctrl_v1 { 1974 + uint8_t fan_idx; 1975 + } __ec_align1; 3030 1976 1977 + /* Get/Set TMP006 calibration data */ 1978 + #define EC_CMD_TMP006_GET_CALIBRATION 0x0053 1979 + #define EC_CMD_TMP006_SET_CALIBRATION 0x0054 1980 + 1981 + /* 1982 + * The original TMP006 calibration only needed four params, but now we need 1983 + * more. Since the algorithm is nothing but magic numbers anyway, we'll leave 1984 + * the params opaque. The v1 "get" response will include the algorithm number 1985 + * and how many params it requires. That way we can change the EC code without 1986 + * needing to update this file. We can also use a different algorithm on each 1987 + * sensor. 1988 + */ 1989 + 1990 + /* This is the same struct for both v0 and v1. */ 3031 1991 struct ec_params_tmp006_get_calibration { 3032 1992 uint8_t index; 3033 - } __packed; 1993 + } __ec_align1; 3034 1994 3035 - struct ec_response_tmp006_get_calibration { 1995 + /* Version 0 */ 1996 + struct ec_response_tmp006_get_calibration_v0 { 3036 1997 float s0; 3037 1998 float b0; 3038 1999 float b1; 3039 2000 float b2; 3040 - } __packed; 2001 + } __ec_align4; 3041 2002 3042 - /* Set TMP006 calibration data */ 3043 - #define EC_CMD_TMP006_SET_CALIBRATION 0x54 3044 - 3045 - struct ec_params_tmp006_set_calibration { 2003 + struct ec_params_tmp006_set_calibration_v0 { 3046 2004 uint8_t index; 3047 - uint8_t reserved[3]; /* Reserved; set 0 */ 2005 + uint8_t reserved[3]; 3048 2006 float s0; 3049 2007 float b0; 3050 2008 float b1; 3051 2009 float b2; 3052 - } __packed; 2010 + } __ec_align4; 2011 + 2012 + /* Version 1 */ 2013 + struct ec_response_tmp006_get_calibration_v1 { 2014 + uint8_t algorithm; 2015 + uint8_t num_params; 2016 + uint8_t reserved[2]; 2017 + float val[0]; 2018 + } __ec_align4; 2019 + 2020 + struct ec_params_tmp006_set_calibration_v1 { 2021 + uint8_t index; 2022 + uint8_t algorithm; 2023 + uint8_t num_params; 2024 + uint8_t reserved; 2025 + float val[0]; 2026 + } __ec_align4; 2027 + 3053 2028 3054 2029 /* Read raw TMP006 data */ 3055 - #define EC_CMD_TMP006_GET_RAW 0x55 2030 + #define EC_CMD_TMP006_GET_RAW 0x0055 3056 2031 3057 2032 struct ec_params_tmp006_get_raw { 3058 2033 uint8_t index; 3059 - } __packed; 2034 + } __ec_align1; 3060 2035 3061 2036 struct ec_response_tmp006_get_raw { 3062 2037 int32_t t; /* In 1/100 K */ 3063 2038 int32_t v; /* In nV */ 3064 - }; 2039 + } __ec_align4; 3065 2040 3066 2041 /*****************************************************************************/ 3067 2042 /* MKBP - Matrix KeyBoard Protocol */ ··· 3129 1998 * to obtain the instantaneous state, use EC_CMD_MKBP_INFO with the type 3130 1999 * EC_MKBP_INFO_CURRENT and event EC_MKBP_EVENT_KEY_MATRIX. 3131 2000 */ 3132 - #define EC_CMD_MKBP_STATE 0x60 2001 + #define EC_CMD_MKBP_STATE 0x0060 3133 2002 3134 2003 /* 3135 2004 * Provide information about various MKBP things. See enum ec_mkbp_info_type. 3136 2005 */ 3137 - #define EC_CMD_MKBP_INFO 0x61 2006 + #define EC_CMD_MKBP_INFO 0x0061 3138 2007 3139 2008 struct ec_response_mkbp_info { 3140 2009 uint32_t rows; 3141 2010 uint32_t cols; 3142 2011 /* Formerly "switches", which was 0. */ 3143 2012 uint8_t reserved; 3144 - } __packed; 2013 + } __ec_align_size1; 3145 2014 3146 2015 struct ec_params_mkbp_info { 3147 2016 uint8_t info_type; 3148 2017 uint8_t event_type; 3149 - } __packed; 2018 + } __ec_align1; 3150 2019 3151 2020 enum ec_mkbp_info_type { 3152 2021 /* ··· 3188 2057 }; 3189 2058 3190 2059 /* Simulate key press */ 3191 - #define EC_CMD_MKBP_SIMULATE_KEY 0x62 2060 + #define EC_CMD_MKBP_SIMULATE_KEY 0x0062 3192 2061 3193 2062 struct ec_params_mkbp_simulate_key { 3194 2063 uint8_t col; 3195 2064 uint8_t row; 3196 2065 uint8_t pressed; 3197 - } __packed; 2066 + } __ec_align1; 2067 + 2068 + #define EC_CMD_GET_KEYBOARD_ID 0x0063 2069 + 2070 + struct ec_response_keyboard_id { 2071 + uint32_t keyboard_id; 2072 + } __ec_align4; 2073 + 2074 + enum keyboard_id { 2075 + KEYBOARD_ID_UNSUPPORTED = 0, 2076 + KEYBOARD_ID_UNREADABLE = 0xffffffff, 2077 + }; 3198 2078 3199 2079 /* Configure keyboard scanning */ 3200 - #define EC_CMD_MKBP_SET_CONFIG 0x64 3201 - #define EC_CMD_MKBP_GET_CONFIG 0x65 2080 + #define EC_CMD_MKBP_SET_CONFIG 0x0064 2081 + #define EC_CMD_MKBP_GET_CONFIG 0x0065 3202 2082 3203 2083 /* flags */ 3204 2084 enum mkbp_config_flags { ··· 3217 2075 }; 3218 2076 3219 2077 enum mkbp_config_valid { 3220 - EC_MKBP_VALID_SCAN_PERIOD = 1 << 0, 3221 - EC_MKBP_VALID_POLL_TIMEOUT = 1 << 1, 3222 - EC_MKBP_VALID_MIN_POST_SCAN_DELAY = 1 << 3, 3223 - EC_MKBP_VALID_OUTPUT_SETTLE = 1 << 4, 3224 - EC_MKBP_VALID_DEBOUNCE_DOWN = 1 << 5, 3225 - EC_MKBP_VALID_DEBOUNCE_UP = 1 << 6, 3226 - EC_MKBP_VALID_FIFO_MAX_DEPTH = 1 << 7, 2078 + EC_MKBP_VALID_SCAN_PERIOD = BIT(0), 2079 + EC_MKBP_VALID_POLL_TIMEOUT = BIT(1), 2080 + EC_MKBP_VALID_MIN_POST_SCAN_DELAY = BIT(3), 2081 + EC_MKBP_VALID_OUTPUT_SETTLE = BIT(4), 2082 + EC_MKBP_VALID_DEBOUNCE_DOWN = BIT(5), 2083 + EC_MKBP_VALID_DEBOUNCE_UP = BIT(6), 2084 + EC_MKBP_VALID_FIFO_MAX_DEPTH = BIT(7), 3227 2085 }; 3228 2086 3229 - /* Configuration for our key scanning algorithm */ 2087 + /* 2088 + * Configuration for our key scanning algorithm. 2089 + * 2090 + * Note that this is used as a sub-structure of 2091 + * ec_{params/response}_mkbp_get_config. 2092 + */ 3230 2093 struct ec_mkbp_config { 3231 2094 uint32_t valid_mask; /* valid fields */ 3232 2095 uint8_t flags; /* some flags (enum mkbp_config_flags) */ ··· 3251 2104 uint16_t debounce_up_us; /* time for debounce on key up */ 3252 2105 /* maximum depth to allow for fifo (0 = no keyscan output) */ 3253 2106 uint8_t fifo_max_depth; 3254 - } __packed; 2107 + } __ec_align_size1; 3255 2108 3256 2109 struct ec_params_mkbp_set_config { 3257 2110 struct ec_mkbp_config config; 3258 - } __packed; 2111 + } __ec_align_size1; 3259 2112 3260 2113 struct ec_response_mkbp_get_config { 3261 2114 struct ec_mkbp_config config; 3262 - } __packed; 2115 + } __ec_align_size1; 3263 2116 3264 2117 /* Run the key scan emulation */ 3265 - #define EC_CMD_KEYSCAN_SEQ_CTRL 0x66 2118 + #define EC_CMD_KEYSCAN_SEQ_CTRL 0x0066 3266 2119 3267 2120 enum ec_keyscan_seq_cmd { 3268 2121 EC_KEYSCAN_SEQ_STATUS = 0, /* Get status information */ ··· 3277 2130 * Indicates this scan was processed by the EC. Due to timing, some 3278 2131 * scans may be skipped. 3279 2132 */ 3280 - EC_KEYSCAN_SEQ_FLAG_DONE = 1 << 0, 2133 + EC_KEYSCAN_SEQ_FLAG_DONE = BIT(0), 3281 2134 }; 3282 2135 3283 2136 struct ec_collect_item { 3284 2137 uint8_t flags; /* some flags (enum ec_collect_flags) */ 3285 - }; 2138 + } __ec_align1; 3286 2139 3287 2140 struct ec_params_keyscan_seq_ctrl { 3288 2141 uint8_t cmd; /* Command to send (enum ec_keyscan_seq_cmd) */ 3289 2142 union { 3290 - struct { 2143 + struct __ec_align1 { 3291 2144 uint8_t active; /* still active */ 3292 2145 uint8_t num_items; /* number of items */ 3293 2146 /* Current item being presented */ 3294 2147 uint8_t cur_item; 3295 2148 } status; 3296 - struct { 2149 + struct __ec_todo_unpacked { 3297 2150 /* 3298 2151 * Absolute time for this scan, measured from the 3299 2152 * start of the sequence. ··· 3301 2154 uint32_t time_us; 3302 2155 uint8_t scan[0]; /* keyscan data */ 3303 2156 } add; 3304 - struct { 2157 + struct __ec_align1 { 3305 2158 uint8_t start_item; /* First item to return */ 3306 2159 uint8_t num_items; /* Number of items to return */ 3307 2160 } collect; 3308 2161 }; 3309 - } __packed; 2162 + } __ec_todo_packed; 3310 2163 3311 2164 struct ec_result_keyscan_seq_ctrl { 3312 2165 union { 3313 - struct { 2166 + struct __ec_todo_unpacked { 3314 2167 uint8_t num_items; /* Number of items */ 3315 2168 /* Data for each item */ 3316 2169 struct ec_collect_item item[0]; 3317 2170 } collect; 3318 2171 }; 3319 - } __packed; 2172 + } __ec_todo_packed; 3320 2173 3321 2174 /* 3322 - * Command for retrieving the next pending MKBP event from the EC device 2175 + * Get the next pending MKBP event. 3323 2176 * 3324 - * The device replies with UNAVAILABLE if there aren't any pending events. 2177 + * Returns EC_RES_UNAVAILABLE if there is no event pending. 3325 2178 */ 3326 - #define EC_CMD_GET_NEXT_EVENT 0x67 2179 + #define EC_CMD_GET_NEXT_EVENT 0x0067 2180 + 2181 + #define EC_MKBP_HAS_MORE_EVENTS_SHIFT 7 2182 + 2183 + /* 2184 + * We use the most significant bit of the event type to indicate to the host 2185 + * that the EC has more MKBP events available to provide. 2186 + */ 2187 + #define EC_MKBP_HAS_MORE_EVENTS BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) 2188 + 2189 + /* The mask to apply to get the raw event type */ 2190 + #define EC_MKBP_EVENT_TYPE_MASK (BIT(EC_MKBP_HAS_MORE_EVENTS_SHIFT) - 1) 3327 2191 3328 2192 enum ec_mkbp_event { 3329 2193 /* Keyboard matrix changed. The event data is the new matrix state. */ ··· 3352 2194 /* The state of the switches have changed. */ 3353 2195 EC_MKBP_EVENT_SWITCH = 4, 3354 2196 3355 - /* EC sent a sysrq command */ 2197 + /* New Fingerprint sensor event, the event data is fp_events bitmap. */ 2198 + EC_MKBP_EVENT_FINGERPRINT = 5, 2199 + 2200 + /* 2201 + * Sysrq event: send emulated sysrq. The event data is sysrq, 2202 + * corresponding to the key to be pressed. 2203 + */ 3356 2204 EC_MKBP_EVENT_SYSRQ = 6, 2205 + 2206 + /* 2207 + * New 64-bit host event. 2208 + * The event data is 8 bytes of host event flags. 2209 + */ 2210 + EC_MKBP_EVENT_HOST_EVENT64 = 7, 3357 2211 3358 2212 /* Notify the AP that something happened on CEC */ 3359 2213 EC_MKBP_EVENT_CEC_EVENT = 8, ··· 3376 2206 /* Number of MKBP events */ 3377 2207 EC_MKBP_EVENT_COUNT, 3378 2208 }; 2209 + BUILD_ASSERT(EC_MKBP_EVENT_COUNT <= EC_MKBP_EVENT_TYPE_MASK); 3379 2210 3380 - union ec_response_get_next_data { 3381 - uint8_t key_matrix[13]; 2211 + union __ec_align_offset1 ec_response_get_next_data { 2212 + uint8_t key_matrix[13]; 3382 2213 3383 2214 /* Unaligned */ 3384 - uint32_t host_event; 3385 - 3386 - uint32_t buttons; 3387 - uint32_t switches; 3388 - uint32_t sysrq; 3389 - } __packed; 3390 - 3391 - union ec_response_get_next_data_v1 { 3392 - uint8_t key_matrix[16]; 3393 2215 uint32_t host_event; 2216 + uint64_t host_event64; 2217 + 2218 + struct __ec_todo_unpacked { 2219 + /* For aligning the fifo_info */ 2220 + uint8_t reserved[3]; 2221 + struct ec_response_motion_sense_fifo_info info; 2222 + } sensor_fifo; 2223 + 3394 2224 uint32_t buttons; 2225 + 3395 2226 uint32_t switches; 2227 + 2228 + uint32_t fp_events; 2229 + 3396 2230 uint32_t sysrq; 2231 + 2232 + /* CEC events from enum mkbp_cec_event */ 3397 2233 uint32_t cec_events; 2234 + }; 2235 + 2236 + union __ec_align_offset1 ec_response_get_next_data_v1 { 2237 + uint8_t key_matrix[16]; 2238 + 2239 + /* Unaligned */ 2240 + uint32_t host_event; 2241 + uint64_t host_event64; 2242 + 2243 + struct __ec_todo_unpacked { 2244 + /* For aligning the fifo_info */ 2245 + uint8_t reserved[3]; 2246 + struct ec_response_motion_sense_fifo_info info; 2247 + } sensor_fifo; 2248 + 2249 + uint32_t buttons; 2250 + 2251 + uint32_t switches; 2252 + 2253 + uint32_t fp_events; 2254 + 2255 + uint32_t sysrq; 2256 + 2257 + /* CEC events from enum mkbp_cec_event */ 2258 + uint32_t cec_events; 2259 + 3398 2260 uint8_t cec_message[16]; 3399 - } __packed; 2261 + }; 2262 + BUILD_ASSERT(sizeof(union ec_response_get_next_data_v1) == 16); 3400 2263 3401 2264 struct ec_response_get_next_event { 3402 2265 uint8_t event_type; 3403 2266 /* Followed by event data if any */ 3404 2267 union ec_response_get_next_data data; 3405 - } __packed; 2268 + } __ec_align1; 3406 2269 3407 2270 struct ec_response_get_next_event_v1 { 3408 2271 uint8_t event_type; 3409 2272 /* Followed by event data if any */ 3410 2273 union ec_response_get_next_data_v1 data; 3411 - } __packed; 2274 + } __ec_align1; 3412 2275 3413 2276 /* Bit indices for buttons and switches.*/ 3414 2277 /* Buttons */ 3415 2278 #define EC_MKBP_POWER_BUTTON 0 3416 2279 #define EC_MKBP_VOL_UP 1 3417 2280 #define EC_MKBP_VOL_DOWN 2 2281 + #define EC_MKBP_RECOVERY 3 3418 2282 3419 2283 /* Switches */ 3420 2284 #define EC_MKBP_LID_OPEN 0 3421 2285 #define EC_MKBP_TABLET_MODE 1 3422 2286 #define EC_MKBP_BASE_ATTACHED 2 3423 2287 2288 + /* Run keyboard factory test scanning */ 2289 + #define EC_CMD_KEYBOARD_FACTORY_TEST 0x0068 2290 + 2291 + struct ec_response_keyboard_factory_test { 2292 + uint16_t shorted; /* Keyboard pins are shorted */ 2293 + } __ec_align2; 2294 + 2295 + /* Fingerprint events in 'fp_events' for EC_MKBP_EVENT_FINGERPRINT */ 2296 + #define EC_MKBP_FP_RAW_EVENT(fp_events) ((fp_events) & 0x00FFFFFF) 2297 + #define EC_MKBP_FP_ERRCODE(fp_events) ((fp_events) & 0x0000000F) 2298 + #define EC_MKBP_FP_ENROLL_PROGRESS_OFFSET 4 2299 + #define EC_MKBP_FP_ENROLL_PROGRESS(fpe) (((fpe) & 0x00000FF0) \ 2300 + >> EC_MKBP_FP_ENROLL_PROGRESS_OFFSET) 2301 + #define EC_MKBP_FP_MATCH_IDX_OFFSET 12 2302 + #define EC_MKBP_FP_MATCH_IDX_MASK 0x0000F000 2303 + #define EC_MKBP_FP_MATCH_IDX(fpe) (((fpe) & EC_MKBP_FP_MATCH_IDX_MASK) \ 2304 + >> EC_MKBP_FP_MATCH_IDX_OFFSET) 2305 + #define EC_MKBP_FP_ENROLL BIT(27) 2306 + #define EC_MKBP_FP_MATCH BIT(28) 2307 + #define EC_MKBP_FP_FINGER_DOWN BIT(29) 2308 + #define EC_MKBP_FP_FINGER_UP BIT(30) 2309 + #define EC_MKBP_FP_IMAGE_READY BIT(31) 2310 + /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_ENROLL is set */ 2311 + #define EC_MKBP_FP_ERR_ENROLL_OK 0 2312 + #define EC_MKBP_FP_ERR_ENROLL_LOW_QUALITY 1 2313 + #define EC_MKBP_FP_ERR_ENROLL_IMMOBILE 2 2314 + #define EC_MKBP_FP_ERR_ENROLL_LOW_COVERAGE 3 2315 + #define EC_MKBP_FP_ERR_ENROLL_INTERNAL 5 2316 + /* Can be used to detect if image was usable for enrollment or not. */ 2317 + #define EC_MKBP_FP_ERR_ENROLL_PROBLEM_MASK 1 2318 + /* code given by EC_MKBP_FP_ERRCODE() when EC_MKBP_FP_MATCH is set */ 2319 + #define EC_MKBP_FP_ERR_MATCH_NO 0 2320 + #define EC_MKBP_FP_ERR_MATCH_NO_INTERNAL 6 2321 + #define EC_MKBP_FP_ERR_MATCH_NO_TEMPLATES 7 2322 + #define EC_MKBP_FP_ERR_MATCH_NO_LOW_QUALITY 2 2323 + #define EC_MKBP_FP_ERR_MATCH_NO_LOW_COVERAGE 4 2324 + #define EC_MKBP_FP_ERR_MATCH_YES 1 2325 + #define EC_MKBP_FP_ERR_MATCH_YES_UPDATED 3 2326 + #define EC_MKBP_FP_ERR_MATCH_YES_UPDATE_FAILED 5 2327 + 2328 + 3424 2329 /*****************************************************************************/ 3425 2330 /* Temperature sensor commands */ 3426 2331 3427 2332 /* Read temperature sensor info */ 3428 - #define EC_CMD_TEMP_SENSOR_GET_INFO 0x70 2333 + #define EC_CMD_TEMP_SENSOR_GET_INFO 0x0070 3429 2334 3430 2335 struct ec_params_temp_sensor_get_info { 3431 2336 uint8_t id; 3432 - } __packed; 2337 + } __ec_align1; 3433 2338 3434 2339 struct ec_response_temp_sensor_get_info { 3435 2340 char sensor_name[32]; 3436 2341 uint8_t sensor_type; 3437 - } __packed; 2342 + } __ec_align1; 3438 2343 3439 2344 /*****************************************************************************/ 3440 2345 ··· 3522 2277 /*****************************************************************************/ 3523 2278 /* Host event commands */ 3524 2279 2280 + 2281 + /* Obsolete. New implementation should use EC_CMD_HOST_EVENT instead */ 3525 2282 /* 3526 2283 * Host event mask params and response structures, shared by all of the host 3527 2284 * event commands below. 3528 2285 */ 3529 2286 struct ec_params_host_event_mask { 3530 2287 uint32_t mask; 3531 - } __packed; 2288 + } __ec_align4; 3532 2289 3533 2290 struct ec_response_host_event_mask { 3534 2291 uint32_t mask; 3535 - } __packed; 2292 + } __ec_align4; 3536 2293 3537 2294 /* These all use ec_response_host_event_mask */ 3538 - #define EC_CMD_HOST_EVENT_GET_B 0x87 3539 - #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x88 3540 - #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x89 3541 - #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x8d 2295 + #define EC_CMD_HOST_EVENT_GET_B 0x0087 2296 + #define EC_CMD_HOST_EVENT_GET_SMI_MASK 0x0088 2297 + #define EC_CMD_HOST_EVENT_GET_SCI_MASK 0x0089 2298 + #define EC_CMD_HOST_EVENT_GET_WAKE_MASK 0x008D 3542 2299 3543 2300 /* These all use ec_params_host_event_mask */ 3544 - #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x8a 3545 - #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x8b 3546 - #define EC_CMD_HOST_EVENT_CLEAR 0x8c 3547 - #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x8e 3548 - #define EC_CMD_HOST_EVENT_CLEAR_B 0x8f 2301 + #define EC_CMD_HOST_EVENT_SET_SMI_MASK 0x008A 2302 + #define EC_CMD_HOST_EVENT_SET_SCI_MASK 0x008B 2303 + #define EC_CMD_HOST_EVENT_CLEAR 0x008C 2304 + #define EC_CMD_HOST_EVENT_SET_WAKE_MASK 0x008E 2305 + #define EC_CMD_HOST_EVENT_CLEAR_B 0x008F 2306 + 2307 + /* 2308 + * Unified host event programming interface - Should be used by newer versions 2309 + * of BIOS/OS to program host events and masks 2310 + */ 2311 + 2312 + struct ec_params_host_event { 2313 + 2314 + /* Action requested by host - one of enum ec_host_event_action. */ 2315 + uint8_t action; 2316 + 2317 + /* 2318 + * Mask type that the host requested the action on - one of 2319 + * enum ec_host_event_mask_type. 2320 + */ 2321 + uint8_t mask_type; 2322 + 2323 + /* Set to 0, ignore on read */ 2324 + uint16_t reserved; 2325 + 2326 + /* Value to be used in case of set operations. */ 2327 + uint64_t value; 2328 + } __ec_align4; 2329 + 2330 + /* 2331 + * Response structure returned by EC_CMD_HOST_EVENT. 2332 + * Update the value on a GET request. Set to 0 on GET/CLEAR 2333 + */ 2334 + 2335 + struct ec_response_host_event { 2336 + 2337 + /* Mask value in case of get operation */ 2338 + uint64_t value; 2339 + } __ec_align4; 2340 + 2341 + enum ec_host_event_action { 2342 + /* 2343 + * params.value is ignored. Value of mask_type populated 2344 + * in response.value 2345 + */ 2346 + EC_HOST_EVENT_GET, 2347 + 2348 + /* Bits in params.value are set */ 2349 + EC_HOST_EVENT_SET, 2350 + 2351 + /* Bits in params.value are cleared */ 2352 + EC_HOST_EVENT_CLEAR, 2353 + }; 2354 + 2355 + enum ec_host_event_mask_type { 2356 + 2357 + /* Main host event copy */ 2358 + EC_HOST_EVENT_MAIN, 2359 + 2360 + /* Copy B of host events */ 2361 + EC_HOST_EVENT_B, 2362 + 2363 + /* SCI Mask */ 2364 + EC_HOST_EVENT_SCI_MASK, 2365 + 2366 + /* SMI Mask */ 2367 + EC_HOST_EVENT_SMI_MASK, 2368 + 2369 + /* Mask of events that should be always reported in hostevents */ 2370 + EC_HOST_EVENT_ALWAYS_REPORT_MASK, 2371 + 2372 + /* Active wake mask */ 2373 + EC_HOST_EVENT_ACTIVE_WAKE_MASK, 2374 + 2375 + /* Lazy wake mask for S0ix */ 2376 + EC_HOST_EVENT_LAZY_WAKE_MASK_S0IX, 2377 + 2378 + /* Lazy wake mask for S3 */ 2379 + EC_HOST_EVENT_LAZY_WAKE_MASK_S3, 2380 + 2381 + /* Lazy wake mask for S5 */ 2382 + EC_HOST_EVENT_LAZY_WAKE_MASK_S5, 2383 + }; 2384 + 2385 + #define EC_CMD_HOST_EVENT 0x00A4 3549 2386 3550 2387 /*****************************************************************************/ 3551 2388 /* Switch commands */ 3552 2389 3553 2390 /* Enable/disable LCD backlight */ 3554 - #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x90 2391 + #define EC_CMD_SWITCH_ENABLE_BKLIGHT 0x0090 3555 2392 3556 2393 struct ec_params_switch_enable_backlight { 3557 2394 uint8_t enabled; 3558 - } __packed; 2395 + } __ec_align1; 3559 2396 3560 2397 /* Enable/disable WLAN/Bluetooth */ 3561 - #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x91 2398 + #define EC_CMD_SWITCH_ENABLE_WIRELESS 0x0091 3562 2399 #define EC_VER_SWITCH_ENABLE_WIRELESS 1 3563 2400 3564 2401 /* Version 0 params; no response */ 3565 2402 struct ec_params_switch_enable_wireless_v0 { 3566 2403 uint8_t enabled; 3567 - } __packed; 2404 + } __ec_align1; 3568 2405 3569 2406 /* Version 1 params */ 3570 2407 struct ec_params_switch_enable_wireless_v1 { ··· 3665 2338 3666 2339 /* Which flags to copy from suspend_flags */ 3667 2340 uint8_t suspend_mask; 3668 - } __packed; 2341 + } __ec_align1; 3669 2342 3670 2343 /* Version 1 response */ 3671 2344 struct ec_response_switch_enable_wireless_v1 { ··· 3674 2347 3675 2348 /* Flags to leave enabled in S3 */ 3676 2349 uint8_t suspend_flags; 3677 - } __packed; 2350 + } __ec_align1; 3678 2351 3679 2352 /*****************************************************************************/ 3680 2353 /* GPIO commands. Only available on EC if write protect has been disabled. */ 3681 2354 3682 2355 /* Set GPIO output value */ 3683 - #define EC_CMD_GPIO_SET 0x92 2356 + #define EC_CMD_GPIO_SET 0x0092 3684 2357 3685 2358 struct ec_params_gpio_set { 3686 2359 char name[32]; 3687 2360 uint8_t val; 3688 - } __packed; 2361 + } __ec_align1; 3689 2362 3690 2363 /* Get GPIO value */ 3691 - #define EC_CMD_GPIO_GET 0x93 2364 + #define EC_CMD_GPIO_GET 0x0093 3692 2365 3693 2366 /* Version 0 of input params and response */ 3694 2367 struct ec_params_gpio_get { 3695 2368 char name[32]; 3696 - } __packed; 2369 + } __ec_align1; 2370 + 3697 2371 struct ec_response_gpio_get { 3698 2372 uint8_t val; 3699 - } __packed; 2373 + } __ec_align1; 3700 2374 3701 2375 /* Version 1 of input params and response */ 3702 2376 struct ec_params_gpio_get_v1 { 3703 2377 uint8_t subcmd; 3704 2378 union { 3705 - struct { 2379 + struct __ec_align1 { 3706 2380 char name[32]; 3707 2381 } get_value_by_name; 3708 - struct { 2382 + struct __ec_align1 { 3709 2383 uint8_t index; 3710 2384 } get_info; 3711 2385 }; 3712 - } __packed; 2386 + } __ec_align1; 3713 2387 3714 2388 struct ec_response_gpio_get_v1 { 3715 2389 union { 3716 - struct { 2390 + struct __ec_align1 { 3717 2391 uint8_t val; 3718 2392 } get_value_by_name, get_count; 3719 - struct { 2393 + struct __ec_todo_unpacked { 3720 2394 uint8_t val; 3721 2395 char name[32]; 3722 2396 uint32_t flags; 3723 2397 } get_info; 3724 2398 }; 3725 - } __packed; 2399 + } __ec_todo_packed; 3726 2400 3727 2401 enum gpio_get_subcmd { 3728 2402 EC_GPIO_GET_BY_NAME = 0, ··· 3735 2407 /* I2C commands. Only available when flash write protect is unlocked. */ 3736 2408 3737 2409 /* 3738 - * TODO(crosbug.com/p/23570): These commands are deprecated, and will be 3739 - * removed soon. Use EC_CMD_I2C_XFER instead. 2410 + * CAUTION: These commands are deprecated, and are not supported anymore in EC 2411 + * builds >= 8398.0.0 (see crosbug.com/p/23570). 2412 + * 2413 + * Use EC_CMD_I2C_PASSTHRU instead. 3740 2414 */ 3741 2415 3742 2416 /* Read I2C bus */ 3743 - #define EC_CMD_I2C_READ 0x94 2417 + #define EC_CMD_I2C_READ 0x0094 3744 2418 3745 2419 struct ec_params_i2c_read { 3746 2420 uint16_t addr; /* 8-bit address (7-bit shifted << 1) */ 3747 2421 uint8_t read_size; /* Either 8 or 16. */ 3748 2422 uint8_t port; 3749 2423 uint8_t offset; 3750 - } __packed; 2424 + } __ec_align_size1; 2425 + 3751 2426 struct ec_response_i2c_read { 3752 2427 uint16_t data; 3753 - } __packed; 2428 + } __ec_align2; 3754 2429 3755 2430 /* Write I2C bus */ 3756 - #define EC_CMD_I2C_WRITE 0x95 2431 + #define EC_CMD_I2C_WRITE 0x0095 3757 2432 3758 2433 struct ec_params_i2c_write { 3759 2434 uint16_t data; ··· 3764 2433 uint8_t write_size; /* Either 8 or 16. */ 3765 2434 uint8_t port; 3766 2435 uint8_t offset; 3767 - } __packed; 2436 + } __ec_align_size1; 3768 2437 3769 2438 /*****************************************************************************/ 3770 2439 /* Charge state commands. Only available when flash write protect unlocked. */ ··· 3772 2441 /* Force charge state machine to stop charging the battery or force it to 3773 2442 * discharge the battery. 3774 2443 */ 3775 - #define EC_CMD_CHARGE_CONTROL 0x96 2444 + #define EC_CMD_CHARGE_CONTROL 0x0096 3776 2445 #define EC_VER_CHARGE_CONTROL 1 3777 2446 3778 2447 enum ec_charge_control_mode { ··· 3783 2452 3784 2453 struct ec_params_charge_control { 3785 2454 uint32_t mode; /* enum charge_control_mode */ 3786 - } __packed; 2455 + } __ec_align4; 3787 2456 3788 2457 /*****************************************************************************/ 3789 - /* Console commands. Only available when flash write protect is unlocked. */ 3790 2458 3791 2459 /* Snapshot console output buffer for use by EC_CMD_CONSOLE_READ. */ 3792 - #define EC_CMD_CONSOLE_SNAPSHOT 0x97 2460 + #define EC_CMD_CONSOLE_SNAPSHOT 0x0097 3793 2461 3794 2462 /* 3795 2463 * Read data from the saved snapshot. If the subcmd parameter is ··· 3802 2472 * Response is null-terminated string. Empty string, if there is no more 3803 2473 * remaining output. 3804 2474 */ 3805 - #define EC_CMD_CONSOLE_READ 0x98 2475 + #define EC_CMD_CONSOLE_READ 0x0098 3806 2476 3807 2477 enum ec_console_read_subcmd { 3808 2478 CONSOLE_READ_NEXT = 0, ··· 3811 2481 3812 2482 struct ec_params_console_read_v1 { 3813 2483 uint8_t subcmd; /* enum ec_console_read_subcmd */ 3814 - } __packed; 2484 + } __ec_align1; 3815 2485 3816 2486 /*****************************************************************************/ 3817 2487 ··· 3822 2492 * EC_RES_SUCCESS if the command was successful. 3823 2493 * EC_RES_ERROR if the cut off command failed. 3824 2494 */ 2495 + #define EC_CMD_BATTERY_CUT_OFF 0x0099 3825 2496 3826 - #define EC_CMD_BATTERY_CUT_OFF 0x99 3827 - 3828 - #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN (1 << 0) 2497 + #define EC_BATTERY_CUTOFF_FLAG_AT_SHUTDOWN BIT(0) 3829 2498 3830 2499 struct ec_params_battery_cutoff { 3831 2500 uint8_t flags; 3832 - } __packed; 2501 + } __ec_align1; 3833 2502 3834 2503 /*****************************************************************************/ 3835 2504 /* USB port mux control. */ ··· 3836 2507 /* 3837 2508 * Switch USB mux or return to automatic switching. 3838 2509 */ 3839 - #define EC_CMD_USB_MUX 0x9a 2510 + #define EC_CMD_USB_MUX 0x009A 3840 2511 3841 2512 struct ec_params_usb_mux { 3842 2513 uint8_t mux; 3843 - } __packed; 2514 + } __ec_align1; 3844 2515 3845 2516 /*****************************************************************************/ 3846 2517 /* LDOs / FETs control. */ ··· 3853 2524 /* 3854 2525 * Switch on/off a LDO. 3855 2526 */ 3856 - #define EC_CMD_LDO_SET 0x9b 2527 + #define EC_CMD_LDO_SET 0x009B 3857 2528 3858 2529 struct ec_params_ldo_set { 3859 2530 uint8_t index; 3860 2531 uint8_t state; 3861 - } __packed; 2532 + } __ec_align1; 3862 2533 3863 2534 /* 3864 2535 * Get LDO state. 3865 2536 */ 3866 - #define EC_CMD_LDO_GET 0x9c 2537 + #define EC_CMD_LDO_GET 0x009C 3867 2538 3868 2539 struct ec_params_ldo_get { 3869 2540 uint8_t index; 3870 - } __packed; 2541 + } __ec_align1; 3871 2542 3872 2543 struct ec_response_ldo_get { 3873 2544 uint8_t state; 3874 - } __packed; 2545 + } __ec_align1; 3875 2546 3876 2547 /*****************************************************************************/ 3877 2548 /* Power info. */ ··· 3879 2550 /* 3880 2551 * Get power info. 3881 2552 */ 3882 - #define EC_CMD_POWER_INFO 0x9d 2553 + #define EC_CMD_POWER_INFO 0x009D 3883 2554 3884 2555 struct ec_response_power_info { 3885 2556 uint32_t usb_dev_type; ··· 3887 2558 uint16_t voltage_system; 3888 2559 uint16_t current_system; 3889 2560 uint16_t usb_current_limit; 3890 - } __packed; 2561 + } __ec_align4; 3891 2562 3892 2563 /*****************************************************************************/ 3893 2564 /* I2C passthru command */ 3894 2565 3895 - #define EC_CMD_I2C_PASSTHRU 0x9e 2566 + #define EC_CMD_I2C_PASSTHRU 0x009E 3896 2567 3897 2568 /* Read data; if not present, message is a write */ 3898 - #define EC_I2C_FLAG_READ (1 << 15) 2569 + #define EC_I2C_FLAG_READ BIT(15) 3899 2570 3900 2571 /* Mask for address */ 3901 2572 #define EC_I2C_ADDR_MASK 0x3ff 3902 2573 3903 - #define EC_I2C_STATUS_NAK (1 << 0) /* Transfer was not acknowledged */ 3904 - #define EC_I2C_STATUS_TIMEOUT (1 << 1) /* Timeout during transfer */ 2574 + #define EC_I2C_STATUS_NAK BIT(0) /* Transfer was not acknowledged */ 2575 + #define EC_I2C_STATUS_TIMEOUT BIT(1) /* Timeout during transfer */ 3905 2576 3906 2577 /* Any error */ 3907 2578 #define EC_I2C_STATUS_ERROR (EC_I2C_STATUS_NAK | EC_I2C_STATUS_TIMEOUT) ··· 3909 2580 struct ec_params_i2c_passthru_msg { 3910 2581 uint16_t addr_flags; /* I2C slave address (7 or 10 bits) and flags */ 3911 2582 uint16_t len; /* Number of bytes to read or write */ 3912 - } __packed; 2583 + } __ec_align2; 3913 2584 3914 2585 struct ec_params_i2c_passthru { 3915 2586 uint8_t port; /* I2C port number */ 3916 2587 uint8_t num_msgs; /* Number of messages */ 3917 2588 struct ec_params_i2c_passthru_msg msg[]; 3918 2589 /* Data to write for all messages is concatenated here */ 3919 - } __packed; 2590 + } __ec_align2; 3920 2591 3921 2592 struct ec_response_i2c_passthru { 3922 2593 uint8_t i2c_status; /* Status flags (EC_I2C_STATUS_...) */ 3923 2594 uint8_t num_msgs; /* Number of messages processed */ 3924 2595 uint8_t data[]; /* Data read by messages concatenated here */ 3925 - } __packed; 2596 + } __ec_align1; 3926 2597 3927 2598 /*****************************************************************************/ 3928 2599 /* Power button hang detect */ 3929 2600 3930 - #define EC_CMD_HANG_DETECT 0x9f 2601 + #define EC_CMD_HANG_DETECT 0x009F 3931 2602 3932 2603 /* Reasons to start hang detection timer */ 3933 2604 /* Power button pressed */ 3934 - #define EC_HANG_START_ON_POWER_PRESS (1 << 0) 2605 + #define EC_HANG_START_ON_POWER_PRESS BIT(0) 3935 2606 3936 2607 /* Lid closed */ 3937 - #define EC_HANG_START_ON_LID_CLOSE (1 << 1) 2608 + #define EC_HANG_START_ON_LID_CLOSE BIT(1) 3938 2609 3939 2610 /* Lid opened */ 3940 - #define EC_HANG_START_ON_LID_OPEN (1 << 2) 2611 + #define EC_HANG_START_ON_LID_OPEN BIT(2) 3941 2612 3942 2613 /* Start of AP S3->S0 transition (booting or resuming from suspend) */ 3943 - #define EC_HANG_START_ON_RESUME (1 << 3) 2614 + #define EC_HANG_START_ON_RESUME BIT(3) 3944 2615 3945 2616 /* Reasons to cancel hang detection */ 3946 2617 3947 2618 /* Power button released */ 3948 - #define EC_HANG_STOP_ON_POWER_RELEASE (1 << 8) 2619 + #define EC_HANG_STOP_ON_POWER_RELEASE BIT(8) 3949 2620 3950 2621 /* Any host command from AP received */ 3951 - #define EC_HANG_STOP_ON_HOST_COMMAND (1 << 9) 2622 + #define EC_HANG_STOP_ON_HOST_COMMAND BIT(9) 3952 2623 3953 2624 /* Stop on end of AP S0->S3 transition (suspending or shutting down) */ 3954 - #define EC_HANG_STOP_ON_SUSPEND (1 << 10) 2625 + #define EC_HANG_STOP_ON_SUSPEND BIT(10) 3955 2626 3956 2627 /* 3957 2628 * If this flag is set, all the other fields are ignored, and the hang detect ··· 3959 2630 * without reconfiguring any of the other hang detect settings. Note that 3960 2631 * you must previously have configured the timeouts. 3961 2632 */ 3962 - #define EC_HANG_START_NOW (1 << 30) 2633 + #define EC_HANG_START_NOW BIT(30) 3963 2634 3964 2635 /* 3965 2636 * If this flag is set, all the other fields are ignored (including 3966 2637 * EC_HANG_START_NOW). This provides the AP a way to stop the hang timer 3967 2638 * without reconfiguring any of the other hang detect settings. 3968 2639 */ 3969 - #define EC_HANG_STOP_NOW (1 << 31) 2640 + #define EC_HANG_STOP_NOW BIT(31) 3970 2641 3971 2642 struct ec_params_hang_detect { 3972 2643 /* Flags; see EC_HANG_* */ ··· 3977 2648 3978 2649 /* Timeout in msec before generating warm reboot, if enabled */ 3979 2650 uint16_t warm_reboot_timeout_msec; 3980 - } __packed; 2651 + } __ec_align4; 3981 2652 3982 2653 /*****************************************************************************/ 3983 2654 /* Commands for battery charging */ ··· 3986 2657 * This is the single catch-all host command to exchange data regarding the 3987 2658 * charge state machine (v2 and up). 3988 2659 */ 3989 - #define EC_CMD_CHARGE_STATE 0xa0 2660 + #define EC_CMD_CHARGE_STATE 0x00A0 3990 2661 3991 2662 /* Subcommands for this host command */ 3992 2663 enum charge_state_command { ··· 4006 2677 CS_PARAM_CHG_INPUT_CURRENT, /* charger input current limit */ 4007 2678 CS_PARAM_CHG_STATUS, /* charger-specific status */ 4008 2679 CS_PARAM_CHG_OPTION, /* charger-specific options */ 2680 + CS_PARAM_LIMIT_POWER, /* 2681 + * Check if power is limited due to 2682 + * low battery and / or a weak external 2683 + * charger. READ ONLY. 2684 + */ 4009 2685 /* How many so far? */ 4010 2686 CS_NUM_BASE_PARAMS, 4011 2687 ··· 4018 2684 CS_PARAM_CUSTOM_PROFILE_MIN = 0x10000, 4019 2685 CS_PARAM_CUSTOM_PROFILE_MAX = 0x1ffff, 4020 2686 2687 + /* Range for CONFIG_CHARGE_STATE_DEBUG params */ 2688 + CS_PARAM_DEBUG_MIN = 0x20000, 2689 + CS_PARAM_DEBUG_CTL_MODE = 0x20000, 2690 + CS_PARAM_DEBUG_MANUAL_MODE, 2691 + CS_PARAM_DEBUG_SEEMS_DEAD, 2692 + CS_PARAM_DEBUG_SEEMS_DISCONNECTED, 2693 + CS_PARAM_DEBUG_BATT_REMOVED, 2694 + CS_PARAM_DEBUG_MANUAL_CURRENT, 2695 + CS_PARAM_DEBUG_MANUAL_VOLTAGE, 2696 + CS_PARAM_DEBUG_MAX = 0x2ffff, 2697 + 4021 2698 /* Other custom param ranges go here... */ 4022 2699 }; 4023 2700 4024 2701 struct ec_params_charge_state { 4025 2702 uint8_t cmd; /* enum charge_state_command */ 4026 2703 union { 4027 - struct { 4028 - /* no args */ 4029 - } get_state; 2704 + /* get_state has no args */ 4030 2705 4031 - struct { 2706 + struct __ec_todo_unpacked { 4032 2707 uint32_t param; /* enum charge_state_param */ 4033 2708 } get_param; 4034 2709 4035 - struct { 2710 + struct __ec_todo_unpacked { 4036 2711 uint32_t param; /* param to set */ 4037 2712 uint32_t value; /* value to set */ 4038 2713 } set_param; 4039 2714 }; 4040 - } __packed; 2715 + } __ec_todo_packed; 4041 2716 4042 2717 struct ec_response_charge_state { 4043 2718 union { 4044 - struct { 2719 + struct __ec_align4 { 4045 2720 int ac; 4046 2721 int chg_voltage; 4047 2722 int chg_current; ··· 4058 2715 int batt_state_of_charge; 4059 2716 } get_state; 4060 2717 4061 - struct { 2718 + struct __ec_align4 { 4062 2719 uint32_t value; 4063 2720 } get_param; 4064 - struct { 4065 - /* no return values */ 4066 - } set_param; 2721 + 2722 + /* set_param returns no args */ 4067 2723 }; 4068 - } __packed; 2724 + } __ec_align4; 4069 2725 4070 2726 4071 2727 /* 4072 2728 * Set maximum battery charging current. 4073 2729 */ 4074 - #define EC_CMD_CHARGE_CURRENT_LIMIT 0xa1 2730 + #define EC_CMD_CHARGE_CURRENT_LIMIT 0x00A1 4075 2731 4076 2732 struct ec_params_current_limit { 4077 2733 uint32_t limit; /* in mA */ 4078 - } __packed; 2734 + } __ec_align4; 4079 2735 4080 2736 /* 4081 2737 * Set maximum external voltage / current. ··· 4085 2743 struct ec_params_external_power_limit_v1 { 4086 2744 uint16_t current_lim; /* in mA, or EC_POWER_LIMIT_NONE to clear limit */ 4087 2745 uint16_t voltage_lim; /* in mV, or EC_POWER_LIMIT_NONE to clear limit */ 4088 - } __packed; 2746 + } __ec_align2; 4089 2747 4090 2748 #define EC_POWER_LIMIT_NONE 0xffff 4091 2749 2750 + /* 2751 + * Set maximum voltage & current of a dedicated charge port 2752 + */ 2753 + #define EC_CMD_OVERRIDE_DEDICATED_CHARGER_LIMIT 0x00A3 2754 + 2755 + struct ec_params_dedicated_charger_limit { 2756 + uint16_t current_lim; /* in mA */ 2757 + uint16_t voltage_lim; /* in mV */ 2758 + } __ec_align2; 2759 + 2760 + /*****************************************************************************/ 2761 + /* Hibernate/Deep Sleep Commands */ 2762 + 2763 + /* Set the delay before going into hibernation. */ 2764 + #define EC_CMD_HIBERNATION_DELAY 0x00A8 2765 + 2766 + struct ec_params_hibernation_delay { 2767 + /* 2768 + * Seconds to wait in G3 before hibernate. Pass in 0 to read the 2769 + * current settings without changing them. 2770 + */ 2771 + uint32_t seconds; 2772 + } __ec_align4; 2773 + 2774 + struct ec_response_hibernation_delay { 2775 + /* 2776 + * The current time in seconds in which the system has been in the G3 2777 + * state. This value is reset if the EC transitions out of G3. 2778 + */ 2779 + uint32_t time_g3; 2780 + 2781 + /* 2782 + * The current time remaining in seconds until the EC should hibernate. 2783 + * This value is also reset if the EC transitions out of G3. 2784 + */ 2785 + uint32_t time_remaining; 2786 + 2787 + /* 2788 + * The current time in seconds that the EC should wait in G3 before 2789 + * hibernating. 2790 + */ 2791 + uint32_t hibernate_delay; 2792 + } __ec_align4; 2793 + 4092 2794 /* Inform the EC when entering a sleep state */ 4093 - #define EC_CMD_HOST_SLEEP_EVENT 0xa9 2795 + #define EC_CMD_HOST_SLEEP_EVENT 0x00A9 4094 2796 4095 2797 enum host_sleep_event { 4096 2798 HOST_SLEEP_EVENT_S3_SUSPEND = 1, 4097 2799 HOST_SLEEP_EVENT_S3_RESUME = 2, 4098 2800 HOST_SLEEP_EVENT_S0IX_SUSPEND = 3, 4099 - HOST_SLEEP_EVENT_S0IX_RESUME = 4 2801 + HOST_SLEEP_EVENT_S0IX_RESUME = 4, 2802 + /* S3 suspend with additional enabled wake sources */ 2803 + HOST_SLEEP_EVENT_S3_WAKEABLE_SUSPEND = 5, 4100 2804 }; 4101 2805 4102 2806 struct ec_params_host_sleep_event { 4103 2807 uint8_t sleep_event; 4104 - } __packed; 2808 + } __ec_align1; 4105 2809 4106 2810 /* 4107 2811 * Use a default timeout value (CONFIG_SLEEP_TIMEOUT_MS) for detecting sleep ··· 4178 2790 4179 2791 /* No parameters for non-suspend messages. */ 4180 2792 }; 4181 - } __packed; 2793 + } __ec_align2; 4182 2794 4183 2795 /* A timeout occurred when this bit is set */ 4184 2796 #define EC_HOST_RESUME_SLEEP_TIMEOUT 0x80000000 ··· 4204 2816 4205 2817 /* No response fields for non-resume messages. */ 4206 2818 }; 4207 - } __packed; 2819 + } __ec_align4; 2820 + 2821 + /*****************************************************************************/ 2822 + /* Device events */ 2823 + #define EC_CMD_DEVICE_EVENT 0x00AA 2824 + 2825 + enum ec_device_event { 2826 + EC_DEVICE_EVENT_TRACKPAD, 2827 + EC_DEVICE_EVENT_DSP, 2828 + EC_DEVICE_EVENT_WIFI, 2829 + }; 2830 + 2831 + enum ec_device_event_param { 2832 + /* Get and clear pending device events */ 2833 + EC_DEVICE_EVENT_PARAM_GET_CURRENT_EVENTS, 2834 + /* Get device event mask */ 2835 + EC_DEVICE_EVENT_PARAM_GET_ENABLED_EVENTS, 2836 + /* Set device event mask */ 2837 + EC_DEVICE_EVENT_PARAM_SET_ENABLED_EVENTS, 2838 + }; 2839 + 2840 + #define EC_DEVICE_EVENT_MASK(event_code) BIT(event_code % 32) 2841 + 2842 + struct ec_params_device_event { 2843 + uint32_t event_mask; 2844 + uint8_t param; 2845 + } __ec_align_size1; 2846 + 2847 + struct ec_response_device_event { 2848 + uint32_t event_mask; 2849 + } __ec_align4; 4208 2850 4209 2851 /*****************************************************************************/ 4210 2852 /* Smart battery pass-through */ 4211 2853 4212 2854 /* Get / Set 16-bit smart battery registers */ 4213 - #define EC_CMD_SB_READ_WORD 0xb0 4214 - #define EC_CMD_SB_WRITE_WORD 0xb1 2855 + #define EC_CMD_SB_READ_WORD 0x00B0 2856 + #define EC_CMD_SB_WRITE_WORD 0x00B1 4215 2857 4216 2858 /* Get / Set string smart battery parameters 4217 2859 * formatted as SMBUS "block". 4218 2860 */ 4219 - #define EC_CMD_SB_READ_BLOCK 0xb2 4220 - #define EC_CMD_SB_WRITE_BLOCK 0xb3 2861 + #define EC_CMD_SB_READ_BLOCK 0x00B2 2862 + #define EC_CMD_SB_WRITE_BLOCK 0x00B3 4221 2863 4222 2864 struct ec_params_sb_rd { 4223 2865 uint8_t reg; 4224 - } __packed; 2866 + } __ec_align1; 4225 2867 4226 2868 struct ec_response_sb_rd_word { 4227 2869 uint16_t value; 4228 - } __packed; 2870 + } __ec_align2; 4229 2871 4230 2872 struct ec_params_sb_wr_word { 4231 2873 uint8_t reg; 4232 2874 uint16_t value; 4233 - } __packed; 2875 + } __ec_align1; 4234 2876 4235 2877 struct ec_response_sb_rd_block { 4236 2878 uint8_t data[32]; 4237 - } __packed; 2879 + } __ec_align1; 4238 2880 4239 2881 struct ec_params_sb_wr_block { 4240 2882 uint8_t reg; 4241 2883 uint16_t data[32]; 4242 - } __packed; 2884 + } __ec_align1; 4243 2885 4244 2886 /*****************************************************************************/ 4245 2887 /* Battery vendor parameters ··· 4280 2862 * requested value. 4281 2863 */ 4282 2864 4283 - #define EC_CMD_BATTERY_VENDOR_PARAM 0xb4 2865 + #define EC_CMD_BATTERY_VENDOR_PARAM 0x00B4 4284 2866 4285 2867 enum ec_battery_vendor_param_mode { 4286 2868 BATTERY_VENDOR_PARAM_MODE_GET = 0, ··· 4291 2873 uint32_t param; 4292 2874 uint32_t value; 4293 2875 uint8_t mode; 4294 - } __packed; 2876 + } __ec_align_size1; 4295 2877 4296 2878 struct ec_response_battery_vendor_param { 4297 2879 uint32_t value; 4298 - } __packed; 2880 + } __ec_align4; 4299 2881 4300 2882 /*****************************************************************************/ 2883 + /* 2884 + * Smart Battery Firmware Update Commands 2885 + */ 2886 + #define EC_CMD_SB_FW_UPDATE 0x00B5 2887 + 2888 + enum ec_sb_fw_update_subcmd { 2889 + EC_SB_FW_UPDATE_PREPARE = 0x0, 2890 + EC_SB_FW_UPDATE_INFO = 0x1, /*query sb info */ 2891 + EC_SB_FW_UPDATE_BEGIN = 0x2, /*check if protected */ 2892 + EC_SB_FW_UPDATE_WRITE = 0x3, /*check if protected */ 2893 + EC_SB_FW_UPDATE_END = 0x4, 2894 + EC_SB_FW_UPDATE_STATUS = 0x5, 2895 + EC_SB_FW_UPDATE_PROTECT = 0x6, 2896 + EC_SB_FW_UPDATE_MAX = 0x7, 2897 + }; 2898 + 2899 + #define SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE 32 2900 + #define SB_FW_UPDATE_CMD_STATUS_SIZE 2 2901 + #define SB_FW_UPDATE_CMD_INFO_SIZE 8 2902 + 2903 + struct ec_sb_fw_update_header { 2904 + uint16_t subcmd; /* enum ec_sb_fw_update_subcmd */ 2905 + uint16_t fw_id; /* firmware id */ 2906 + } __ec_align4; 2907 + 2908 + struct ec_params_sb_fw_update { 2909 + struct ec_sb_fw_update_header hdr; 2910 + union { 2911 + /* EC_SB_FW_UPDATE_PREPARE = 0x0 */ 2912 + /* EC_SB_FW_UPDATE_INFO = 0x1 */ 2913 + /* EC_SB_FW_UPDATE_BEGIN = 0x2 */ 2914 + /* EC_SB_FW_UPDATE_END = 0x4 */ 2915 + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 2916 + /* EC_SB_FW_UPDATE_PROTECT = 0x6 */ 2917 + /* Those have no args */ 2918 + 2919 + /* EC_SB_FW_UPDATE_WRITE = 0x3 */ 2920 + struct __ec_align4 { 2921 + uint8_t data[SB_FW_UPDATE_CMD_WRITE_BLOCK_SIZE]; 2922 + } write; 2923 + }; 2924 + } __ec_align4; 2925 + 2926 + struct ec_response_sb_fw_update { 2927 + union { 2928 + /* EC_SB_FW_UPDATE_INFO = 0x1 */ 2929 + struct __ec_align1 { 2930 + uint8_t data[SB_FW_UPDATE_CMD_INFO_SIZE]; 2931 + } info; 2932 + 2933 + /* EC_SB_FW_UPDATE_STATUS = 0x5 */ 2934 + struct __ec_align1 { 2935 + uint8_t data[SB_FW_UPDATE_CMD_STATUS_SIZE]; 2936 + } status; 2937 + }; 2938 + } __ec_align1; 2939 + 2940 + /* 2941 + * Entering Verified Boot Mode Command 2942 + * Default mode is VBOOT_MODE_NORMAL if EC did not receive this command. 2943 + * Valid Modes are: normal, developer, and recovery. 2944 + */ 2945 + #define EC_CMD_ENTERING_MODE 0x00B6 2946 + 2947 + struct ec_params_entering_mode { 2948 + int vboot_mode; 2949 + } __ec_align4; 2950 + 2951 + #define VBOOT_MODE_NORMAL 0 2952 + #define VBOOT_MODE_DEVELOPER 1 2953 + #define VBOOT_MODE_RECOVERY 2 2954 + 2955 + /*****************************************************************************/ 2956 + /* 2957 + * I2C passthru protection command: Protects I2C tunnels against access on 2958 + * certain addresses (board-specific). 2959 + */ 2960 + #define EC_CMD_I2C_PASSTHRU_PROTECT 0x00B7 2961 + 2962 + enum ec_i2c_passthru_protect_subcmd { 2963 + EC_CMD_I2C_PASSTHRU_PROTECT_STATUS = 0x0, 2964 + EC_CMD_I2C_PASSTHRU_PROTECT_ENABLE = 0x1, 2965 + }; 2966 + 2967 + struct ec_params_i2c_passthru_protect { 2968 + uint8_t subcmd; 2969 + uint8_t port; /* I2C port number */ 2970 + } __ec_align1; 2971 + 2972 + struct ec_response_i2c_passthru_protect { 2973 + uint8_t status; /* Status flags (0: unlocked, 1: locked) */ 2974 + } __ec_align1; 2975 + 2976 + 2977 + /*****************************************************************************/ 2978 + /* 2979 + * HDMI CEC commands 2980 + * 2981 + * These commands are for sending and receiving message via HDMI CEC 2982 + */ 2983 + 2984 + #define MAX_CEC_MSG_LEN 16 2985 + 2986 + /* CEC message from the AP to be written on the CEC bus */ 2987 + #define EC_CMD_CEC_WRITE_MSG 0x00B8 2988 + 2989 + /** 2990 + * struct ec_params_cec_write - Message to write to the CEC bus 2991 + * @msg: message content to write to the CEC bus 2992 + */ 2993 + struct ec_params_cec_write { 2994 + uint8_t msg[MAX_CEC_MSG_LEN]; 2995 + } __ec_align1; 2996 + 2997 + /* Set various CEC parameters */ 2998 + #define EC_CMD_CEC_SET 0x00BA 2999 + 3000 + /** 3001 + * struct ec_params_cec_set - CEC parameters set 3002 + * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 3003 + * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 3004 + * or 1 to enable CEC functionality, in case cmd is 3005 + * CEC_CMD_LOGICAL_ADDRESS, this field encodes the requested logical 3006 + * address between 0 and 15 or 0xff to unregister 3007 + */ 3008 + struct ec_params_cec_set { 3009 + uint8_t cmd; /* enum cec_command */ 3010 + uint8_t val; 3011 + } __ec_align1; 3012 + 3013 + /* Read various CEC parameters */ 3014 + #define EC_CMD_CEC_GET 0x00BB 3015 + 3016 + /** 3017 + * struct ec_params_cec_get - CEC parameters get 3018 + * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 3019 + */ 3020 + struct ec_params_cec_get { 3021 + uint8_t cmd; /* enum cec_command */ 3022 + } __ec_align1; 3023 + 3024 + /** 3025 + * struct ec_response_cec_get - CEC parameters get response 3026 + * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 3027 + * disabled or 1 if CEC functionality is enabled, 3028 + * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 3029 + * configured logical address between 0 and 15 or 0xff if unregistered 3030 + */ 3031 + struct ec_response_cec_get { 3032 + uint8_t val; 3033 + } __ec_align1; 3034 + 3035 + /* CEC parameters command */ 3036 + enum cec_command { 3037 + /* CEC reading, writing and events enable */ 3038 + CEC_CMD_ENABLE, 3039 + /* CEC logical address */ 3040 + CEC_CMD_LOGICAL_ADDRESS, 3041 + }; 3042 + 3043 + /* Events from CEC to AP */ 3044 + enum mkbp_cec_event { 3045 + /* Outgoing message was acknowledged by a follower */ 3046 + EC_MKBP_CEC_SEND_OK = BIT(0), 3047 + /* Outgoing message was not acknowledged */ 3048 + EC_MKBP_CEC_SEND_FAILED = BIT(1), 3049 + }; 3050 + 3051 + /*****************************************************************************/ 3052 + 4301 3053 /* Commands for I2S recording on audio codec. */ 4302 3054 4303 3055 #define EC_CMD_CODEC_I2S 0x00BC 3056 + #define EC_WOV_I2S_SAMPLE_RATE 48000 4304 3057 4305 3058 enum ec_codec_i2s_subcmd { 4306 3059 EC_CODEC_SET_SAMPLE_DEPTH = 0x0, ··· 4481 2892 EC_CODEC_I2S_SET_CONFIG = 0x4, 4482 2893 EC_CODEC_I2S_SET_TDM_CONFIG = 0x5, 4483 2894 EC_CODEC_I2S_SET_BCLK = 0x6, 2895 + EC_CODEC_I2S_SUBCMD_COUNT = 0x7, 4484 2896 }; 4485 2897 4486 2898 enum ec_sample_depth_value { ··· 4498 2908 EC_DAI_FMT_PCM_TDM = 5, 4499 2909 }; 4500 2910 4501 - struct ec_param_codec_i2s { 4502 - /* 4503 - * enum ec_codec_i2s_subcmd 4504 - */ 2911 + /* 2912 + * For subcommand EC_CODEC_GET_GAIN. 2913 + */ 2914 + struct __ec_align1 ec_codec_i2s_gain { 2915 + uint8_t left; 2916 + uint8_t right; 2917 + }; 2918 + 2919 + struct __ec_todo_unpacked ec_param_codec_i2s_tdm { 2920 + int16_t ch0_delay; /* 0 to 496 */ 2921 + int16_t ch1_delay; /* -1 to 496 */ 2922 + uint8_t adjacent_to_ch0; 2923 + uint8_t adjacent_to_ch1; 2924 + }; 2925 + 2926 + struct __ec_todo_packed ec_param_codec_i2s { 2927 + /* enum ec_codec_i2s_subcmd */ 4505 2928 uint8_t cmd; 4506 2929 union { 4507 2930 /* ··· 4527 2924 * EC_CODEC_SET_GAIN 4528 2925 * Value should be 0~43 for both channels. 4529 2926 */ 4530 - struct ec_param_codec_i2s_set_gain { 4531 - uint8_t left; 4532 - uint8_t right; 4533 - } __packed gain; 2927 + struct ec_codec_i2s_gain gain; 4534 2928 4535 2929 /* 4536 2930 * EC_CODEC_I2S_ENABLE ··· 4536 2936 uint8_t i2s_enable; 4537 2937 4538 2938 /* 4539 - * EC_CODEC_I2S_SET_COFNIG 2939 + * EC_CODEC_I2S_SET_CONFIG 4540 2940 * Value should be one of ec_i2s_config. 4541 2941 */ 4542 2942 uint8_t i2s_config; ··· 4545 2945 * EC_CODEC_I2S_SET_TDM_CONFIG 4546 2946 * Value should be one of ec_i2s_config. 4547 2947 */ 4548 - struct ec_param_codec_i2s_tdm { 4549 - /* 4550 - * 0 to 496 4551 - */ 4552 - int16_t ch0_delay; 4553 - /* 4554 - * -1 to 496 4555 - */ 4556 - int16_t ch1_delay; 4557 - uint8_t adjacent_to_ch0; 4558 - uint8_t adjacent_to_ch1; 4559 - } __packed tdm_param; 2948 + struct ec_param_codec_i2s_tdm tdm_param; 4560 2949 4561 2950 /* 4562 2951 * EC_CODEC_I2S_SET_BCLK 4563 2952 */ 4564 2953 uint32_t bclk; 4565 2954 }; 4566 - } __packed; 2955 + }; 4567 2956 4568 - /* 4569 - * For subcommand EC_CODEC_GET_GAIN. 4570 - */ 4571 - struct ec_response_codec_gain { 4572 - uint8_t left; 4573 - uint8_t right; 4574 - } __packed; 4575 2957 4576 2958 /*****************************************************************************/ 4577 2959 /* System commands */ ··· 4562 2980 * TODO(crosbug.com/p/23747): This is a confusing name, since it doesn't 4563 2981 * necessarily reboot the EC. Rename to "image" or something similar? 4564 2982 */ 4565 - #define EC_CMD_REBOOT_EC 0xd2 2983 + #define EC_CMD_REBOOT_EC 0x00D2 4566 2984 4567 2985 /* Command */ 4568 2986 enum ec_reboot_cmd { 4569 2987 EC_REBOOT_CANCEL = 0, /* Cancel a pending reboot */ 4570 2988 EC_REBOOT_JUMP_RO = 1, /* Jump to RO without rebooting */ 4571 - EC_REBOOT_JUMP_RW = 2, /* Jump to RW without rebooting */ 2989 + EC_REBOOT_JUMP_RW = 2, /* Jump to active RW without rebooting */ 4572 2990 /* (command 3 was jump to RW-B) */ 4573 2991 EC_REBOOT_COLD = 4, /* Cold-reboot */ 4574 2992 EC_REBOOT_DISABLE_JUMP = 5, /* Disable jump until next reboot */ 4575 - EC_REBOOT_HIBERNATE = 6 /* Hibernate EC */ 2993 + EC_REBOOT_HIBERNATE = 6, /* Hibernate EC */ 2994 + EC_REBOOT_HIBERNATE_CLEAR_AP_OFF = 7, /* and clears AP_OFF flag */ 4576 2995 }; 4577 2996 4578 2997 /* Flags for ec_params_reboot_ec.reboot_flags */ 4579 - #define EC_REBOOT_FLAG_RESERVED0 (1 << 0) /* Was recovery request */ 4580 - #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN (1 << 1) /* Reboot after AP shutdown */ 2998 + #define EC_REBOOT_FLAG_RESERVED0 BIT(0) /* Was recovery request */ 2999 + #define EC_REBOOT_FLAG_ON_AP_SHUTDOWN BIT(1) /* Reboot after AP shutdown */ 3000 + #define EC_REBOOT_FLAG_SWITCH_RW_SLOT BIT(2) /* Switch RW slot */ 4581 3001 4582 3002 struct ec_params_reboot_ec { 4583 3003 uint8_t cmd; /* enum ec_reboot_cmd */ 4584 3004 uint8_t flags; /* See EC_REBOOT_FLAG_* */ 4585 - } __packed; 3005 + } __ec_align1; 4586 3006 4587 3007 /* 4588 3008 * Get information on last EC panic. ··· 4592 3008 * Returns variable-length platform-dependent panic information. See panic.h 4593 3009 * for details. 4594 3010 */ 4595 - #define EC_CMD_GET_PANIC_INFO 0xd3 4596 - 4597 - /*****************************************************************************/ 4598 - /* 4599 - * ACPI commands 4600 - * 4601 - * These are valid ONLY on the ACPI command/data port. 4602 - */ 4603 - 4604 - /* 4605 - * ACPI Read Embedded Controller 4606 - * 4607 - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 4608 - * 4609 - * Use the following sequence: 4610 - * 4611 - * - Write EC_CMD_ACPI_READ to EC_LPC_ADDR_ACPI_CMD 4612 - * - Wait for EC_LPC_CMDR_PENDING bit to clear 4613 - * - Write address to EC_LPC_ADDR_ACPI_DATA 4614 - * - Wait for EC_LPC_CMDR_DATA bit to set 4615 - * - Read value from EC_LPC_ADDR_ACPI_DATA 4616 - */ 4617 - #define EC_CMD_ACPI_READ 0x80 4618 - 4619 - /* 4620 - * ACPI Write Embedded Controller 4621 - * 4622 - * This reads from ACPI memory space on the EC (EC_ACPI_MEM_*). 4623 - * 4624 - * Use the following sequence: 4625 - * 4626 - * - Write EC_CMD_ACPI_WRITE to EC_LPC_ADDR_ACPI_CMD 4627 - * - Wait for EC_LPC_CMDR_PENDING bit to clear 4628 - * - Write address to EC_LPC_ADDR_ACPI_DATA 4629 - * - Wait for EC_LPC_CMDR_PENDING bit to clear 4630 - * - Write value to EC_LPC_ADDR_ACPI_DATA 4631 - */ 4632 - #define EC_CMD_ACPI_WRITE 0x81 4633 - 4634 - /* 4635 - * ACPI Query Embedded Controller 4636 - * 4637 - * This clears the lowest-order bit in the currently pending host events, and 4638 - * sets the result code to the 1-based index of the bit (event 0x00000001 = 1, 4639 - * event 0x80000000 = 32), or 0 if no event was pending. 4640 - */ 4641 - #define EC_CMD_ACPI_QUERY_EVENT 0x84 4642 - 4643 - /* Valid addresses in ACPI memory space, for read/write commands */ 4644 - 4645 - /* Memory space version; set to EC_ACPI_MEM_VERSION_CURRENT */ 4646 - #define EC_ACPI_MEM_VERSION 0x00 4647 - /* 4648 - * Test location; writing value here updates test compliment byte to (0xff - 4649 - * value). 4650 - */ 4651 - #define EC_ACPI_MEM_TEST 0x01 4652 - /* Test compliment; writes here are ignored. */ 4653 - #define EC_ACPI_MEM_TEST_COMPLIMENT 0x02 4654 - 4655 - /* Keyboard backlight brightness percent (0 - 100) */ 4656 - #define EC_ACPI_MEM_KEYBOARD_BACKLIGHT 0x03 4657 - /* DPTF Target Fan Duty (0-100, 0xff for auto/none) */ 4658 - #define EC_ACPI_MEM_FAN_DUTY 0x04 4659 - 4660 - /* 4661 - * DPTF temp thresholds. Any of the EC's temp sensors can have up to two 4662 - * independent thresholds attached to them. The current value of the ID 4663 - * register determines which sensor is affected by the THRESHOLD and COMMIT 4664 - * registers. The THRESHOLD register uses the same EC_TEMP_SENSOR_OFFSET scheme 4665 - * as the memory-mapped sensors. The COMMIT register applies those settings. 4666 - * 4667 - * The spec does not mandate any way to read back the threshold settings 4668 - * themselves, but when a threshold is crossed the AP needs a way to determine 4669 - * which sensor(s) are responsible. Each reading of the ID register clears and 4670 - * returns one sensor ID that has crossed one of its threshold (in either 4671 - * direction) since the last read. A value of 0xFF means "no new thresholds 4672 - * have tripped". Setting or enabling the thresholds for a sensor will clear 4673 - * the unread event count for that sensor. 4674 - */ 4675 - #define EC_ACPI_MEM_TEMP_ID 0x05 4676 - #define EC_ACPI_MEM_TEMP_THRESHOLD 0x06 4677 - #define EC_ACPI_MEM_TEMP_COMMIT 0x07 4678 - /* 4679 - * Here are the bits for the COMMIT register: 4680 - * bit 0 selects the threshold index for the chosen sensor (0/1) 4681 - * bit 1 enables/disables the selected threshold (0 = off, 1 = on) 4682 - * Each write to the commit register affects one threshold. 4683 - */ 4684 - #define EC_ACPI_MEM_TEMP_COMMIT_SELECT_MASK (1 << 0) 4685 - #define EC_ACPI_MEM_TEMP_COMMIT_ENABLE_MASK (1 << 1) 4686 - /* 4687 - * Example: 4688 - * 4689 - * Set the thresholds for sensor 2 to 50 C and 60 C: 4690 - * write 2 to [0x05] -- select temp sensor 2 4691 - * write 0x7b to [0x06] -- C_TO_K(50) - EC_TEMP_SENSOR_OFFSET 4692 - * write 0x2 to [0x07] -- enable threshold 0 with this value 4693 - * write 0x85 to [0x06] -- C_TO_K(60) - EC_TEMP_SENSOR_OFFSET 4694 - * write 0x3 to [0x07] -- enable threshold 1 with this value 4695 - * 4696 - * Disable the 60 C threshold, leaving the 50 C threshold unchanged: 4697 - * write 2 to [0x05] -- select temp sensor 2 4698 - * write 0x1 to [0x07] -- disable threshold 1 4699 - */ 4700 - 4701 - /* DPTF battery charging current limit */ 4702 - #define EC_ACPI_MEM_CHARGING_LIMIT 0x08 4703 - 4704 - /* Charging limit is specified in 64 mA steps */ 4705 - #define EC_ACPI_MEM_CHARGING_LIMIT_STEP_MA 64 4706 - /* Value to disable DPTF battery charging limit */ 4707 - #define EC_ACPI_MEM_CHARGING_LIMIT_DISABLED 0xff 4708 - 4709 - /* Current version of ACPI memory address space */ 4710 - #define EC_ACPI_MEM_VERSION_CURRENT 1 4711 - 4712 - 4713 - /*****************************************************************************/ 4714 - /* 4715 - * HDMI CEC commands 4716 - * 4717 - * These commands are for sending and receiving message via HDMI CEC 4718 - */ 4719 - #define EC_MAX_CEC_MSG_LEN 16 4720 - 4721 - /* CEC message from the AP to be written on the CEC bus */ 4722 - #define EC_CMD_CEC_WRITE_MSG 0x00B8 4723 - 4724 - /** 4725 - * struct ec_params_cec_write - Message to write to the CEC bus 4726 - * @msg: message content to write to the CEC bus 4727 - */ 4728 - struct ec_params_cec_write { 4729 - uint8_t msg[EC_MAX_CEC_MSG_LEN]; 4730 - } __packed; 4731 - 4732 - /* Set various CEC parameters */ 4733 - #define EC_CMD_CEC_SET 0x00BA 4734 - 4735 - /** 4736 - * struct ec_params_cec_set - CEC parameters set 4737 - * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4738 - * @val: in case cmd is CEC_CMD_ENABLE, this field can be 0 to disable CEC 4739 - * or 1 to enable CEC functionality, in case cmd is CEC_CMD_LOGICAL_ADDRESS, 4740 - * this field encodes the requested logical address between 0 and 15 4741 - * or 0xff to unregister 4742 - */ 4743 - struct ec_params_cec_set { 4744 - uint8_t cmd; /* enum cec_command */ 4745 - uint8_t val; 4746 - } __packed; 4747 - 4748 - /* Read various CEC parameters */ 4749 - #define EC_CMD_CEC_GET 0x00BB 4750 - 4751 - /** 4752 - * struct ec_params_cec_get - CEC parameters get 4753 - * @cmd: parameter type, can be CEC_CMD_ENABLE or CEC_CMD_LOGICAL_ADDRESS 4754 - */ 4755 - struct ec_params_cec_get { 4756 - uint8_t cmd; /* enum cec_command */ 4757 - } __packed; 4758 - 4759 - /** 4760 - * struct ec_response_cec_get - CEC parameters get response 4761 - * @val: in case cmd was CEC_CMD_ENABLE, this field will 0 if CEC is 4762 - * disabled or 1 if CEC functionality is enabled, 4763 - * in case cmd was CEC_CMD_LOGICAL_ADDRESS, this will encode the 4764 - * configured logical address between 0 and 15 or 0xff if unregistered 4765 - */ 4766 - struct ec_response_cec_get { 4767 - uint8_t val; 4768 - } __packed; 4769 - 4770 - /* CEC parameters command */ 4771 - enum ec_cec_command { 4772 - /* CEC reading, writing and events enable */ 4773 - CEC_CMD_ENABLE, 4774 - /* CEC logical address */ 4775 - CEC_CMD_LOGICAL_ADDRESS, 4776 - }; 4777 - 4778 - /* Events from CEC to AP */ 4779 - enum mkbp_cec_event { 4780 - /* Outgoing message was acknowledged by a follower */ 4781 - EC_MKBP_CEC_SEND_OK = BIT(0), 4782 - /* Outgoing message was not acknowledged */ 4783 - EC_MKBP_CEC_SEND_FAILED = BIT(1), 4784 - }; 3011 + #define EC_CMD_GET_PANIC_INFO 0x00D3 4785 3012 4786 3013 /*****************************************************************************/ 4787 3014 /* ··· 4611 3216 * 4612 3217 * Use EC_CMD_REBOOT_EC to reboot the EC more politely. 4613 3218 */ 4614 - #define EC_CMD_REBOOT 0xd1 /* Think "die" */ 3219 + #define EC_CMD_REBOOT 0x00D1 /* Think "die" */ 4615 3220 4616 3221 /* 4617 3222 * Resend last response (not supported on LPC). ··· 4620 3225 * there was no previous command, or the previous command's response was too 4621 3226 * big to save. 4622 3227 */ 4623 - #define EC_CMD_RESEND_RESPONSE 0xdb 3228 + #define EC_CMD_RESEND_RESPONSE 0x00DB 4624 3229 4625 3230 /* 4626 3231 * This header byte on a command indicate version 0. Any header byte less ··· 4632 3237 * 4633 3238 * The old EC interface must not use commands 0xdc or higher. 4634 3239 */ 4635 - #define EC_CMD_VERSION0 0xdc 4636 - 4637 - #endif /* !__ACPI__ */ 3240 + #define EC_CMD_VERSION0 0x00DC 4638 3241 4639 3242 /*****************************************************************************/ 4640 3243 /* ··· 4642 3249 */ 4643 3250 4644 3251 /* EC to PD MCU exchange status command */ 4645 - #define EC_CMD_PD_EXCHANGE_STATUS 0x100 3252 + #define EC_CMD_PD_EXCHANGE_STATUS 0x0100 3253 + #define EC_VER_PD_EXCHANGE_STATUS 2 3254 + 3255 + enum pd_charge_state { 3256 + PD_CHARGE_NO_CHANGE = 0, /* Don't change charge state */ 3257 + PD_CHARGE_NONE, /* No charging allowed */ 3258 + PD_CHARGE_5V, /* 5V charging only */ 3259 + PD_CHARGE_MAX /* Charge at max voltage */ 3260 + }; 4646 3261 4647 3262 /* Status of EC being sent to PD */ 3263 + #define EC_STATUS_HIBERNATING BIT(0) 3264 + 4648 3265 struct ec_params_pd_status { 4649 - int8_t batt_soc; /* battery state of charge */ 4650 - } __packed; 3266 + uint8_t status; /* EC status */ 3267 + int8_t batt_soc; /* battery state of charge */ 3268 + uint8_t charge_state; /* charging state (from enum pd_charge_state) */ 3269 + } __ec_align1; 4651 3270 4652 3271 /* Status of PD being sent back to EC */ 3272 + #define PD_STATUS_HOST_EVENT BIT(0) /* Forward host event to AP */ 3273 + #define PD_STATUS_IN_RW BIT(1) /* Running RW image */ 3274 + #define PD_STATUS_JUMPED_TO_IMAGE BIT(2) /* Current image was jumped to */ 3275 + #define PD_STATUS_TCPC_ALERT_0 BIT(3) /* Alert active in port 0 TCPC */ 3276 + #define PD_STATUS_TCPC_ALERT_1 BIT(4) /* Alert active in port 1 TCPC */ 3277 + #define PD_STATUS_TCPC_ALERT_2 BIT(5) /* Alert active in port 2 TCPC */ 3278 + #define PD_STATUS_TCPC_ALERT_3 BIT(6) /* Alert active in port 3 TCPC */ 3279 + #define PD_STATUS_EC_INT_ACTIVE (PD_STATUS_TCPC_ALERT_0 | \ 3280 + PD_STATUS_TCPC_ALERT_1 | \ 3281 + PD_STATUS_HOST_EVENT) 4653 3282 struct ec_response_pd_status { 4654 - int8_t status; /* PD MCU status */ 4655 - uint32_t curr_lim_ma; /* input current limit */ 4656 - } __packed; 3283 + uint32_t curr_lim_ma; /* input current limit */ 3284 + uint16_t status; /* PD MCU status */ 3285 + int8_t active_charge_port; /* active charging port */ 3286 + } __ec_align_size1; 3287 + 3288 + /* AP to PD MCU host event status command, cleared on read */ 3289 + #define EC_CMD_PD_HOST_EVENT_STATUS 0x0104 3290 + 3291 + /* PD MCU host event status bits */ 3292 + #define PD_EVENT_UPDATE_DEVICE BIT(0) 3293 + #define PD_EVENT_POWER_CHANGE BIT(1) 3294 + #define PD_EVENT_IDENTITY_RECEIVED BIT(2) 3295 + #define PD_EVENT_DATA_SWAP BIT(3) 3296 + struct ec_response_host_event_status { 3297 + uint32_t status; /* PD MCU host event status */ 3298 + } __ec_align4; 4657 3299 4658 3300 /* Set USB type-C port role and muxes */ 4659 - #define EC_CMD_USB_PD_CONTROL 0x101 3301 + #define EC_CMD_USB_PD_CONTROL 0x0101 4660 3302 4661 3303 enum usb_pd_control_role { 4662 3304 USB_PD_CTRL_ROLE_NO_CHANGE = 0, ··· 4699 3271 USB_PD_CTRL_ROLE_TOGGLE_OFF = 2, 4700 3272 USB_PD_CTRL_ROLE_FORCE_SINK = 3, 4701 3273 USB_PD_CTRL_ROLE_FORCE_SOURCE = 4, 3274 + USB_PD_CTRL_ROLE_FREEZE = 5, 3275 + USB_PD_CTRL_ROLE_COUNT 4702 3276 }; 4703 3277 4704 3278 enum usb_pd_control_mux { ··· 4710 3280 USB_PD_CTRL_MUX_DP = 3, 4711 3281 USB_PD_CTRL_MUX_DOCK = 4, 4712 3282 USB_PD_CTRL_MUX_AUTO = 5, 3283 + USB_PD_CTRL_MUX_COUNT 4713 3284 }; 4714 3285 4715 3286 enum usb_pd_control_swap { ··· 4726 3295 uint8_t role; 4727 3296 uint8_t mux; 4728 3297 uint8_t swap; 4729 - } __packed; 3298 + } __ec_align1; 4730 3299 4731 - #define PD_CTRL_RESP_ENABLED_COMMS (1 << 0) /* Communication enabled */ 4732 - #define PD_CTRL_RESP_ENABLED_CONNECTED (1 << 1) /* Device connected */ 4733 - #define PD_CTRL_RESP_ENABLED_PD_CAPABLE (1 << 2) /* Partner is PD capable */ 3300 + #define PD_CTRL_RESP_ENABLED_COMMS BIT(0) /* Communication enabled */ 3301 + #define PD_CTRL_RESP_ENABLED_CONNECTED BIT(1) /* Device connected */ 3302 + #define PD_CTRL_RESP_ENABLED_PD_CAPABLE BIT(2) /* Partner is PD capable */ 4734 3303 4735 3304 #define PD_CTRL_RESP_ROLE_POWER BIT(0) /* 0=SNK/1=SRC */ 4736 3305 #define PD_CTRL_RESP_ROLE_DATA BIT(1) /* 0=UFP/1=DFP */ ··· 4740 3309 #define PD_CTRL_RESP_ROLE_USB_COMM BIT(5) /* Partner USB comm capable */ 4741 3310 #define PD_CTRL_RESP_ROLE_EXT_POWERED BIT(6) /* Partner externally powerd */ 4742 3311 3312 + struct ec_response_usb_pd_control { 3313 + uint8_t enabled; 3314 + uint8_t role; 3315 + uint8_t polarity; 3316 + uint8_t state; 3317 + } __ec_align1; 3318 + 4743 3319 struct ec_response_usb_pd_control_v1 { 4744 3320 uint8_t enabled; 4745 3321 uint8_t role; 4746 3322 uint8_t polarity; 4747 3323 char state[32]; 4748 - } __packed; 3324 + } __ec_align1; 4749 3325 4750 - #define EC_CMD_USB_PD_PORTS 0x102 3326 + /* Values representing usbc PD CC state */ 3327 + #define USBC_PD_CC_NONE 0 /* No accessory connected */ 3328 + #define USBC_PD_CC_NO_UFP 1 /* No UFP accessory connected */ 3329 + #define USBC_PD_CC_AUDIO_ACC 2 /* Audio accessory connected */ 3330 + #define USBC_PD_CC_DEBUG_ACC 3 /* Debug accessory connected */ 3331 + #define USBC_PD_CC_UFP_ATTACHED 4 /* UFP attached to usbc */ 3332 + #define USBC_PD_CC_DFP_ATTACHED 5 /* DPF attached to usbc */ 3333 + 3334 + struct ec_response_usb_pd_control_v2 { 3335 + uint8_t enabled; 3336 + uint8_t role; 3337 + uint8_t polarity; 3338 + char state[32]; 3339 + uint8_t cc_state; /* USBC_PD_CC_*Encoded cc state */ 3340 + uint8_t dp_mode; /* Current DP pin mode (MODE_DP_PIN_[A-E]) */ 3341 + /* CL:1500994 Current cable type */ 3342 + uint8_t reserved_cable_type; 3343 + } __ec_align1; 3344 + 3345 + #define EC_CMD_USB_PD_PORTS 0x0102 4751 3346 4752 3347 /* Maximum number of PD ports on a device, num_ports will be <= this */ 4753 3348 #define EC_USB_PD_MAX_PORTS 8 4754 3349 4755 3350 struct ec_response_usb_pd_ports { 4756 3351 uint8_t num_ports; 4757 - } __packed; 3352 + } __ec_align1; 4758 3353 4759 - #define EC_CMD_USB_PD_POWER_INFO 0x103 3354 + #define EC_CMD_USB_PD_POWER_INFO 0x0103 4760 3355 4761 3356 #define PD_POWER_CHARGING_PORT 0xff 4762 3357 struct ec_params_usb_pd_power_info { 4763 3358 uint8_t port; 4764 - } __packed; 3359 + } __ec_align1; 4765 3360 4766 3361 enum usb_chg_type { 4767 3362 USB_CHG_TYPE_NONE, ··· 4800 3343 USB_CHG_TYPE_OTHER, 4801 3344 USB_CHG_TYPE_VBUS, 4802 3345 USB_CHG_TYPE_UNKNOWN, 3346 + USB_CHG_TYPE_DEDICATED, 4803 3347 }; 4804 3348 enum usb_power_roles { 4805 3349 USB_PD_PORT_POWER_DISCONNECTED, ··· 4814 3356 uint16_t voltage_now; 4815 3357 uint16_t current_max; 4816 3358 uint16_t current_lim; 4817 - } __packed; 3359 + } __ec_align2; 4818 3360 4819 3361 struct ec_response_usb_pd_power_info { 4820 3362 uint8_t role; ··· 4823 3365 uint8_t reserved1; 4824 3366 struct usb_chg_measures meas; 4825 3367 uint32_t max_power; 4826 - } __packed; 3368 + } __ec_align4; 4827 3369 4828 - struct ec_params_usb_pd_info_request { 4829 - uint8_t port; 4830 - } __packed; 4831 3370 4832 3371 /* 4833 3372 * This command will return the number of USB PD charge port + the number ··· 4834 3379 #define EC_CMD_CHARGE_PORT_COUNT 0x0105 4835 3380 struct ec_response_charge_port_count { 4836 3381 uint8_t port_count; 4837 - } __packed; 3382 + } __ec_align1; 3383 + 3384 + /* Write USB-PD device FW */ 3385 + #define EC_CMD_USB_PD_FW_UPDATE 0x0110 3386 + 3387 + enum usb_pd_fw_update_cmds { 3388 + USB_PD_FW_REBOOT, 3389 + USB_PD_FW_FLASH_ERASE, 3390 + USB_PD_FW_FLASH_WRITE, 3391 + USB_PD_FW_ERASE_SIG, 3392 + }; 3393 + 3394 + struct ec_params_usb_pd_fw_update { 3395 + uint16_t dev_id; 3396 + uint8_t cmd; 3397 + uint8_t port; 3398 + uint32_t size; /* Size to write in bytes */ 3399 + /* Followed by data to write */ 3400 + } __ec_align4; 3401 + 3402 + /* Write USB-PD Accessory RW_HASH table entry */ 3403 + #define EC_CMD_USB_PD_RW_HASH_ENTRY 0x0111 3404 + /* RW hash is first 20 bytes of SHA-256 of RW section */ 3405 + #define PD_RW_HASH_SIZE 20 3406 + struct ec_params_usb_pd_rw_hash_entry { 3407 + uint16_t dev_id; 3408 + uint8_t dev_rw_hash[PD_RW_HASH_SIZE]; 3409 + uint8_t reserved; /* 3410 + * For alignment of current_image 3411 + * TODO(rspangler) but it's not aligned! 3412 + * Should have been reserved[2]. 3413 + */ 3414 + uint32_t current_image; /* One of ec_current_image */ 3415 + } __ec_align1; 3416 + 3417 + /* Read USB-PD Accessory info */ 3418 + #define EC_CMD_USB_PD_DEV_INFO 0x0112 3419 + 3420 + struct ec_params_usb_pd_info_request { 3421 + uint8_t port; 3422 + } __ec_align1; 4838 3423 4839 3424 /* Read USB-PD Device discovery info */ 4840 3425 #define EC_CMD_USB_PD_DISCOVERY 0x0113 ··· 4882 3387 uint16_t vid; /* USB-IF VID */ 4883 3388 uint16_t pid; /* USB-IF PID */ 4884 3389 uint8_t ptype; /* product type (hub,periph,cable,ama) */ 4885 - } __packed; 3390 + } __ec_align_size1; 4886 3391 4887 3392 /* Override default charge behavior */ 4888 3393 #define EC_CMD_PD_CHARGE_PORT_OVERRIDE 0x0114 ··· 4896 3401 4897 3402 struct ec_params_charge_port_override { 4898 3403 int16_t override_port; /* Override port# */ 4899 - } __packed; 3404 + } __ec_align2; 4900 3405 4901 - /* Read (and delete) one entry of PD event log */ 3406 + /* 3407 + * Read (and delete) one entry of PD event log. 3408 + * TODO(crbug.com/751742): Make this host command more generic to accommodate 3409 + * future non-PD logs that use the same internal EC event_log. 3410 + */ 4902 3411 #define EC_CMD_PD_GET_LOG_ENTRY 0x0115 4903 3412 4904 3413 struct ec_response_pd_log { ··· 4911 3412 uint8_t size_port; /* [7:5] port number [4:0] payload size in bytes */ 4912 3413 uint16_t data; /* type-defined data payload */ 4913 3414 uint8_t payload[0]; /* optional additional data payload: 0..16 bytes */ 4914 - } __packed; 3415 + } __ec_align4; 4915 3416 4916 3417 /* The timestamp is the microsecond counter shifted to get about a ms. */ 4917 3418 #define PD_LOG_TIMESTAMP_SHIFT 10 /* 1 LSB = 1024us */ ··· 4977 3478 uint8_t major; 4978 3479 uint8_t minor; 4979 3480 uint16_t build; 4980 - } __packed; 3481 + } __ec_align4; 4981 3482 4982 3483 struct mcdp_info { 4983 3484 uint8_t family[2]; 4984 3485 uint8_t chipid[2]; 4985 3486 struct mcdp_version irom; 4986 3487 struct mcdp_version fw; 4987 - } __packed; 3488 + } __ec_align4; 4988 3489 4989 3490 /* struct mcdp_info field decoding */ 4990 3491 #define MCDP_CHIPID(chipid) ((chipid[0] << 8) | chipid[1]) 4991 3492 #define MCDP_FAMILY(family) ((family[0] << 8) | family[1]) 4992 3493 3494 + /* Get/Set USB-PD Alternate mode info */ 3495 + #define EC_CMD_USB_PD_GET_AMODE 0x0116 3496 + struct ec_params_usb_pd_get_mode_request { 3497 + uint16_t svid_idx; /* SVID index to get */ 3498 + uint8_t port; /* port */ 3499 + } __ec_align_size1; 3500 + 3501 + struct ec_params_usb_pd_get_mode_response { 3502 + uint16_t svid; /* SVID */ 3503 + uint16_t opos; /* Object Position */ 3504 + uint32_t vdo[6]; /* Mode VDOs */ 3505 + } __ec_align4; 3506 + 3507 + #define EC_CMD_USB_PD_SET_AMODE 0x0117 3508 + 3509 + enum pd_mode_cmd { 3510 + PD_EXIT_MODE = 0, 3511 + PD_ENTER_MODE = 1, 3512 + /* Not a command. Do NOT remove. */ 3513 + PD_MODE_CMD_COUNT, 3514 + }; 3515 + 3516 + struct ec_params_usb_pd_set_mode_request { 3517 + uint32_t cmd; /* enum pd_mode_cmd */ 3518 + uint16_t svid; /* SVID to set */ 3519 + uint8_t opos; /* Object Position */ 3520 + uint8_t port; /* port */ 3521 + } __ec_align4; 3522 + 3523 + /* Ask the PD MCU to record a log of a requested type */ 3524 + #define EC_CMD_PD_WRITE_LOG_ENTRY 0x0118 3525 + 3526 + struct ec_params_pd_write_log_entry { 3527 + uint8_t type; /* event type : see PD_EVENT_xx above */ 3528 + uint8_t port; /* port#, or 0 for events unrelated to a given port */ 3529 + } __ec_align1; 3530 + 3531 + 3532 + /* Control USB-PD chip */ 3533 + #define EC_CMD_PD_CONTROL 0x0119 3534 + 3535 + enum ec_pd_control_cmd { 3536 + PD_SUSPEND = 0, /* Suspend the PD chip (EC: stop talking to PD) */ 3537 + PD_RESUME, /* Resume the PD chip (EC: start talking to PD) */ 3538 + PD_RESET, /* Force reset the PD chip */ 3539 + PD_CONTROL_DISABLE, /* Disable further calls to this command */ 3540 + PD_CHIP_ON, /* Power on the PD chip */ 3541 + }; 3542 + 3543 + struct ec_params_pd_control { 3544 + uint8_t chip; /* chip id */ 3545 + uint8_t subcmd; 3546 + } __ec_align1; 3547 + 4993 3548 /* Get info about USB-C SS muxes */ 4994 - #define EC_CMD_USB_PD_MUX_INFO 0x11a 3549 + #define EC_CMD_USB_PD_MUX_INFO 0x011A 4995 3550 4996 3551 struct ec_params_usb_pd_mux_info { 4997 3552 uint8_t port; /* USB-C port number */ 4998 - } __packed; 3553 + } __ec_align1; 4999 3554 5000 3555 /* Flags representing mux state */ 5001 - #define USB_PD_MUX_USB_ENABLED (1 << 0) 5002 - #define USB_PD_MUX_DP_ENABLED (1 << 1) 5003 - #define USB_PD_MUX_POLARITY_INVERTED (1 << 2) 5004 - #define USB_PD_MUX_HPD_IRQ (1 << 3) 3556 + #define USB_PD_MUX_USB_ENABLED BIT(0) /* USB connected */ 3557 + #define USB_PD_MUX_DP_ENABLED BIT(1) /* DP connected */ 3558 + #define USB_PD_MUX_POLARITY_INVERTED BIT(2) /* CC line Polarity inverted */ 3559 + #define USB_PD_MUX_HPD_IRQ BIT(3) /* HPD IRQ is asserted */ 3560 + #define USB_PD_MUX_HPD_LVL BIT(4) /* HPD level is asserted */ 5005 3561 5006 3562 struct ec_response_usb_pd_mux_info { 5007 3563 uint8_t flags; /* USB_PD_MUX_*-encoded USB mux state */ 5008 - } __packed; 3564 + } __ec_align1; 3565 + 3566 + #define EC_CMD_PD_CHIP_INFO 0x011B 3567 + 3568 + struct ec_params_pd_chip_info { 3569 + uint8_t port; /* USB-C port number */ 3570 + uint8_t renew; /* Force renewal */ 3571 + } __ec_align1; 3572 + 3573 + struct ec_response_pd_chip_info { 3574 + uint16_t vendor_id; 3575 + uint16_t product_id; 3576 + uint16_t device_id; 3577 + union { 3578 + uint8_t fw_version_string[8]; 3579 + uint64_t fw_version_number; 3580 + }; 3581 + } __ec_align2; 3582 + 3583 + struct ec_response_pd_chip_info_v1 { 3584 + uint16_t vendor_id; 3585 + uint16_t product_id; 3586 + uint16_t device_id; 3587 + union { 3588 + uint8_t fw_version_string[8]; 3589 + uint64_t fw_version_number; 3590 + }; 3591 + union { 3592 + uint8_t min_req_fw_version_string[8]; 3593 + uint64_t min_req_fw_version_number; 3594 + }; 3595 + } __ec_align2; 3596 + 3597 + /* Run RW signature verification and get status */ 3598 + #define EC_CMD_RWSIG_CHECK_STATUS 0x011C 3599 + 3600 + struct ec_response_rwsig_check_status { 3601 + uint32_t status; 3602 + } __ec_align4; 3603 + 3604 + /* For controlling RWSIG task */ 3605 + #define EC_CMD_RWSIG_ACTION 0x011D 3606 + 3607 + enum rwsig_action { 3608 + RWSIG_ACTION_ABORT = 0, /* Abort RWSIG and prevent jumping */ 3609 + RWSIG_ACTION_CONTINUE = 1, /* Jump to RW immediately */ 3610 + }; 3611 + 3612 + struct ec_params_rwsig_action { 3613 + uint32_t action; 3614 + } __ec_align4; 3615 + 3616 + /* Run verification on a slot */ 3617 + #define EC_CMD_EFS_VERIFY 0x011E 3618 + 3619 + struct ec_params_efs_verify { 3620 + uint8_t region; /* enum ec_flash_region */ 3621 + } __ec_align1; 3622 + 3623 + /* 3624 + * Retrieve info from Cros Board Info store. Response is based on the data 3625 + * type. Integers return a uint32. Strings return a string, using the response 3626 + * size to determine how big it is. 3627 + */ 3628 + #define EC_CMD_GET_CROS_BOARD_INFO 0x011F 3629 + /* 3630 + * Write info into Cros Board Info on EEPROM. Write fails if the board has 3631 + * hardware write-protect enabled. 3632 + */ 3633 + #define EC_CMD_SET_CROS_BOARD_INFO 0x0120 3634 + 3635 + enum cbi_data_tag { 3636 + CBI_TAG_BOARD_VERSION = 0, /* uint32_t or smaller */ 3637 + CBI_TAG_OEM_ID = 1, /* uint32_t or smaller */ 3638 + CBI_TAG_SKU_ID = 2, /* uint32_t or smaller */ 3639 + CBI_TAG_DRAM_PART_NUM = 3, /* variable length ascii, nul terminated. */ 3640 + CBI_TAG_OEM_NAME = 4, /* variable length ascii, nul terminated. */ 3641 + CBI_TAG_MODEL_ID = 5, /* uint32_t or smaller */ 3642 + CBI_TAG_COUNT, 3643 + }; 3644 + 3645 + /* 3646 + * Flags to control read operation 3647 + * 3648 + * RELOAD: Invalidate cache and read data from EEPROM. Useful to verify 3649 + * write was successful without reboot. 3650 + */ 3651 + #define CBI_GET_RELOAD BIT(0) 3652 + 3653 + struct ec_params_get_cbi { 3654 + uint32_t tag; /* enum cbi_data_tag */ 3655 + uint32_t flag; /* CBI_GET_* */ 3656 + } __ec_align4; 3657 + 3658 + /* 3659 + * Flags to control write behavior. 3660 + * 3661 + * NO_SYNC: Makes EC update data in RAM but skip writing to EEPROM. It's 3662 + * useful when writing multiple fields in a row. 3663 + * INIT: Need to be set when creating a new CBI from scratch. All fields 3664 + * will be initialized to zero first. 3665 + */ 3666 + #define CBI_SET_NO_SYNC BIT(0) 3667 + #define CBI_SET_INIT BIT(1) 3668 + 3669 + struct ec_params_set_cbi { 3670 + uint32_t tag; /* enum cbi_data_tag */ 3671 + uint32_t flag; /* CBI_SET_* */ 3672 + uint32_t size; /* Data size */ 3673 + uint8_t data[]; /* For string and raw data */ 3674 + } __ec_align1; 3675 + 3676 + /* 3677 + * Information about resets of the AP by the EC and the EC's own uptime. 3678 + */ 3679 + #define EC_CMD_GET_UPTIME_INFO 0x0121 3680 + 3681 + struct ec_response_uptime_info { 3682 + /* 3683 + * Number of milliseconds since the last EC boot. Sysjump resets 3684 + * typically do not restart the EC's time_since_boot epoch. 3685 + * 3686 + * WARNING: The EC's sense of time is much less accurate than the AP's 3687 + * sense of time, in both phase and frequency. This timebase is similar 3688 + * to CLOCK_MONOTONIC_RAW, but with 1% or more frequency error. 3689 + */ 3690 + uint32_t time_since_ec_boot_ms; 3691 + 3692 + /* 3693 + * Number of times the AP was reset by the EC since the last EC boot. 3694 + * Note that the AP may be held in reset by the EC during the initial 3695 + * boot sequence, such that the very first AP boot may count as more 3696 + * than one here. 3697 + */ 3698 + uint32_t ap_resets_since_ec_boot; 3699 + 3700 + /* 3701 + * The set of flags which describe the EC's most recent reset. See 3702 + * include/system.h RESET_FLAG_* for details. 3703 + */ 3704 + uint32_t ec_reset_flags; 3705 + 3706 + /* Empty log entries have both the cause and timestamp set to zero. */ 3707 + struct ap_reset_log_entry { 3708 + /* 3709 + * See include/chipset.h: enum chipset_{reset,shutdown}_reason 3710 + * for details. 3711 + */ 3712 + uint16_t reset_cause; 3713 + 3714 + /* Reserved for protocol growth. */ 3715 + uint16_t reserved; 3716 + 3717 + /* 3718 + * The time of the reset's assertion, in milliseconds since the 3719 + * last EC boot, in the same epoch as time_since_ec_boot_ms. 3720 + * Set to zero if the log entry is empty. 3721 + */ 3722 + uint32_t reset_time_ms; 3723 + } recent_ap_reset[4]; 3724 + } __ec_align4; 3725 + 3726 + /* 3727 + * Add entropy to the device secret (stored in the rollback region). 3728 + * 3729 + * Depending on the chip, the operation may take a long time (e.g. to erase 3730 + * flash), so the commands are asynchronous. 3731 + */ 3732 + #define EC_CMD_ADD_ENTROPY 0x0122 3733 + 3734 + enum add_entropy_action { 3735 + /* Add entropy to the current secret. */ 3736 + ADD_ENTROPY_ASYNC = 0, 3737 + /* 3738 + * Add entropy, and also make sure that the previous secret is erased. 3739 + * (this can be implemented by adding entropy multiple times until 3740 + * all rolback blocks have been overwritten). 3741 + */ 3742 + ADD_ENTROPY_RESET_ASYNC = 1, 3743 + /* Read back result from the previous operation. */ 3744 + ADD_ENTROPY_GET_RESULT = 2, 3745 + }; 3746 + 3747 + struct ec_params_rollback_add_entropy { 3748 + uint8_t action; 3749 + } __ec_align1; 3750 + 3751 + /* 3752 + * Perform a single read of a given ADC channel. 3753 + */ 3754 + #define EC_CMD_ADC_READ 0x0123 3755 + 3756 + struct ec_params_adc_read { 3757 + uint8_t adc_channel; 3758 + } __ec_align1; 3759 + 3760 + struct ec_response_adc_read { 3761 + int32_t adc_value; 3762 + } __ec_align4; 3763 + 3764 + /* 3765 + * Read back rollback info 3766 + */ 3767 + #define EC_CMD_ROLLBACK_INFO 0x0124 3768 + 3769 + struct ec_response_rollback_info { 3770 + int32_t id; /* Incrementing number to indicate which region to use. */ 3771 + int32_t rollback_min_version; 3772 + int32_t rw_rollback_version; 3773 + } __ec_align4; 3774 + 3775 + 3776 + /* Issue AP reset */ 3777 + #define EC_CMD_AP_RESET 0x0125 3778 + 3779 + /*****************************************************************************/ 3780 + /* The command range 0x200-0x2FF is reserved for Rotor. */ 3781 + 3782 + /*****************************************************************************/ 3783 + /* 3784 + * Reserve a range of host commands for the CR51 firmware. 3785 + */ 3786 + #define EC_CMD_CR51_BASE 0x0300 3787 + #define EC_CMD_CR51_LAST 0x03FF 3788 + 3789 + /*****************************************************************************/ 3790 + /* Fingerprint MCU commands: range 0x0400-0x040x */ 3791 + 3792 + /* Fingerprint SPI sensor passthru command: prototyping ONLY */ 3793 + #define EC_CMD_FP_PASSTHRU 0x0400 3794 + 3795 + #define EC_FP_FLAG_NOT_COMPLETE 0x1 3796 + 3797 + struct ec_params_fp_passthru { 3798 + uint16_t len; /* Number of bytes to write then read */ 3799 + uint16_t flags; /* EC_FP_FLAG_xxx */ 3800 + uint8_t data[]; /* Data to send */ 3801 + } __ec_align2; 3802 + 3803 + /* Configure the Fingerprint MCU behavior */ 3804 + #define EC_CMD_FP_MODE 0x0402 3805 + 3806 + /* Put the sensor in its lowest power mode */ 3807 + #define FP_MODE_DEEPSLEEP BIT(0) 3808 + /* Wait to see a finger on the sensor */ 3809 + #define FP_MODE_FINGER_DOWN BIT(1) 3810 + /* Poll until the finger has left the sensor */ 3811 + #define FP_MODE_FINGER_UP BIT(2) 3812 + /* Capture the current finger image */ 3813 + #define FP_MODE_CAPTURE BIT(3) 3814 + /* Finger enrollment session on-going */ 3815 + #define FP_MODE_ENROLL_SESSION BIT(4) 3816 + /* Enroll the current finger image */ 3817 + #define FP_MODE_ENROLL_IMAGE BIT(5) 3818 + /* Try to match the current finger image */ 3819 + #define FP_MODE_MATCH BIT(6) 3820 + /* Reset and re-initialize the sensor. */ 3821 + #define FP_MODE_RESET_SENSOR BIT(7) 3822 + /* special value: don't change anything just read back current mode */ 3823 + #define FP_MODE_DONT_CHANGE BIT(31) 3824 + 3825 + #define FP_VALID_MODES (FP_MODE_DEEPSLEEP | \ 3826 + FP_MODE_FINGER_DOWN | \ 3827 + FP_MODE_FINGER_UP | \ 3828 + FP_MODE_CAPTURE | \ 3829 + FP_MODE_ENROLL_SESSION | \ 3830 + FP_MODE_ENROLL_IMAGE | \ 3831 + FP_MODE_MATCH | \ 3832 + FP_MODE_RESET_SENSOR | \ 3833 + FP_MODE_DONT_CHANGE) 3834 + 3835 + /* Capture types defined in bits [30..28] */ 3836 + #define FP_MODE_CAPTURE_TYPE_SHIFT 28 3837 + #define FP_MODE_CAPTURE_TYPE_MASK (0x7 << FP_MODE_CAPTURE_TYPE_SHIFT) 3838 + /* 3839 + * This enum must remain ordered, if you add new values you must ensure that 3840 + * FP_CAPTURE_TYPE_MAX is still the last one. 3841 + */ 3842 + enum fp_capture_type { 3843 + /* Full blown vendor-defined capture (produces 'frame_size' bytes) */ 3844 + FP_CAPTURE_VENDOR_FORMAT = 0, 3845 + /* Simple raw image capture (produces width x height x bpp bits) */ 3846 + FP_CAPTURE_SIMPLE_IMAGE = 1, 3847 + /* Self test pattern (e.g. checkerboard) */ 3848 + FP_CAPTURE_PATTERN0 = 2, 3849 + /* Self test pattern (e.g. inverted checkerboard) */ 3850 + FP_CAPTURE_PATTERN1 = 3, 3851 + /* Capture for Quality test with fixed contrast */ 3852 + FP_CAPTURE_QUALITY_TEST = 4, 3853 + /* Capture for pixel reset value test */ 3854 + FP_CAPTURE_RESET_TEST = 5, 3855 + FP_CAPTURE_TYPE_MAX, 3856 + }; 3857 + /* Extracts the capture type from the sensor 'mode' word */ 3858 + #define FP_CAPTURE_TYPE(mode) (((mode) & FP_MODE_CAPTURE_TYPE_MASK) \ 3859 + >> FP_MODE_CAPTURE_TYPE_SHIFT) 3860 + 3861 + struct ec_params_fp_mode { 3862 + uint32_t mode; /* as defined by FP_MODE_ constants */ 3863 + } __ec_align4; 3864 + 3865 + struct ec_response_fp_mode { 3866 + uint32_t mode; /* as defined by FP_MODE_ constants */ 3867 + } __ec_align4; 3868 + 3869 + /* Retrieve Fingerprint sensor information */ 3870 + #define EC_CMD_FP_INFO 0x0403 3871 + 3872 + /* Number of dead pixels detected on the last maintenance */ 3873 + #define FP_ERROR_DEAD_PIXELS(errors) ((errors) & 0x3FF) 3874 + /* Unknown number of dead pixels detected on the last maintenance */ 3875 + #define FP_ERROR_DEAD_PIXELS_UNKNOWN (0x3FF) 3876 + /* No interrupt from the sensor */ 3877 + #define FP_ERROR_NO_IRQ BIT(12) 3878 + /* SPI communication error */ 3879 + #define FP_ERROR_SPI_COMM BIT(13) 3880 + /* Invalid sensor Hardware ID */ 3881 + #define FP_ERROR_BAD_HWID BIT(14) 3882 + /* Sensor initialization failed */ 3883 + #define FP_ERROR_INIT_FAIL BIT(15) 3884 + 3885 + struct ec_response_fp_info_v0 { 3886 + /* Sensor identification */ 3887 + uint32_t vendor_id; 3888 + uint32_t product_id; 3889 + uint32_t model_id; 3890 + uint32_t version; 3891 + /* Image frame characteristics */ 3892 + uint32_t frame_size; 3893 + uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 3894 + uint16_t width; 3895 + uint16_t height; 3896 + uint16_t bpp; 3897 + uint16_t errors; /* see FP_ERROR_ flags above */ 3898 + } __ec_align4; 3899 + 3900 + struct ec_response_fp_info { 3901 + /* Sensor identification */ 3902 + uint32_t vendor_id; 3903 + uint32_t product_id; 3904 + uint32_t model_id; 3905 + uint32_t version; 3906 + /* Image frame characteristics */ 3907 + uint32_t frame_size; 3908 + uint32_t pixel_format; /* using V4L2_PIX_FMT_ */ 3909 + uint16_t width; 3910 + uint16_t height; 3911 + uint16_t bpp; 3912 + uint16_t errors; /* see FP_ERROR_ flags above */ 3913 + /* Template/finger current information */ 3914 + uint32_t template_size; /* max template size in bytes */ 3915 + uint16_t template_max; /* maximum number of fingers/templates */ 3916 + uint16_t template_valid; /* number of valid fingers/templates */ 3917 + uint32_t template_dirty; /* bitmap of templates with MCU side changes */ 3918 + uint32_t template_version; /* version of the template format */ 3919 + } __ec_align4; 3920 + 3921 + /* Get the last captured finger frame or a template content */ 3922 + #define EC_CMD_FP_FRAME 0x0404 3923 + 3924 + /* constants defining the 'offset' field which also contains the frame index */ 3925 + #define FP_FRAME_INDEX_SHIFT 28 3926 + /* Frame buffer where the captured image is stored */ 3927 + #define FP_FRAME_INDEX_RAW_IMAGE 0 3928 + /* First frame buffer holding a template */ 3929 + #define FP_FRAME_INDEX_TEMPLATE 1 3930 + #define FP_FRAME_GET_BUFFER_INDEX(offset) ((offset) >> FP_FRAME_INDEX_SHIFT) 3931 + #define FP_FRAME_OFFSET_MASK 0x0FFFFFFF 3932 + 3933 + /* Version of the format of the encrypted templates. */ 3934 + #define FP_TEMPLATE_FORMAT_VERSION 3 3935 + 3936 + /* Constants for encryption parameters */ 3937 + #define FP_CONTEXT_NONCE_BYTES 12 3938 + #define FP_CONTEXT_USERID_WORDS (32 / sizeof(uint32_t)) 3939 + #define FP_CONTEXT_TAG_BYTES 16 3940 + #define FP_CONTEXT_SALT_BYTES 16 3941 + #define FP_CONTEXT_TPM_BYTES 32 3942 + 3943 + struct ec_fp_template_encryption_metadata { 3944 + /* 3945 + * Version of the structure format (N=3). 3946 + */ 3947 + uint16_t struct_version; 3948 + /* Reserved bytes, set to 0. */ 3949 + uint16_t reserved; 3950 + /* 3951 + * The salt is *only* ever used for key derivation. The nonce is unique, 3952 + * a different one is used for every message. 3953 + */ 3954 + uint8_t nonce[FP_CONTEXT_NONCE_BYTES]; 3955 + uint8_t salt[FP_CONTEXT_SALT_BYTES]; 3956 + uint8_t tag[FP_CONTEXT_TAG_BYTES]; 3957 + }; 3958 + 3959 + struct ec_params_fp_frame { 3960 + /* 3961 + * The offset contains the template index or FP_FRAME_INDEX_RAW_IMAGE 3962 + * in the high nibble, and the real offset within the frame in 3963 + * FP_FRAME_OFFSET_MASK. 3964 + */ 3965 + uint32_t offset; 3966 + uint32_t size; 3967 + } __ec_align4; 3968 + 3969 + /* Load a template into the MCU */ 3970 + #define EC_CMD_FP_TEMPLATE 0x0405 3971 + 3972 + /* Flag in the 'size' field indicating that the full template has been sent */ 3973 + #define FP_TEMPLATE_COMMIT 0x80000000 3974 + 3975 + struct ec_params_fp_template { 3976 + uint32_t offset; 3977 + uint32_t size; 3978 + uint8_t data[]; 3979 + } __ec_align4; 3980 + 3981 + /* Clear the current fingerprint user context and set a new one */ 3982 + #define EC_CMD_FP_CONTEXT 0x0406 3983 + 3984 + struct ec_params_fp_context { 3985 + uint32_t userid[FP_CONTEXT_USERID_WORDS]; 3986 + } __ec_align4; 3987 + 3988 + #define EC_CMD_FP_STATS 0x0407 3989 + 3990 + #define FPSTATS_CAPTURE_INV BIT(0) 3991 + #define FPSTATS_MATCHING_INV BIT(1) 3992 + 3993 + struct ec_response_fp_stats { 3994 + uint32_t capture_time_us; 3995 + uint32_t matching_time_us; 3996 + uint32_t overall_time_us; 3997 + struct { 3998 + uint32_t lo; 3999 + uint32_t hi; 4000 + } overall_t0; 4001 + uint8_t timestamps_invalid; 4002 + int8_t template_matched; 4003 + } __ec_align2; 4004 + 4005 + #define EC_CMD_FP_SEED 0x0408 4006 + struct ec_params_fp_seed { 4007 + /* 4008 + * Version of the structure format (N=3). 4009 + */ 4010 + uint16_t struct_version; 4011 + /* Reserved bytes, set to 0. */ 4012 + uint16_t reserved; 4013 + /* Seed from the TPM. */ 4014 + uint8_t seed[FP_CONTEXT_TPM_BYTES]; 4015 + } __ec_align4; 4016 + 4017 + /*****************************************************************************/ 4018 + /* Touchpad MCU commands: range 0x0500-0x05FF */ 4019 + 4020 + /* Perform touchpad self test */ 4021 + #define EC_CMD_TP_SELF_TEST 0x0500 4022 + 4023 + /* Get number of frame types, and the size of each type */ 4024 + #define EC_CMD_TP_FRAME_INFO 0x0501 4025 + 4026 + struct ec_response_tp_frame_info { 4027 + uint32_t n_frames; 4028 + uint32_t frame_sizes[0]; 4029 + } __ec_align4; 4030 + 4031 + /* Create a snapshot of current frame readings */ 4032 + #define EC_CMD_TP_FRAME_SNAPSHOT 0x0502 4033 + 4034 + /* Read the frame */ 4035 + #define EC_CMD_TP_FRAME_GET 0x0503 4036 + 4037 + struct ec_params_tp_frame_get { 4038 + uint32_t frame_index; 4039 + uint32_t offset; 4040 + uint32_t size; 4041 + } __ec_align4; 4042 + 4043 + /*****************************************************************************/ 4044 + /* EC-EC communication commands: range 0x0600-0x06FF */ 4045 + 4046 + #define EC_COMM_TEXT_MAX 8 4047 + 4048 + /* 4049 + * Get battery static information, i.e. information that never changes, or 4050 + * very infrequently. 4051 + */ 4052 + #define EC_CMD_BATTERY_GET_STATIC 0x0600 4053 + 4054 + /** 4055 + * struct ec_params_battery_static_info - Battery static info parameters 4056 + * @index: Battery index. 4057 + */ 4058 + struct ec_params_battery_static_info { 4059 + uint8_t index; 4060 + } __ec_align_size1; 4061 + 4062 + /** 4063 + * struct ec_response_battery_static_info - Battery static info response 4064 + * @design_capacity: Battery Design Capacity (mAh) 4065 + * @design_voltage: Battery Design Voltage (mV) 4066 + * @manufacturer: Battery Manufacturer String 4067 + * @model: Battery Model Number String 4068 + * @serial: Battery Serial Number String 4069 + * @type: Battery Type String 4070 + * @cycle_count: Battery Cycle Count 4071 + */ 4072 + struct ec_response_battery_static_info { 4073 + uint16_t design_capacity; 4074 + uint16_t design_voltage; 4075 + char manufacturer[EC_COMM_TEXT_MAX]; 4076 + char model[EC_COMM_TEXT_MAX]; 4077 + char serial[EC_COMM_TEXT_MAX]; 4078 + char type[EC_COMM_TEXT_MAX]; 4079 + /* TODO(crbug.com/795991): Consider moving to dynamic structure. */ 4080 + uint32_t cycle_count; 4081 + } __ec_align4; 4082 + 4083 + /* 4084 + * Get battery dynamic information, i.e. information that is likely to change 4085 + * every time it is read. 4086 + */ 4087 + #define EC_CMD_BATTERY_GET_DYNAMIC 0x0601 4088 + 4089 + /** 4090 + * struct ec_params_battery_dynamic_info - Battery dynamic info parameters 4091 + * @index: Battery index. 4092 + */ 4093 + struct ec_params_battery_dynamic_info { 4094 + uint8_t index; 4095 + } __ec_align_size1; 4096 + 4097 + /** 4098 + * struct ec_response_battery_dynamic_info - Battery dynamic info response 4099 + * @actual_voltage: Battery voltage (mV) 4100 + * @actual_current: Battery current (mA); negative=discharging 4101 + * @remaining_capacity: Remaining capacity (mAh) 4102 + * @full_capacity: Capacity (mAh, might change occasionally) 4103 + * @flags: Flags, see EC_BATT_FLAG_* 4104 + * @desired_voltage: Charging voltage desired by battery (mV) 4105 + * @desired_current: Charging current desired by battery (mA) 4106 + */ 4107 + struct ec_response_battery_dynamic_info { 4108 + int16_t actual_voltage; 4109 + int16_t actual_current; 4110 + int16_t remaining_capacity; 4111 + int16_t full_capacity; 4112 + int16_t flags; 4113 + int16_t desired_voltage; 4114 + int16_t desired_current; 4115 + } __ec_align2; 4116 + 4117 + /* 4118 + * Control charger chip. Used to control charger chip on the slave. 4119 + */ 4120 + #define EC_CMD_CHARGER_CONTROL 0x0602 4121 + 4122 + /** 4123 + * struct ec_params_charger_control - Charger control parameters 4124 + * @max_current: Charger current (mA). Positive to allow base to draw up to 4125 + * max_current and (possibly) charge battery, negative to request current 4126 + * from base (OTG). 4127 + * @otg_voltage: Voltage (mV) to use in OTG mode, ignored if max_current is 4128 + * >= 0. 4129 + * @allow_charging: Allow base battery charging (only makes sense if 4130 + * max_current > 0). 4131 + */ 4132 + struct ec_params_charger_control { 4133 + int16_t max_current; 4134 + uint16_t otg_voltage; 4135 + uint8_t allow_charging; 4136 + } __ec_align_size1; 4137 + 4138 + /*****************************************************************************/ 4139 + /* 4140 + * Reserve a range of host commands for board-specific, experimental, or 4141 + * special purpose features. These can be (re)used without updating this file. 4142 + * 4143 + * CAUTION: Don't go nuts with this. Shipping products should document ALL 4144 + * their EC commands for easier development, testing, debugging, and support. 4145 + * 4146 + * All commands MUST be #defined to be 4-digit UPPER CASE hex values 4147 + * (e.g., 0x00AB, not 0xab) for CONFIG_HOSTCMD_SECTION_SORTED to work. 4148 + * 4149 + * In your experimental code, you may want to do something like this: 4150 + * 4151 + * #define EC_CMD_MAGIC_FOO 0x0000 4152 + * #define EC_CMD_MAGIC_BAR 0x0001 4153 + * #define EC_CMD_MAGIC_HEY 0x0002 4154 + * 4155 + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_FOO, magic_foo_handler, 4156 + * EC_VER_MASK(0); 4157 + * 4158 + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_BAR, magic_bar_handler, 4159 + * EC_VER_MASK(0); 4160 + * 4161 + * DECLARE_PRIVATE_HOST_COMMAND(EC_CMD_MAGIC_HEY, magic_hey_handler, 4162 + * EC_VER_MASK(0); 4163 + */ 4164 + #define EC_CMD_BOARD_SPECIFIC_BASE 0x3E00 4165 + #define EC_CMD_BOARD_SPECIFIC_LAST 0x3FFF 4166 + 4167 + /* 4168 + * Given the private host command offset, calculate the true private host 4169 + * command value. 4170 + */ 4171 + #define EC_PRIVATE_HOST_COMMAND_VALUE(command) \ 4172 + (EC_CMD_BOARD_SPECIFIC_BASE + (command)) 5009 4173 5010 4174 /*****************************************************************************/ 5011 4175 /* ··· 5707 3545 #define EC_HOST_PARAM_SIZE EC_PROTO2_MAX_PARAM_SIZE 5708 3546 #define EC_LPC_ADDR_OLD_PARAM EC_HOST_CMD_REGION1 5709 3547 #define EC_OLD_PARAM_SIZE EC_HOST_CMD_REGION_SIZE 3548 + 3549 + 5710 3550 5711 3551 #endif /* __CROS_EC_COMMANDS_H */
+2
include/linux/mfd/lp87565.h
··· 17 17 18 18 enum lp87565_device_type { 19 19 LP87565_DEVICE_TYPE_UNKNOWN = 0, 20 + LP87565_DEVICE_TYPE_LP87561_Q1, 20 21 LP87565_DEVICE_TYPE_LP87565_Q1, 21 22 }; 22 23 ··· 250 249 LP87565_BUCK_3, 251 250 LP87565_BUCK_10, 252 251 LP87565_BUCK_23, 252 + LP87565_BUCK_3210, 253 253 }; 254 254 255 255 /**
+175
include/linux/mfd/rk808.h
··· 382 382 #define SWITCH1_EN BIT(5) 383 383 #define DEV_OFF_RST BIT(3) 384 384 #define DEV_OFF BIT(0) 385 + #define RTC_STOP BIT(0) 385 386 386 387 #define VB_LO_ACT BIT(4) 387 388 #define VB_LO_SEL_3500MV (7 << 0) ··· 396 395 #define SHUTDOWN_FUN (0x2 << 2) 397 396 #define SLEEP_FUN (0x1 << 2) 398 397 #define RK8XX_ID_MSK 0xfff0 398 + #define PWM_MODE_MSK BIT(7) 399 399 #define FPWM_MODE BIT(7) 400 + #define AUTO_PWM_MODE 0 401 + 402 + enum rk817_reg_id { 403 + RK817_ID_DCDC1 = 0, 404 + RK817_ID_DCDC2, 405 + RK817_ID_DCDC3, 406 + RK817_ID_DCDC4, 407 + RK817_ID_LDO1, 408 + RK817_ID_LDO2, 409 + RK817_ID_LDO3, 410 + RK817_ID_LDO4, 411 + RK817_ID_LDO5, 412 + RK817_ID_LDO6, 413 + RK817_ID_LDO7, 414 + RK817_ID_LDO8, 415 + RK817_ID_LDO9, 416 + RK817_ID_BOOST, 417 + RK817_ID_BOOST_OTG_SW, 418 + RK817_NUM_REGULATORS 419 + }; 420 + 421 + enum rk809_reg_id { 422 + RK809_ID_DCDC5 = RK817_ID_BOOST, 423 + RK809_ID_SW1, 424 + RK809_ID_SW2, 425 + RK809_NUM_REGULATORS 426 + }; 427 + 428 + #define RK817_SECONDS_REG 0x00 429 + #define RK817_MINUTES_REG 0x01 430 + #define RK817_HOURS_REG 0x02 431 + #define RK817_DAYS_REG 0x03 432 + #define RK817_MONTHS_REG 0x04 433 + #define RK817_YEARS_REG 0x05 434 + #define RK817_WEEKS_REG 0x06 435 + #define RK817_ALARM_SECONDS_REG 0x07 436 + #define RK817_ALARM_MINUTES_REG 0x08 437 + #define RK817_ALARM_HOURS_REG 0x09 438 + #define RK817_ALARM_DAYS_REG 0x0a 439 + #define RK817_ALARM_MONTHS_REG 0x0b 440 + #define RK817_ALARM_YEARS_REG 0x0c 441 + #define RK817_RTC_CTRL_REG 0xd 442 + #define RK817_RTC_STATUS_REG 0xe 443 + #define RK817_RTC_INT_REG 0xf 444 + #define RK817_RTC_COMP_LSB_REG 0x10 445 + #define RK817_RTC_COMP_MSB_REG 0x11 446 + 447 + #define RK817_POWER_EN_REG(i) (0xb1 + (i)) 448 + #define RK817_POWER_SLP_EN_REG(i) (0xb5 + (i)) 449 + 450 + #define RK817_POWER_CONFIG (0xb9) 451 + 452 + #define RK817_BUCK_CONFIG_REG(i) (0xba + (i) * 3) 453 + 454 + #define RK817_BUCK1_ON_VSEL_REG 0xBB 455 + #define RK817_BUCK1_SLP_VSEL_REG 0xBC 456 + 457 + #define RK817_BUCK2_CONFIG_REG 0xBD 458 + #define RK817_BUCK2_ON_VSEL_REG 0xBE 459 + #define RK817_BUCK2_SLP_VSEL_REG 0xBF 460 + 461 + #define RK817_BUCK3_CONFIG_REG 0xC0 462 + #define RK817_BUCK3_ON_VSEL_REG 0xC1 463 + #define RK817_BUCK3_SLP_VSEL_REG 0xC2 464 + 465 + #define RK817_BUCK4_CONFIG_REG 0xC3 466 + #define RK817_BUCK4_ON_VSEL_REG 0xC4 467 + #define RK817_BUCK4_SLP_VSEL_REG 0xC5 468 + 469 + #define RK817_LDO_ON_VSEL_REG(idx) (0xcc + (idx) * 2) 470 + #define RK817_BOOST_OTG_CFG (0xde) 471 + 472 + #define RK817_ID_MSB 0xed 473 + #define RK817_ID_LSB 0xee 474 + 475 + #define RK817_SYS_STS 0xf0 476 + #define RK817_SYS_CFG(i) (0xf1 + (i)) 477 + 478 + #define RK817_ON_SOURCE_REG 0xf5 479 + #define RK817_OFF_SOURCE_REG 0xf6 480 + 481 + /* INTERRUPT REGISTER */ 482 + #define RK817_INT_STS_REG0 0xf8 483 + #define RK817_INT_STS_MSK_REG0 0xf9 484 + #define RK817_INT_STS_REG1 0xfa 485 + #define RK817_INT_STS_MSK_REG1 0xfb 486 + #define RK817_INT_STS_REG2 0xfc 487 + #define RK817_INT_STS_MSK_REG2 0xfd 488 + #define RK817_GPIO_INT_CFG 0xfe 489 + 490 + /* IRQ Definitions */ 491 + #define RK817_IRQ_PWRON_FALL 0 492 + #define RK817_IRQ_PWRON_RISE 1 493 + #define RK817_IRQ_PWRON 2 494 + #define RK817_IRQ_PWMON_LP 3 495 + #define RK817_IRQ_HOTDIE 4 496 + #define RK817_IRQ_RTC_ALARM 5 497 + #define RK817_IRQ_RTC_PERIOD 6 498 + #define RK817_IRQ_VB_LO 7 499 + #define RK817_IRQ_PLUG_IN 8 500 + #define RK817_IRQ_PLUG_OUT 9 501 + #define RK817_IRQ_CHRG_TERM 10 502 + #define RK817_IRQ_CHRG_TIME 11 503 + #define RK817_IRQ_CHRG_TS 12 504 + #define RK817_IRQ_USB_OV 13 505 + #define RK817_IRQ_CHRG_IN_CLMP 14 506 + #define RK817_IRQ_BAT_DIS_ILIM 15 507 + #define RK817_IRQ_GATE_GPIO 16 508 + #define RK817_IRQ_TS_GPIO 17 509 + #define RK817_IRQ_CODEC_PD 18 510 + #define RK817_IRQ_CODEC_PO 19 511 + #define RK817_IRQ_CLASSD_MUTE_DONE 20 512 + #define RK817_IRQ_CLASSD_OCP 21 513 + #define RK817_IRQ_BAT_OVP 22 514 + #define RK817_IRQ_CHRG_BAT_HI 23 515 + #define RK817_IRQ_END (RK817_IRQ_CHRG_BAT_HI + 1) 516 + 517 + /* 518 + * rtc_ctrl 0xd 519 + * same as 808, except bit4 520 + */ 521 + #define RK817_RTC_CTRL_RSV4 BIT(4) 522 + 523 + /* power config 0xb9 */ 524 + #define RK817_BUCK3_FB_RES_MSK BIT(6) 525 + #define RK817_BUCK3_FB_RES_INTER BIT(6) 526 + #define RK817_BUCK3_FB_RES_EXT 0 527 + 528 + /* buck config 0xba */ 529 + #define RK817_RAMP_RATE_OFFSET 6 530 + #define RK817_RAMP_RATE_MASK (0x3 << RK817_RAMP_RATE_OFFSET) 531 + #define RK817_RAMP_RATE_3MV_PER_US (0x0 << RK817_RAMP_RATE_OFFSET) 532 + #define RK817_RAMP_RATE_6_3MV_PER_US (0x1 << RK817_RAMP_RATE_OFFSET) 533 + #define RK817_RAMP_RATE_12_5MV_PER_US (0x2 << RK817_RAMP_RATE_OFFSET) 534 + #define RK817_RAMP_RATE_25MV_PER_US (0x3 << RK817_RAMP_RATE_OFFSET) 535 + 536 + /* sys_cfg1 0xf2 */ 537 + #define RK817_HOTDIE_TEMP_MSK (0x3 << 4) 538 + #define RK817_HOTDIE_85 (0x0 << 4) 539 + #define RK817_HOTDIE_95 (0x1 << 4) 540 + #define RK817_HOTDIE_105 (0x2 << 4) 541 + #define RK817_HOTDIE_115 (0x3 << 4) 542 + 543 + #define RK817_TSD_TEMP_MSK BIT(6) 544 + #define RK817_TSD_140 0 545 + #define RK817_TSD_160 BIT(6) 546 + 547 + #define RK817_CLK32KOUT2_EN BIT(7) 548 + 549 + /* sys_cfg3 0xf4 */ 550 + #define RK817_SLPPIN_FUNC_MSK (0x3 << 3) 551 + #define SLPPIN_NULL_FUN (0x0 << 3) 552 + #define SLPPIN_SLP_FUN (0x1 << 3) 553 + #define SLPPIN_DN_FUN (0x2 << 3) 554 + #define SLPPIN_RST_FUN (0x3 << 3) 555 + 556 + #define RK817_RST_FUNC_MSK (0x3 << 6) 557 + #define RK817_RST_FUNC_SFT (6) 558 + #define RK817_RST_FUNC_CNT (3) 559 + #define RK817_RST_FUNC_DEV (0) /* reset the dev */ 560 + #define RK817_RST_FUNC_REG (0x1 << 6) /* reset the reg only */ 561 + 562 + #define RK817_SLPPOL_MSK BIT(5) 563 + #define RK817_SLPPOL_H BIT(5) 564 + #define RK817_SLPPOL_L (0) 565 + 566 + /* gpio&int 0xfe */ 567 + #define RK817_INT_POL_MSK BIT(1) 568 + #define RK817_INT_POL_H BIT(1) 569 + #define RK817_INT_POL_L 0 570 + #define RK809_BUCK5_CONFIG(i) (RK817_BOOST_OTG_CFG + (i) * 1) 400 571 401 572 enum { 402 573 BUCK_ILMIN_50MA, ··· 616 443 enum { 617 444 RK805_ID = 0x8050, 618 445 RK808_ID = 0x0000, 446 + RK809_ID = 0x8090, 447 + RK817_ID = 0x8170, 619 448 RK818_ID = 0x8181, 620 449 }; 621 450
+4 -4
sound/soc/codecs/cros_ec_codec.c
··· 38 38 39 39 static int ec_command_get_gain(struct snd_soc_component *component, 40 40 struct ec_param_codec_i2s *param, 41 - struct ec_response_codec_gain *resp) 41 + struct ec_codec_i2s_gain *resp) 42 42 { 43 43 struct cros_ec_codec_data *codec_data = 44 44 snd_soc_component_get_drvdata(component); 45 45 struct cros_ec_device *ec_device = codec_data->ec_device; 46 46 u8 buffer[sizeof(struct cros_ec_command) + 47 47 max(sizeof(struct ec_param_codec_i2s), 48 - sizeof(struct ec_response_codec_gain))]; 48 + sizeof(struct ec_codec_i2s_gain))]; 49 49 struct cros_ec_command *msg = (struct cros_ec_command *)&buffer; 50 50 int ret; 51 51 52 52 msg->version = 0; 53 53 msg->command = EC_CMD_CODEC_I2S; 54 54 msg->outsize = sizeof(struct ec_param_codec_i2s); 55 - msg->insize = sizeof(struct ec_response_codec_gain); 55 + msg->insize = sizeof(struct ec_codec_i2s_gain); 56 56 57 57 memcpy(msg->data, param, msg->outsize); 58 58 ··· 226 226 u8 *left, u8 *right) 227 227 { 228 228 struct ec_param_codec_i2s param; 229 - struct ec_response_codec_gain resp; 229 + struct ec_codec_i2s_gain resp; 230 230 int ret; 231 231 232 232 param.cmd = EC_CODEC_GET_GAIN;