[MIPS] Count timer interrupts correctly.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

authored by Chris Dearman and committed by Ralf Baechle 8e15a0e3 2fae3731

+1 -1
+1 -1
arch/mips/kernel/smtc.c
··· 822 822 switch (type_copy) { 823 823 case SMTC_CLOCK_TICK: 824 824 irq_enter(); 825 - kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_perfcount_irq]++; 825 + kstat_this_cpu.irqs[MIPS_CPU_IRQ_BASE + cp0_compare_irq]++; 826 826 /* Invoke Clock "Interrupt" */ 827 827 ipi_timer_latch[dest_copy] = 0; 828 828 #ifdef CONFIG_SMTC_IDLE_HOOK_DEBUG