[ARM] 3428/1: ARM: OMAP: 3/8 Update pin multiplexing

Patch from Tony Lindgren

Update OMAP pin multiplexing code from linux-omap tree.
This patch adds new pin configurations by various OMAP
developers, and suport for omap730 by Brian Swetland.

Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Tony Lindgren and committed by Russell King 8d7f9f50 a569c6ec

+113 -16
+17 -13
arch/arm/mach-omap1/mux.c
··· 35 36 #ifdef CONFIG_ARCH_OMAP730 37 struct pin_config __initdata_or_module omap730_pins[] = { 38 - MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 0, 20, 1, NA, 0, 0) 39 - MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 0, 24, 1, NA, 0, 0) 40 - MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 0, 28, 1, NA, 0, 0) 41 - MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 0, 1, NA, 0, 0) 42 - MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 0, 4, 1, NA, 0, 0) 43 - MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 0, 8, 1, NA, 0, 0) 44 - MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 0, 12, 1, NA, 0, 0) 45 - MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 0, 16, 1, NA, 0, 0) 46 - MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 0, 20, 1, NA, 0, 0) 47 - MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 0, 24, 1, NA, 0, 0) 48 }; 49 #endif 50 ··· 77 MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0) 78 79 /* PWT & PWL, conflicts with UART3 */ 80 - MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0) 81 - MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0) 82 83 /* USB internal master generic */ 84 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1) ··· 155 156 /* Misc ballouts */ 157 MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1) 158 - MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0) 159 160 /* OMAP-1610 MMC2 */ 161 MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
··· 35 36 #ifdef CONFIG_ARCH_OMAP730 37 struct pin_config __initdata_or_module omap730_pins[] = { 38 + MUX_CFG_730("E2_730_KBR0", 12, 21, 0, 20, 1, 0) 39 + MUX_CFG_730("J7_730_KBR1", 12, 25, 0, 24, 1, 0) 40 + MUX_CFG_730("E1_730_KBR2", 12, 29, 0, 28, 1, 0) 41 + MUX_CFG_730("F3_730_KBR3", 13, 1, 0, 0, 1, 0) 42 + MUX_CFG_730("D2_730_KBR4", 13, 5, 0, 4, 1, 0) 43 + MUX_CFG_730("C2_730_KBC0", 13, 9, 0, 8, 1, 0) 44 + MUX_CFG_730("D3_730_KBC1", 13, 13, 0, 12, 1, 0) 45 + MUX_CFG_730("E4_730_KBC2", 13, 17, 0, 16, 1, 0) 46 + MUX_CFG_730("F4_730_KBC3", 13, 21, 0, 20, 1, 0) 47 + MUX_CFG_730("E3_730_KBC4", 13, 25, 0, 24, 1, 0) 48 + 49 + MUX_CFG_730("AA17_730_USB_DM", 2, 21, 0, 20, 0, 0) 50 + MUX_CFG_730("W16_730_USB_PU_EN", 2, 25, 0, 24, 0, 0) 51 + MUX_CFG_730("W17_730_USB_VBUSI", 2, 29, 0, 28, 0, 0) 52 }; 53 #endif 54 ··· 73 MUX_CFG("Y15_1610_UART3_RTS", A, 0, 1, 2, 6, 0, NA, 0, 0) 74 75 /* PWT & PWL, conflicts with UART3 */ 76 + MUX_CFG("PWT", 6, 0, 2, 0, 30, 0, NA, 0, 0) 77 + MUX_CFG("PWL", 6, 3, 1, 0, 31, 1, NA, 0, 0) 78 79 /* USB internal master generic */ 80 MUX_CFG("R18_USB_VBUS", 7, 9, 2, 1, 11, 0, NA, 0, 1) ··· 151 152 /* Misc ballouts */ 153 MUX_CFG("BALLOUT_V8_ARMIO3", B, 18, 0, 2, 25, 1, NA, 0, 1) 154 + MUX_CFG("N20_HDQ", 6, 18, 1, 1, 4, 0, 1, 4, 0) 155 156 /* OMAP-1610 MMC2 */ 157 MUX_CFG("W8_1610_MMC2_DAT0", B, 21, 6, 2, 23, 1, 2, 1, 1)
+45
arch/arm/mach-omap2/mux.c
··· 50 /* Menelaus interrupt */ 51 MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) 52 53 /* 24xx GPIO */ 54 MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) 55 MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) 56 57 }; 58
··· 50 /* Menelaus interrupt */ 51 MUX_CFG_24XX("W19_24XX_SYS_NIRQ", 0x12c, 0, 1, 1, 1) 52 53 + /* 24xx clocks */ 54 + MUX_CFG_24XX("W14_24XX_SYS_CLKOUT", 0x137, 0, 1, 1, 1) 55 + 56 + /* 24xx McBSP */ 57 + MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX", 0x124, 1, 1, 0, 1) 58 + MUX_CFG_24XX("R14_24XX_MCBSP2_FSX", 0x125, 1, 1, 0, 1) 59 + MUX_CFG_24XX("W15_24XX_MCBSP2_DR", 0x126, 1, 1, 0, 1) 60 + MUX_CFG_24XX("V15_24XX_MCBSP2_DX", 0x127, 1, 1, 0, 1) 61 + 62 /* 24xx GPIO */ 63 + MUX_CFG_24XX("M21_242X_GPIO11", 0x0c9, 3, 1, 1, 1) 64 + MUX_CFG_24XX("AA10_242X_GPIO13", 0x0e5, 3, 0, 0, 1) 65 + MUX_CFG_24XX("AA6_242X_GPIO14", 0x0e6, 3, 0, 0, 1) 66 + MUX_CFG_24XX("AA4_242X_GPIO15", 0x0e7, 3, 0, 0, 1) 67 + MUX_CFG_24XX("Y11_242X_GPIO16", 0x0e8, 3, 0, 0, 1) 68 + MUX_CFG_24XX("AA12_242X_GPIO17", 0x0e9, 3, 0, 0, 1) 69 + MUX_CFG_24XX("AA8_242X_GPIO58", 0x0ea, 3, 0, 0, 1) 70 MUX_CFG_24XX("Y20_24XX_GPIO60", 0x12c, 3, 0, 0, 1) 71 + MUX_CFG_24XX("W4__24XX_GPIO74", 0x0f2, 3, 0, 0, 1) 72 MUX_CFG_24XX("M15_24XX_GPIO92", 0x10a, 3, 0, 0, 1) 73 + MUX_CFG_24XX("V14_24XX_GPIO117", 0x128, 3, 1, 0, 1) 74 + 75 + /* TSC IRQ */ 76 + MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1) 77 + 78 + /* UART3 */ 79 + MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1) 80 + MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1) 81 + 82 + /* Keypad GPIO*/ 83 + MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1) 84 + MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1) 85 + MUX_CFG_24XX("V18_24XX_KBR2", 0x139, 3, 1, 1, 1) 86 + MUX_CFG_24XX("M21_24XX_KBR3", 0xc9, 3, 1, 1, 1) 87 + MUX_CFG_24XX("E5__24XX_KBR4", 0x138, 3, 1, 1, 1) 88 + MUX_CFG_24XX("M18_24XX_KBR5", 0x10e, 3, 1, 1, 1) 89 + MUX_CFG_24XX("R20_24XX_KBC0", 0x108, 3, 0, 0, 1) 90 + MUX_CFG_24XX("M14_24XX_KBC1", 0x109, 3, 0, 0, 1) 91 + MUX_CFG_24XX("H19_24XX_KBC2", 0x114, 3, 0, 0, 1) 92 + MUX_CFG_24XX("V17_24XX_KBC3", 0x135, 3, 0, 0, 1) 93 + MUX_CFG_24XX("P21_24XX_KBC4", 0xca, 3, 0, 0, 1) 94 + MUX_CFG_24XX("L14_24XX_KBC5", 0x10f, 3, 0, 0, 1) 95 + MUX_CFG_24XX("N19_24XX_KBC6", 0x110, 3, 0, 0, 1) 96 + 97 + /* 24xx Menelaus Keypad GPIO */ 98 + MUX_CFG_24XX("B3__24XX_KBR5", 0x30, 3, 1, 1, 1) 99 + MUX_CFG_24XX("AA4_24XX_KBC2", 0xe7, 3, 0, 0, 1) 100 + MUX_CFG_24XX("B13_24XX_KBC6", 0x110, 3, 0, 0, 1) 101 102 }; 103
+51 -3
include/asm-arm/arch-omap/mux.h
··· 112 * as mux config 113 */ 114 #define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ 115 - pull_reg, pull_bit, pull_status, \ 116 - pu_pd_reg, pu_pd_status, debug_status)\ 117 { \ 118 .name = desc, \ 119 .debug = debug_status, \ 120 MUX_REG_730(mux_reg, mode_offset, mode) \ 121 PULL_REG_730(mux_reg, pull_bit, pull_status) \ 122 - PU_PD_REG(pu_pd_reg, pu_pd_status) \ 123 }, 124 125 #define MUX_CFG_24XX(desc, reg_offset, mode, \ ··· 171 E4_730_KBC2, 172 F4_730_KBC3, 173 E3_730_KBC4, 174 }; 175 176 enum omap1xxx_index { ··· 407 /* 24xx Menelaus interrupt */ 408 W19_24XX_SYS_NIRQ, 409 410 /* 24xx GPIO */ 411 Y20_24XX_GPIO60, 412 M15_24XX_GPIO92, 413 }; 414 415 #ifdef CONFIG_OMAP_MUX
··· 112 * as mux config 113 */ 114 #define MUX_CFG_730(desc, mux_reg, mode_offset, mode, \ 115 + pull_bit, pull_status, debug_status)\ 116 { \ 117 .name = desc, \ 118 .debug = debug_status, \ 119 MUX_REG_730(mux_reg, mode_offset, mode) \ 120 PULL_REG_730(mux_reg, pull_bit, pull_status) \ 121 + PU_PD_REG(NA, 0) \ 122 }, 123 124 #define MUX_CFG_24XX(desc, reg_offset, mode, \ ··· 172 E4_730_KBC2, 173 F4_730_KBC3, 174 E3_730_KBC4, 175 + 176 + /* USB */ 177 + AA17_730_USB_DM, 178 + W16_730_USB_PU_EN, 179 + W17_730_USB_VBUSI, 180 }; 181 182 enum omap1xxx_index { ··· 403 /* 24xx Menelaus interrupt */ 404 W19_24XX_SYS_NIRQ, 405 406 + /* 24xx clock */ 407 + W14_24XX_SYS_CLKOUT, 408 + 409 + /* 242X McBSP */ 410 + Y15_24XX_MCBSP2_CLKX, 411 + R14_24XX_MCBSP2_FSX, 412 + W15_24XX_MCBSP2_DR, 413 + V15_24XX_MCBSP2_DX, 414 + 415 /* 24xx GPIO */ 416 + M21_242X_GPIO11, 417 + AA10_242X_GPIO13, 418 + AA6_242X_GPIO14, 419 + AA4_242X_GPIO15, 420 + Y11_242X_GPIO16, 421 + AA12_242X_GPIO17, 422 + AA8_242X_GPIO58, 423 Y20_24XX_GPIO60, 424 + W4__24XX_GPIO74, 425 M15_24XX_GPIO92, 426 + V14_24XX_GPIO117, 427 + 428 + P20_24XX_TSC_IRQ, 429 + 430 + /* UART3 */ 431 + K15_24XX_UART3_TX, 432 + K14_24XX_UART3_RX, 433 + 434 + /* Keypad GPIO*/ 435 + T19_24XX_KBR0, 436 + R19_24XX_KBR1, 437 + V18_24XX_KBR2, 438 + M21_24XX_KBR3, 439 + E5__24XX_KBR4, 440 + M18_24XX_KBR5, 441 + R20_24XX_KBC0, 442 + M14_24XX_KBC1, 443 + H19_24XX_KBC2, 444 + V17_24XX_KBC3, 445 + P21_24XX_KBC4, 446 + L14_24XX_KBC5, 447 + N19_24XX_KBC6, 448 + 449 + /* 24xx Menelaus Keypad GPIO */ 450 + B3__24XX_KBR5, 451 + AA4_24XX_KBC2, 452 + B13_24XX_KBC6, 453 }; 454 455 #ifdef CONFIG_OMAP_MUX