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kernel
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linux
gpio: X-Gene standby GPIO controller DTS binding
Update description for X-Gene standby GPIO controller DTS binding to
support GPIO line configuration as input, output or external IRQ pin.
Signed-off-by: Y Vo <yvo@apm.com>
Signed-off-by: Quan Nguyen <qnguyen@apm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
authored by
Quan Nguyen
and committed by
Linus Walleij
8cae5f97
1013fc41
+40
-7
+40
-7
Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
+40
-7
Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
···
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APM X-Gene Standby GPIO controller bindings
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This is a gpio controller in the standby domain.
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There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15,
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only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping
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is currently 1-to-1 on interrupts 0x28 thru 0x2d.
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This is a gpio controller in the standby domain. It also supports interrupt in
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some particular pins which are sourced to its parent interrupt controller
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as diagram below:
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+-----------------+
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| X-Gene standby |
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| GPIO controller +------ GPIO_0
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+------------+ | | ...
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| Parent IRQ | EXT_INT_0 | +------ GPIO_8/EXT_INT_0
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| controller | (SPI40) | | ...
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| (GICv2) +--------------+ +------ GPIO_[N+8]/EXT_INT_N
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| | ... | |
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| | EXT_INT_N | +------ GPIO_[N+9]
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| | (SPI[40 + N])| | ...
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| +--------------+ +------ GPIO_MAX
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+------------+ +-----------------+
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Required properties:
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- compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller
···
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0 = active high
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1 = active low
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- gpio-controller: Marks the device node as a GPIO controller.
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- interrupts: Shall contain exactly 6 interrupts.
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- interrupts: The EXT_INT_0 parent interrupt resource must be listed first.
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- interrupt-parent: Phandle of the parent interrupt controller.
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- interrupt-cells: Should be two.
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- first cell is 0-N coresponding for EXT_INT_0 to EXT_INT_N.
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- second cell is used to specify flags.
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- interrupt-controller: Marks the device node as an interrupt controller.
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- apm,nr-gpios: Optional, specify number of gpios pin.
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- apm,nr-irqs: Optional, specify number of interrupt pins.
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- apm,irq-start: Optional, specify lowest gpio pin support interrupt.
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Example:
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sbgpio: sbgpio@17001000 {
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sbgpio: gpio@17001000{
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compatible = "apm,xgene-gpio-sb";
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reg = <0x0 0x17001000 0x0 0x400>;
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#gpio-cells = <2>;
···
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<0x0 0x2b 0x1>,
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<0x0 0x2c 0x1>,
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<0x0 0x2d 0x1>;
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interrupt-parent = <&gic>;
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#interrupt-cells = <2>;
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interrupt-controller;
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apm,nr-gpios = <22>;
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apm,nr-irqs = <6>;
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apm,irq-start = <8>;
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};
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testuser {
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compatible = "example,testuser";
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/* Use the GPIO_13/EXT_INT_5 line as an active high triggered
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* level interrupt
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*/
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interrupts = <5 4>;
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interrupt-parent = <&sbgpio>;
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};