Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd:Enable/Disable NBPSTATE on On/OFF of UVD

We observe black lines (underflow) on display when playing a
4K video with UVD. On Disabling Low memory P state this issue is
not seen.
In this patch ,disabling low memory P state only when video
size >= 4k.
Multiple runs of power measurement shows no impact

Signed-off-by: suresh guttula <suresh.guttula@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Guttula, Suresh and committed by
Alex Deucher
8ca606de e5bbf0e9

+17
+13
drivers/gpu/drm/amd/amdgpu/amdgpu_pm.c
··· 33 33 #include <linux/hwmon.h> 34 34 #include <linux/hwmon-sysfs.h> 35 35 #include <linux/nospec.h> 36 + #include "hwmgr.h" 37 + #define WIDTH_4K 3840 36 38 37 39 static int amdgpu_debugfs_pm_init(struct amdgpu_device *adev); 38 40 ··· 1957 1955 mutex_lock(&adev->pm.mutex); 1958 1956 amdgpu_dpm_set_powergating_by_smu(adev, AMD_IP_BLOCK_TYPE_UVD, !enable); 1959 1957 mutex_unlock(&adev->pm.mutex); 1958 + } 1959 + /* enable/disable Low Memory PState for UVD (4k videos) */ 1960 + if (adev->asic_type == CHIP_STONEY && 1961 + adev->uvd.decode_image_width >= WIDTH_4K) { 1962 + struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle; 1963 + 1964 + if (hwmgr && hwmgr->hwmgr_func && 1965 + hwmgr->hwmgr_func->update_nbdpm_pstate) 1966 + hwmgr->hwmgr_func->update_nbdpm_pstate(hwmgr, 1967 + !enable, 1968 + true); 1960 1969 } 1961 1970 } 1962 1971
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.c
··· 692 692 buf_sizes[0x1] = dpb_size; 693 693 buf_sizes[0x2] = image_size; 694 694 buf_sizes[0x4] = min_ctx_size; 695 + /* store image width to adjust nb memory pstate */ 696 + adev->uvd.decode_image_width = width; 695 697 return 0; 696 698 } 697 699
+2
drivers/gpu/drm/amd/amdgpu/amdgpu_uvd.h
··· 65 65 struct drm_sched_entity entity; 66 66 struct delayed_work idle_work; 67 67 unsigned harvest_config; 68 + /* store image width to adjust nb memory state */ 69 + unsigned decode_image_width; 68 70 }; 69 71 70 72 int amdgpu_uvd_sw_init(struct amdgpu_device *adev);