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kernel os linux

pwm: sophgo-sg2042: Reorganize the code structure

As the driver logic can be used in both SG2042 and SG2044, it
will be better to reorganize the code structure.

Reviewed-by: Chen Wang <unicorn_wang@outlook.com>
Tested-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Longbin Li <looong.bin@gmail.com>
Link: https://lore.kernel.org/r/20250528101139.28702-3-looong.bin@gmail.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>

authored by

Longbin Li and committed by
Uwe Kleine-König
8c805dfa 2b66b675

+37 -15
+37 -15
drivers/pwm/pwm-sophgo-sg2042.c
··· 53 53 unsigned long clk_rate_hz; 54 54 }; 55 55 56 + struct sg2042_chip_data { 57 + const struct pwm_ops ops; 58 + }; 59 + 56 60 /* 57 61 * period_ticks: PERIOD 58 62 * hlperiod_ticks: HLPERIOD ··· 70 66 writel(hlperiod_ticks, base + SG2042_PWM_HLPERIOD(chan)); 71 67 } 72 68 73 - static int pwm_sg2042_apply(struct pwm_chip *chip, struct pwm_device *pwm, 74 - const struct pwm_state *state) 69 + static void pwm_sg2042_set_dutycycle(struct pwm_chip *chip, struct pwm_device *pwm, 70 + const struct pwm_state *state) 75 71 { 76 72 struct sg2042_pwm_ddata *ddata = pwmchip_get_drvdata(chip); 77 73 u32 hlperiod_ticks; 78 74 u32 period_ticks; 79 - 80 - if (state->polarity == PWM_POLARITY_INVERSED) 81 - return -EINVAL; 82 - 83 - if (!state->enabled) { 84 - pwm_sg2042_config(ddata, pwm->hwpwm, 0, 0); 85 - return 0; 86 - } 87 75 88 76 /* 89 77 * Duration of High level (duty_cycle) = HLPERIOD x Period_of_input_clk ··· 88 92 pwm->hwpwm, period_ticks, hlperiod_ticks); 89 93 90 94 pwm_sg2042_config(ddata, pwm->hwpwm, period_ticks, hlperiod_ticks); 95 + } 96 + 97 + static int pwm_sg2042_apply(struct pwm_chip *chip, struct pwm_device *pwm, 98 + const struct pwm_state *state) 99 + { 100 + struct sg2042_pwm_ddata *ddata = pwmchip_get_drvdata(chip); 101 + 102 + if (state->polarity == PWM_POLARITY_INVERSED) 103 + return -EINVAL; 104 + 105 + if (!state->enabled) { 106 + pwm_sg2042_config(ddata, pwm->hwpwm, 0, 0); 107 + return 0; 108 + } 109 + 110 + pwm_sg2042_set_dutycycle(chip, pwm, state); 91 111 92 112 return 0; 93 113 } ··· 135 123 return 0; 136 124 } 137 125 138 - static const struct pwm_ops pwm_sg2042_ops = { 139 - .apply = pwm_sg2042_apply, 140 - .get_state = pwm_sg2042_get_state, 126 + static const struct sg2042_chip_data sg2042_chip_data = { 127 + .ops = { 128 + .apply = pwm_sg2042_apply, 129 + .get_state = pwm_sg2042_get_state, 130 + }, 141 131 }; 142 132 143 133 static const struct of_device_id sg2042_pwm_ids[] = { 144 - { .compatible = "sophgo,sg2042-pwm" }, 134 + { 135 + .compatible = "sophgo,sg2042-pwm", 136 + .data = &sg2042_chip_data 137 + }, 145 138 { } 146 139 }; 147 140 MODULE_DEVICE_TABLE(of, sg2042_pwm_ids); ··· 154 137 static int pwm_sg2042_probe(struct platform_device *pdev) 155 138 { 156 139 struct device *dev = &pdev->dev; 140 + const struct sg2042_chip_data *chip_data; 157 141 struct sg2042_pwm_ddata *ddata; 158 142 struct reset_control *rst; 159 143 struct pwm_chip *chip; 160 144 struct clk *clk; 161 145 int ret; 146 + 147 + chip_data = device_get_match_data(dev); 148 + if (!chip_data) 149 + return -ENODEV; 162 150 163 151 chip = devm_pwmchip_alloc(dev, SG2042_PWM_CHANNELNUM, sizeof(*ddata)); 164 152 if (IS_ERR(chip)) ··· 192 170 if (IS_ERR(rst)) 193 171 return dev_err_probe(dev, PTR_ERR(rst), "Failed to get reset\n"); 194 172 195 - chip->ops = &pwm_sg2042_ops; 173 + chip->ops = &chip_data->ops; 196 174 chip->atomic = true; 197 175 198 176 ret = devm_pwmchip_add(dev, chip);