Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

dt-bindings: phy: Add Qualcomm Synopsys Hi-Speed USB PHY binding

Adds bindings for Qualcomm's 28 nm USB PHY supporting Low-Speed, Full-Speed
and Hi-Speed USB connectivity on Qualcomm chipsets.

[bod: Converted to YAML. Changed name dropping snps, 28nm components]

Signed-off-by: Sriharsha Allenki <sallenki@codeaurora.org>
Signed-off-by: Anu Ramanathan <anur@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Tested-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Jorge Ramirez-Ortiz <jorge.ramirez.ortiz@gmail.com>
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>

authored by

Sriharsha Allenki and committed by
Kishon Vijay Abraham I
8c51ec66 1969c0d9

+90
+90
Documentation/devicetree/bindings/phy/qcom,usb-hs-28nm.yaml
··· 1 + # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 + %YAML 1.2 3 + --- 4 + $id: "http://devicetree.org/schemas/phy/qcom,usb-hs-28nm.yaml#" 5 + $schema: "http://devicetree.org/meta-schemas/core.yaml#" 6 + 7 + title: Qualcomm Synopsys DesignWare Core 28nm High-Speed PHY 8 + 9 + maintainers: 10 + - Bryan O'Donoghue <bryan.odonoghue@linaro.org> 11 + 12 + description: | 13 + Qualcomm Low-Speed, Full-Speed, Hi-Speed 28nm USB PHY 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - qcom,usb-hs-28nm-femtophy 19 + 20 + reg: 21 + maxItems: 1 22 + 23 + "#phy-cells": 24 + const: 0 25 + 26 + clocks: 27 + items: 28 + - description: rpmcc ref clock 29 + - description: PHY AHB clock 30 + - description: Rentention clock 31 + 32 + clock-names: 33 + items: 34 + - const: ref 35 + - const: ahb 36 + - const: sleep 37 + 38 + resets: 39 + items: 40 + - description: PHY core reset 41 + - description: POR reset 42 + 43 + reset-names: 44 + items: 45 + - const: phy 46 + - const: por 47 + 48 + vdd-supply: 49 + description: phandle to the regulator VDD supply node. 50 + 51 + vdda1p8-supply: 52 + description: phandle to the regulator 1.8V supply node. 53 + 54 + vdda3p3-supply: 55 + description: phandle to the regulator 3.3V supply node. 56 + 57 + required: 58 + - compatible 59 + - reg 60 + - "#phy-cells" 61 + - clocks 62 + - clock-names 63 + - resets 64 + - reset-names 65 + - vdd-supply 66 + - vdda1p8-supply 67 + - vdda3p3-supply 68 + 69 + additionalProperties: false 70 + 71 + examples: 72 + - | 73 + #include <dt-bindings/clock/qcom,gcc-qcs404.h> 74 + #include <dt-bindings/clock/qcom,rpmcc.h> 75 + usb2_phy_prim: phy@7a000 { 76 + compatible = "qcom,usb-hs-28nm-femtophy"; 77 + reg = <0x0007a000 0x200>; 78 + #phy-cells = <0>; 79 + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, 80 + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, 81 + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; 82 + clock-names = "ref", "ahb", "sleep"; 83 + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, 84 + <&gcc GCC_USB2A_PHY_BCR>; 85 + reset-names = "phy", "por"; 86 + vdd-supply = <&vreg_l4_1p2>; 87 + vdda1p8-supply = <&vreg_l5_1p8>; 88 + vdda3p3-supply = <&vreg_l12_3p3>; 89 + }; 90 + ...