tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
wl18xx: implement fw status debugfs entries
Implement the operations that are necessary to fetch the
wl18xx-specific FW statistics and export them in debugfs.
Signed-off-by: Luciano Coelho <coelho@ti.com>
Signed-off-by: Arik Nemtsov <arik@wizery.com>
+581
-3
+1
drivers/net/wireless/ti/wl12xx/debugfs.c
+1
drivers/net/wireless/ti/wl12xx/debugfs.c
+1
-1
drivers/net/wireless/ti/wl18xx/Makefile
+1
-1
drivers/net/wireless/ti/wl18xx/Makefile
+198
-1
drivers/net/wireless/ti/wl18xx/acx.h
+198
-1
drivers/net/wireless/ti/wl18xx/acx.h
···
23
23
#define __WL18XX_ACX_H__
24
24
25
25
#include "../wlcore/wlcore.h"
26
+
#include "../wlcore/acx.h"
26
27
27
28
/* numbers of bits the length field takes (add 1 for the actual number) */
28
29
#define WL18XX_HOST_IF_LEN_SIZE_FIELD 15
···
61
60
u8 pad[3];
62
61
} __packed;
63
62
63
+
struct wl18xx_acx_debug_stats {
64
+
u32 debug1;
65
+
u32 debug2;
66
+
u32 debug3;
67
+
u32 debug4;
68
+
u32 debug5;
69
+
u32 debug6;
70
+
} __packed;
71
+
72
+
struct wl18xx_acx_ring_stats {
73
+
u32 tx_procs;
74
+
u32 prepared_descs;
75
+
u32 tx_xfr;
76
+
u32 tx_dma;
77
+
u32 tx_cmplt;
78
+
u32 rx_procs;
79
+
u32 rx_data;
80
+
} __packed;
81
+
82
+
struct wl18xx_acx_tx_stats {
83
+
u32 tx_template_prepared;
84
+
u32 tx_data_prepared;
85
+
u32 tx_template_programmed;
86
+
u32 tx_data_programmed;
87
+
u32 tx_burst_programmed;
88
+
u32 tx_starts;
89
+
u32 tx_imm_resp;
90
+
u32 tx_start_templates;
91
+
u32 tx_start_int_templates;
92
+
u32 tx_start_fw_gen;
93
+
u32 tx_start_data;
94
+
u32 tx_start_null_frame;
95
+
u32 tx_exch;
96
+
u32 tx_retry_template;
97
+
u32 tx_retry_data;
98
+
u32 tx_exch_pending;
99
+
u32 tx_exch_expiry;
100
+
u32 tx_exch_mismatch;
101
+
u32 tx_done_template;
102
+
u32 tx_done_data;
103
+
u32 tx_done_int_template;
104
+
u32 tx_pre_xfr;
105
+
u32 tx_xfr;
106
+
u32 tx_xfr_out_of_mem;
107
+
u32 tx_dma_programmed;
108
+
u32 tx_dma_done;
109
+
} __packed;
110
+
111
+
struct wl18xx_acx_rx_stats {
112
+
u32 rx_out_of_mem;
113
+
u32 rx_hdr_overflow;
114
+
u32 rx_hw_stuck;
115
+
u32 rx_dropped_frame;
116
+
u32 rx_complete_dropped_frame;
117
+
u32 rx_alloc_frame;
118
+
u32 rx_done_queue;
119
+
u32 rx_done;
120
+
u32 rx_defrag;
121
+
u32 rx_defrag_end;
122
+
u32 rx_mic;
123
+
u32 rx_mic_end;
124
+
u32 rx_xfr;
125
+
u32 rx_xfr_end;
126
+
u32 rx_cmplt;
127
+
u32 rx_pre_complt;
128
+
u32 rx_cmplt_task;
129
+
u32 rx_phy_hdr;
130
+
u32 rx_timeout;
131
+
} __packed;
132
+
133
+
struct wl18xx_acx_dma_stats {
134
+
u32 rx_dma_errors;
135
+
u32 tx_dma_errors;
136
+
} __packed;
137
+
138
+
struct wl18xx_acx_isr_stats {
139
+
u32 irqs;
140
+
} __packed;
141
+
142
+
struct wl18xx_acx_wep_stats {
143
+
u32 wep_add_key_count;
144
+
u32 wep_default_key_count;
145
+
u32 wep_key_not_found;
146
+
u32 wep_decrypt_fail;
147
+
u32 wep_encrypt_fail;
148
+
u32 wep_dec_packets;
149
+
u32 wep_dec_interrupt;
150
+
u32 wep_enc_packets;
151
+
u32 wep_enc_interrupts;
152
+
} __packed;
153
+
154
+
#define PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD 10
155
+
156
+
struct wl18xx_acx_pwr_stats {
157
+
u32 missing_bcns_cnt;
158
+
u32 rcvd_bcns_cnt;
159
+
u32 connection_out_of_sync;
160
+
u32 cont_miss_bcns_spread[PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD];
161
+
u32 rcvd_awake_bcns_cnt;
162
+
} __packed;
163
+
164
+
struct wl18xx_acx_mic_stats {
165
+
u32 mic_rx_pkts;
166
+
u32 mic_calc_failure;
167
+
} __packed;
168
+
169
+
struct wl18xx_acx_aes_stats {
170
+
u32 aes_encrypt_fail;
171
+
u32 aes_decrypt_fail;
172
+
u32 aes_encrypt_packets;
173
+
u32 aes_decrypt_packets;
174
+
u32 aes_encrypt_interrupt;
175
+
u32 aes_decrypt_interrupt;
176
+
} __packed;
177
+
178
+
struct wl18xx_acx_gem_stats {
179
+
u32 gem_encrypt_fail;
180
+
u32 gem_decrypt_fail;
181
+
u32 gem_encrypt_packets;
182
+
u32 gem_decrypt_packets;
183
+
u32 gem_encrypt_interrupt;
184
+
u32 gem_decrypt_interrupt;
185
+
} __packed;
186
+
187
+
struct wl18xx_acx_event_stats {
188
+
u32 calibration;
189
+
u32 rx_mismatch;
190
+
u32 rx_mem_empty;
191
+
} __packed;
192
+
193
+
struct wl18xx_acx_ps_poll_stats {
194
+
u32 ps_poll_timeouts;
195
+
u32 upsd_timeouts;
196
+
u32 upsd_max_ap_turn;
197
+
u32 ps_poll_max_ap_turn;
198
+
u32 ps_poll_utilization;
199
+
u32 upsd_utilization;
200
+
} __packed;
201
+
202
+
struct wl18xx_acx_rx_filter_stats {
203
+
u32 beacon_filter;
204
+
u32 arp_filter;
205
+
u32 mc_filter;
206
+
u32 dup_filter;
207
+
u32 data_filter;
208
+
u32 ibss_filter;
209
+
u32 protection_filter;
210
+
} __packed;
211
+
212
+
struct wl18xx_acx_calibration_stats {
213
+
u32 init_cal_total;
214
+
u32 init_radio_bands_fail;
215
+
u32 init_set_params;
216
+
u32 init_tx_clpc_fail;
217
+
u32 init_rx_iw_mm_fail;
218
+
u32 tune_cal_total;
219
+
u32 tune_drpw_rtrim_fail;
220
+
u32 tune_drpw_pd_buf_fail;
221
+
u32 tune_drpw_tx_mix_freq_fail;
222
+
u32 tune_drpw_ta_cal;
223
+
u32 tune_drpw_rx_if_2_gain;
224
+
u32 tune_drpw_rx_dac;
225
+
u32 tune_drpw_chan_tune;
226
+
u32 tune_drpw_rx_tx_lpf;
227
+
u32 tune_drpw_lna_tank;
228
+
u32 tune_tx_lo_leak_fail;
229
+
u32 tune_tx_iq_mm_fail;
230
+
u32 tune_tx_pdet_fail;
231
+
u32 tune_tx_ppa_fail;
232
+
u32 tune_tx_clpc_fail;
233
+
u32 tune_rx_ana_dc_fail;
234
+
u32 tune_rx_dig_dc_fail; /* check if this is needed */
235
+
u32 tune_rx_iq_mm_fail;
236
+
u32 cal_state_fail;
237
+
} __packed;
238
+
239
+
struct wl18xx_acx_statistics {
240
+
struct acx_header header;
241
+
242
+
struct wl18xx_acx_ring_stats ring;
243
+
struct wl18xx_acx_debug_stats debug;
244
+
struct wl18xx_acx_tx_stats tx;
245
+
struct wl18xx_acx_rx_stats rx;
246
+
struct wl18xx_acx_dma_stats dma;
247
+
struct wl18xx_acx_isr_stats isr;
248
+
struct wl18xx_acx_wep_stats wep;
249
+
struct wl18xx_acx_pwr_stats pwr;
250
+
struct wl18xx_acx_aes_stats aes;
251
+
struct wl18xx_acx_mic_stats mic;
252
+
struct wl18xx_acx_event_stats event;
253
+
struct wl18xx_acx_ps_poll_stats ps_poll;
254
+
struct wl18xx_acx_rx_filter_stats rx_filter;
255
+
struct wl18xx_acx_calibration_stats calibration;
256
+
struct wl18xx_acx_gem_stats gem;
257
+
} __packed;
258
+
64
259
int wl18xx_acx_host_if_cfg_bitmap(struct wl1271 *wl, u32 host_cfg_bitmap,
65
260
u32 sdio_blk_size, u32 extra_mem_blks,
66
261
u32 len_field_size);
67
262
int wl18xx_acx_set_checksum_state(struct wl1271 *wl);
68
263
69
-
#endif /* __WL12XX_ACX_H__ */
264
+
#endif /* __WL18XX_ACX_H__ */
+345
drivers/net/wireless/ti/wl18xx/debugfs.c
+345
drivers/net/wireless/ti/wl18xx/debugfs.c
···
1
+
/*
2
+
* This file is part of wl18xx
3
+
*
4
+
* Copyright (C) 2009 Nokia Corporation
5
+
* Copyright (C) 2011-2012 Texas Instruments
6
+
*
7
+
* This program is free software; you can redistribute it and/or
8
+
* modify it under the terms of the GNU General Public License
9
+
* version 2 as published by the Free Software Foundation.
10
+
*
11
+
* This program is distributed in the hope that it will be useful, but
12
+
* WITHOUT ANY WARRANTY; without even the implied warranty of
13
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14
+
* General Public License for more details.
15
+
*
16
+
* You should have received a copy of the GNU General Public License
17
+
* along with this program; if not, write to the Free Software
18
+
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
19
+
* 02110-1301 USA
20
+
*
21
+
*/
22
+
23
+
#include "../wlcore/debugfs.h"
24
+
#include "../wlcore/wlcore.h"
25
+
26
+
#include "wl18xx.h"
27
+
#include "acx.h"
28
+
#include "debugfs.h"
29
+
30
+
#define WL18XX_DEBUGFS_FWSTATS_FILE(a, b, c) \
31
+
DEBUGFS_FWSTATS_FILE(a, b, c, wl18xx_acx_statistics)
32
+
#define WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(a, b, c) \
33
+
DEBUGFS_FWSTATS_FILE_ARRAY(a, b, c, wl18xx_acx_statistics)
34
+
35
+
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug1, "%u");
36
+
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug2, "%u");
37
+
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug3, "%u");
38
+
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug4, "%u");
39
+
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug5, "%u");
40
+
WL18XX_DEBUGFS_FWSTATS_FILE(debug, debug6, "%u");
41
+
42
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, tx_procs, "%u");
43
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, prepared_descs, "%u");
44
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, tx_xfr, "%u");
45
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, tx_dma, "%u");
46
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, tx_cmplt, "%u");
47
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, rx_procs, "%u");
48
+
WL18XX_DEBUGFS_FWSTATS_FILE(ring, rx_data, "%u");
49
+
50
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_template_prepared, "%u");
51
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_data_prepared, "%u");
52
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_template_programmed, "%u");
53
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_data_programmed, "%u");
54
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_burst_programmed, "%u");
55
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_starts, "%u");
56
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_imm_resp, "%u");
57
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_templates, "%u");
58
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_int_templates, "%u");
59
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_fw_gen, "%u");
60
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_data, "%u");
61
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_start_null_frame, "%u");
62
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch, "%u");
63
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_retry_template, "%u");
64
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_retry_data, "%u");
65
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch_pending, "%u");
66
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch_expiry, "%u");
67
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_exch_mismatch, "%u");
68
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_done_template, "%u");
69
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_done_data, "%u");
70
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_done_int_template, "%u");
71
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_pre_xfr, "%u");
72
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_xfr, "%u");
73
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_xfr_out_of_mem, "%u");
74
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_dma_programmed, "%u");
75
+
WL18XX_DEBUGFS_FWSTATS_FILE(tx, tx_dma_done, "%u");
76
+
77
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_out_of_mem, "%u");
78
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_hdr_overflow, "%u");
79
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_hw_stuck, "%u");
80
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_dropped_frame, "%u");
81
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_complete_dropped_frame, "%u");
82
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_alloc_frame, "%u");
83
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_done_queue, "%u");
84
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_done, "%u");
85
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_defrag, "%u");
86
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_defrag_end, "%u");
87
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_mic, "%u");
88
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_mic_end, "%u");
89
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_xfr, "%u");
90
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_xfr_end, "%u");
91
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_cmplt, "%u");
92
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_pre_complt, "%u");
93
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_cmplt_task, "%u");
94
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_phy_hdr, "%u");
95
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx, rx_timeout, "%u");
96
+
97
+
WL18XX_DEBUGFS_FWSTATS_FILE(dma, rx_dma_errors, "%u");
98
+
WL18XX_DEBUGFS_FWSTATS_FILE(dma, tx_dma_errors, "%u");
99
+
100
+
WL18XX_DEBUGFS_FWSTATS_FILE(isr, irqs, "%u");
101
+
102
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_add_key_count, "%u");
103
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_default_key_count, "%u");
104
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_key_not_found, "%u");
105
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_decrypt_fail, "%u");
106
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_encrypt_fail, "%u");
107
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_dec_packets, "%u");
108
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_dec_interrupt, "%u");
109
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_enc_packets, "%u");
110
+
WL18XX_DEBUGFS_FWSTATS_FILE(wep, wep_enc_interrupts, "%u");
111
+
112
+
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, missing_bcns_cnt, "%u");
113
+
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, rcvd_bcns_cnt, "%u");
114
+
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, connection_out_of_sync, "%u");
115
+
WL18XX_DEBUGFS_FWSTATS_FILE_ARRAY(pwr, cont_miss_bcns_spread,
116
+
PWR_STAT_MAX_CONT_MISSED_BCNS_SPREAD);
117
+
WL18XX_DEBUGFS_FWSTATS_FILE(pwr, rcvd_awake_bcns_cnt, "%u");
118
+
119
+
WL18XX_DEBUGFS_FWSTATS_FILE(mic, mic_rx_pkts, "%u");
120
+
WL18XX_DEBUGFS_FWSTATS_FILE(mic, mic_calc_failure, "%u");
121
+
122
+
WL18XX_DEBUGFS_FWSTATS_FILE(aes, aes_encrypt_fail, "%u");
123
+
WL18XX_DEBUGFS_FWSTATS_FILE(aes, aes_decrypt_fail, "%u");
124
+
WL18XX_DEBUGFS_FWSTATS_FILE(aes, aes_encrypt_packets, "%u");
125
+
WL18XX_DEBUGFS_FWSTATS_FILE(aes, aes_decrypt_packets, "%u");
126
+
WL18XX_DEBUGFS_FWSTATS_FILE(aes, aes_encrypt_interrupt, "%u");
127
+
WL18XX_DEBUGFS_FWSTATS_FILE(aes, aes_decrypt_interrupt, "%u");
128
+
129
+
WL18XX_DEBUGFS_FWSTATS_FILE(gem, gem_encrypt_fail, "%u");
130
+
WL18XX_DEBUGFS_FWSTATS_FILE(gem, gem_decrypt_fail, "%u");
131
+
WL18XX_DEBUGFS_FWSTATS_FILE(gem, gem_encrypt_packets, "%u");
132
+
WL18XX_DEBUGFS_FWSTATS_FILE(gem, gem_decrypt_packets, "%u");
133
+
WL18XX_DEBUGFS_FWSTATS_FILE(gem, gem_encrypt_interrupt, "%u");
134
+
WL18XX_DEBUGFS_FWSTATS_FILE(gem, gem_decrypt_interrupt, "%u");
135
+
136
+
WL18XX_DEBUGFS_FWSTATS_FILE(event, calibration, "%u");
137
+
WL18XX_DEBUGFS_FWSTATS_FILE(event, rx_mismatch, "%u");
138
+
WL18XX_DEBUGFS_FWSTATS_FILE(event, rx_mem_empty, "%u");
139
+
140
+
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, ps_poll_timeouts, "%u");
141
+
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, upsd_timeouts, "%u");
142
+
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, upsd_max_ap_turn, "%u");
143
+
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, ps_poll_max_ap_turn, "%u");
144
+
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, ps_poll_utilization, "%u");
145
+
WL18XX_DEBUGFS_FWSTATS_FILE(ps_poll, upsd_utilization, "%u");
146
+
147
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, beacon_filter, "%u");
148
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, arp_filter, "%u");
149
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, mc_filter, "%u");
150
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, dup_filter, "%u");
151
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, data_filter, "%u");
152
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, ibss_filter, "%u");
153
+
WL18XX_DEBUGFS_FWSTATS_FILE(rx_filter, protection_filter, "%u");
154
+
155
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, init_cal_total, "%u");
156
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, init_radio_bands_fail, "%u");
157
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, init_set_params, "%u");
158
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, init_tx_clpc_fail, "%u");
159
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, init_rx_iw_mm_fail, "%u");
160
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_cal_total, "%u");
161
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_rtrim_fail, "%u");
162
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_pd_buf_fail, "%u");
163
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_tx_mix_freq_fail, "%u");
164
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_ta_cal, "%u");
165
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_rx_if_2_gain, "%u");
166
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_rx_dac, "%u");
167
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_chan_tune, "%u");
168
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_rx_tx_lpf, "%u");
169
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_drpw_lna_tank, "%u");
170
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_tx_lo_leak_fail, "%u");
171
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_tx_iq_mm_fail, "%u");
172
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_tx_pdet_fail, "%u");
173
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_tx_ppa_fail, "%u");
174
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_tx_clpc_fail, "%u");
175
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_rx_ana_dc_fail, "%u");
176
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_rx_dig_dc_fail, "%u");
177
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, tune_rx_iq_mm_fail, "%u");
178
+
WL18XX_DEBUGFS_FWSTATS_FILE(calibration, cal_state_fail, "%u");
179
+
180
+
int wl18xx_debugfs_add_files(struct wl1271 *wl,
181
+
struct dentry *rootdir)
182
+
{
183
+
int ret = 0;
184
+
struct dentry *entry, *stats;
185
+
186
+
stats = debugfs_create_dir("wl18xx_fw_stats", rootdir);
187
+
if (!stats || IS_ERR(stats)) {
188
+
entry = stats;
189
+
goto err;
190
+
}
191
+
192
+
DEBUGFS_FWSTATS_ADD(debug, debug1);
193
+
DEBUGFS_FWSTATS_ADD(debug, debug2);
194
+
DEBUGFS_FWSTATS_ADD(debug, debug3);
195
+
DEBUGFS_FWSTATS_ADD(debug, debug4);
196
+
DEBUGFS_FWSTATS_ADD(debug, debug5);
197
+
DEBUGFS_FWSTATS_ADD(debug, debug6);
198
+
199
+
DEBUGFS_FWSTATS_ADD(ring, tx_procs);
200
+
DEBUGFS_FWSTATS_ADD(ring, prepared_descs);
201
+
DEBUGFS_FWSTATS_ADD(ring, tx_xfr);
202
+
DEBUGFS_FWSTATS_ADD(ring, tx_dma);
203
+
DEBUGFS_FWSTATS_ADD(ring, tx_cmplt);
204
+
DEBUGFS_FWSTATS_ADD(ring, rx_procs);
205
+
DEBUGFS_FWSTATS_ADD(ring, rx_data);
206
+
207
+
DEBUGFS_FWSTATS_ADD(tx, tx_template_prepared);
208
+
DEBUGFS_FWSTATS_ADD(tx, tx_data_prepared);
209
+
DEBUGFS_FWSTATS_ADD(tx, tx_template_programmed);
210
+
DEBUGFS_FWSTATS_ADD(tx, tx_data_programmed);
211
+
DEBUGFS_FWSTATS_ADD(tx, tx_burst_programmed);
212
+
DEBUGFS_FWSTATS_ADD(tx, tx_starts);
213
+
DEBUGFS_FWSTATS_ADD(tx, tx_imm_resp);
214
+
DEBUGFS_FWSTATS_ADD(tx, tx_start_templates);
215
+
DEBUGFS_FWSTATS_ADD(tx, tx_start_int_templates);
216
+
DEBUGFS_FWSTATS_ADD(tx, tx_start_fw_gen);
217
+
DEBUGFS_FWSTATS_ADD(tx, tx_start_data);
218
+
DEBUGFS_FWSTATS_ADD(tx, tx_start_null_frame);
219
+
DEBUGFS_FWSTATS_ADD(tx, tx_exch);
220
+
DEBUGFS_FWSTATS_ADD(tx, tx_retry_template);
221
+
DEBUGFS_FWSTATS_ADD(tx, tx_retry_data);
222
+
DEBUGFS_FWSTATS_ADD(tx, tx_exch_pending);
223
+
DEBUGFS_FWSTATS_ADD(tx, tx_exch_expiry);
224
+
DEBUGFS_FWSTATS_ADD(tx, tx_exch_mismatch);
225
+
DEBUGFS_FWSTATS_ADD(tx, tx_done_template);
226
+
DEBUGFS_FWSTATS_ADD(tx, tx_done_data);
227
+
DEBUGFS_FWSTATS_ADD(tx, tx_done_int_template);
228
+
DEBUGFS_FWSTATS_ADD(tx, tx_pre_xfr);
229
+
DEBUGFS_FWSTATS_ADD(tx, tx_xfr);
230
+
DEBUGFS_FWSTATS_ADD(tx, tx_xfr_out_of_mem);
231
+
DEBUGFS_FWSTATS_ADD(tx, tx_dma_programmed);
232
+
DEBUGFS_FWSTATS_ADD(tx, tx_dma_done);
233
+
234
+
DEBUGFS_FWSTATS_ADD(rx, rx_out_of_mem);
235
+
DEBUGFS_FWSTATS_ADD(rx, rx_hdr_overflow);
236
+
DEBUGFS_FWSTATS_ADD(rx, rx_hw_stuck);
237
+
DEBUGFS_FWSTATS_ADD(rx, rx_dropped_frame);
238
+
DEBUGFS_FWSTATS_ADD(rx, rx_complete_dropped_frame);
239
+
DEBUGFS_FWSTATS_ADD(rx, rx_alloc_frame);
240
+
DEBUGFS_FWSTATS_ADD(rx, rx_done_queue);
241
+
DEBUGFS_FWSTATS_ADD(rx, rx_done);
242
+
DEBUGFS_FWSTATS_ADD(rx, rx_defrag);
243
+
DEBUGFS_FWSTATS_ADD(rx, rx_defrag_end);
244
+
DEBUGFS_FWSTATS_ADD(rx, rx_mic);
245
+
DEBUGFS_FWSTATS_ADD(rx, rx_mic_end);
246
+
DEBUGFS_FWSTATS_ADD(rx, rx_xfr);
247
+
DEBUGFS_FWSTATS_ADD(rx, rx_xfr_end);
248
+
DEBUGFS_FWSTATS_ADD(rx, rx_cmplt);
249
+
DEBUGFS_FWSTATS_ADD(rx, rx_pre_complt);
250
+
DEBUGFS_FWSTATS_ADD(rx, rx_cmplt_task);
251
+
DEBUGFS_FWSTATS_ADD(rx, rx_phy_hdr);
252
+
DEBUGFS_FWSTATS_ADD(rx, rx_timeout);
253
+
254
+
DEBUGFS_FWSTATS_ADD(dma, rx_dma_errors);
255
+
DEBUGFS_FWSTATS_ADD(dma, tx_dma_errors);
256
+
257
+
DEBUGFS_FWSTATS_ADD(isr, irqs);
258
+
259
+
DEBUGFS_FWSTATS_ADD(wep, wep_add_key_count);
260
+
DEBUGFS_FWSTATS_ADD(wep, wep_default_key_count);
261
+
DEBUGFS_FWSTATS_ADD(wep, wep_key_not_found);
262
+
DEBUGFS_FWSTATS_ADD(wep, wep_decrypt_fail);
263
+
DEBUGFS_FWSTATS_ADD(wep, wep_encrypt_fail);
264
+
DEBUGFS_FWSTATS_ADD(wep, wep_dec_packets);
265
+
DEBUGFS_FWSTATS_ADD(wep, wep_dec_interrupt);
266
+
DEBUGFS_FWSTATS_ADD(wep, wep_enc_packets);
267
+
DEBUGFS_FWSTATS_ADD(wep, wep_enc_interrupts);
268
+
269
+
DEBUGFS_FWSTATS_ADD(pwr, missing_bcns_cnt);
270
+
DEBUGFS_FWSTATS_ADD(pwr, rcvd_bcns_cnt);
271
+
DEBUGFS_FWSTATS_ADD(pwr, connection_out_of_sync);
272
+
DEBUGFS_FWSTATS_ADD(pwr, cont_miss_bcns_spread);
273
+
DEBUGFS_FWSTATS_ADD(pwr, rcvd_awake_bcns_cnt);
274
+
275
+
DEBUGFS_FWSTATS_ADD(mic, mic_rx_pkts);
276
+
DEBUGFS_FWSTATS_ADD(mic, mic_calc_failure);
277
+
278
+
DEBUGFS_FWSTATS_ADD(aes, aes_encrypt_fail);
279
+
DEBUGFS_FWSTATS_ADD(aes, aes_decrypt_fail);
280
+
DEBUGFS_FWSTATS_ADD(aes, aes_encrypt_packets);
281
+
DEBUGFS_FWSTATS_ADD(aes, aes_decrypt_packets);
282
+
DEBUGFS_FWSTATS_ADD(aes, aes_encrypt_interrupt);
283
+
DEBUGFS_FWSTATS_ADD(aes, aes_decrypt_interrupt);
284
+
285
+
DEBUGFS_FWSTATS_ADD(gem, gem_encrypt_fail);
286
+
DEBUGFS_FWSTATS_ADD(gem, gem_decrypt_fail);
287
+
DEBUGFS_FWSTATS_ADD(gem, gem_encrypt_packets);
288
+
DEBUGFS_FWSTATS_ADD(gem, gem_decrypt_packets);
289
+
DEBUGFS_FWSTATS_ADD(gem, gem_encrypt_interrupt);
290
+
DEBUGFS_FWSTATS_ADD(gem, gem_decrypt_interrupt);
291
+
292
+
DEBUGFS_FWSTATS_ADD(event, calibration);
293
+
DEBUGFS_FWSTATS_ADD(event, rx_mismatch);
294
+
DEBUGFS_FWSTATS_ADD(event, rx_mem_empty);
295
+
296
+
DEBUGFS_FWSTATS_ADD(ps_poll, ps_poll_timeouts);
297
+
DEBUGFS_FWSTATS_ADD(ps_poll, upsd_timeouts);
298
+
DEBUGFS_FWSTATS_ADD(ps_poll, upsd_max_ap_turn);
299
+
DEBUGFS_FWSTATS_ADD(ps_poll, ps_poll_max_ap_turn);
300
+
DEBUGFS_FWSTATS_ADD(ps_poll, ps_poll_utilization);
301
+
DEBUGFS_FWSTATS_ADD(ps_poll, upsd_utilization);
302
+
303
+
DEBUGFS_FWSTATS_ADD(rx_filter, beacon_filter);
304
+
DEBUGFS_FWSTATS_ADD(rx_filter, arp_filter);
305
+
DEBUGFS_FWSTATS_ADD(rx_filter, mc_filter);
306
+
DEBUGFS_FWSTATS_ADD(rx_filter, dup_filter);
307
+
DEBUGFS_FWSTATS_ADD(rx_filter, data_filter);
308
+
DEBUGFS_FWSTATS_ADD(rx_filter, ibss_filter);
309
+
DEBUGFS_FWSTATS_ADD(rx_filter, protection_filter);
310
+
311
+
DEBUGFS_FWSTATS_ADD(calibration, init_cal_total);
312
+
DEBUGFS_FWSTATS_ADD(calibration, init_radio_bands_fail);
313
+
DEBUGFS_FWSTATS_ADD(calibration, init_set_params);
314
+
DEBUGFS_FWSTATS_ADD(calibration, init_tx_clpc_fail);
315
+
DEBUGFS_FWSTATS_ADD(calibration, init_rx_iw_mm_fail);
316
+
DEBUGFS_FWSTATS_ADD(calibration, tune_cal_total);
317
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_rtrim_fail);
318
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_pd_buf_fail);
319
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_tx_mix_freq_fail);
320
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_ta_cal);
321
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_rx_if_2_gain);
322
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_rx_dac);
323
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_chan_tune);
324
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_rx_tx_lpf);
325
+
DEBUGFS_FWSTATS_ADD(calibration, tune_drpw_lna_tank);
326
+
DEBUGFS_FWSTATS_ADD(calibration, tune_tx_lo_leak_fail);
327
+
DEBUGFS_FWSTATS_ADD(calibration, tune_tx_iq_mm_fail);
328
+
DEBUGFS_FWSTATS_ADD(calibration, tune_tx_pdet_fail);
329
+
DEBUGFS_FWSTATS_ADD(calibration, tune_tx_ppa_fail);
330
+
DEBUGFS_FWSTATS_ADD(calibration, tune_tx_clpc_fail);
331
+
DEBUGFS_FWSTATS_ADD(calibration, tune_rx_ana_dc_fail);
332
+
DEBUGFS_FWSTATS_ADD(calibration, tune_rx_dig_dc_fail);
333
+
DEBUGFS_FWSTATS_ADD(calibration, tune_rx_iq_mm_fail);
334
+
DEBUGFS_FWSTATS_ADD(calibration, cal_state_fail);
335
+
336
+
return 0;
337
+
338
+
err:
339
+
if (IS_ERR(entry))
340
+
ret = PTR_ERR(entry);
341
+
else
342
+
ret = -ENOMEM;
343
+
344
+
return ret;
345
+
}
+28
drivers/net/wireless/ti/wl18xx/debugfs.h
+28
drivers/net/wireless/ti/wl18xx/debugfs.h
···
1
+
/*
2
+
* This file is part of wl18xx
3
+
*
4
+
* Copyright (C) 2012 Texas Instruments. All rights reserved.
5
+
*
6
+
* This program is free software; you can redistribute it and/or
7
+
* modify it under the terms of the GNU General Public License
8
+
* version 2 as published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful, but
11
+
* WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13
+
* General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program; if not, write to the Free Software
17
+
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18
+
* 02110-1301 USA
19
+
*
20
+
*/
21
+
22
+
#ifndef __WL18XX_DEBUGFS_H__
23
+
#define __WL18XX_DEBUGFS_H__
24
+
25
+
int wl18xx_debugfs_add_files(struct wl1271 *wl,
26
+
struct dentry *rootdir);
27
+
28
+
#endif /* __WL18XX_DEBUGFS_H__ */
+8
-1
drivers/net/wireless/ti/wl18xx/main.c
+8
-1
drivers/net/wireless/ti/wl18xx/main.c
···
38
38
#include "tx.h"
39
39
#include "wl18xx.h"
40
40
#include "io.h"
41
-
41
+
#include "debugfs.h"
42
42
43
43
#define WL18XX_RX_CHECKSUM_MASK 0x40
44
44
···
1011
1011
wlcore_set_partition(wl, &wl->ptable[PART_DOWN]);
1012
1012
}
1013
1013
1014
+
static int wl18xx_debugfs_init(struct wl1271 *wl, struct dentry *rootdir)
1015
+
{
1016
+
return wl18xx_debugfs_add_files(wl, rootdir);
1017
+
}
1018
+
1014
1019
static struct wlcore_ops wl18xx_ops = {
1015
1020
.identify_chip = wl18xx_identify_chip,
1016
1021
.boot = wl18xx_boot,
···
1036
1031
.sta_get_ap_rate_mask = wl18xx_sta_get_ap_rate_mask,
1037
1032
.ap_get_mimo_wide_rate_mask = wl18xx_ap_get_mimo_wide_rate_mask,
1038
1033
.get_mac = wl18xx_get_mac,
1034
+
.debugfs_init = wl18xx_debugfs_init,
1039
1035
};
1040
1036
1041
1037
/* HT cap appropriate for wide channels */
···
1091
1085
wl->hw_tx_rate_tbl_size = WL18XX_CONF_HW_RXTX_RATE_MAX;
1092
1086
wl->hw_min_ht_rate = WL18XX_CONF_HW_RXTX_RATE_MCS0;
1093
1087
wl->fw_status_priv_len = sizeof(struct wl18xx_fw_status_priv);
1088
+
wl->stats.fw_stats_len = sizeof(struct wl18xx_acx_statistics);
1094
1089
memcpy(&wl->ht_cap, &wl18xx_ht_cap, sizeof(wl18xx_ht_cap));
1095
1090
if (ht_mode_param && !strcmp(ht_mode_param, "mimo"))
1096
1091
memcpy(&wl->ht_cap, &wl18xx_mimo_ht_cap,