tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
V4L/DVB (9450): Code Review: #4 Consolidate configurations
* Better readability
* Avoids duplication
Comments from Oliver Endriss <o.endriss@gmx.de>
Signed-off-by: Manu Abraham <manu@linuxtv.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
authored by
Manu Abraham
and committed by
Mauro Carvalho Chehab
8be969b3
27713c8b
+534
-712
+287
drivers/media/dvb/frontends/stb0899_cfg.h
+287
drivers/media/dvb/frontends/stb0899_cfg.h
···
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/*
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STB0899 Multistandard Frontend driver
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Copyright (C) Manu Abraham (abraham.manu@gmail.com)
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Copyright (C) ST Microelectronics
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __STB0899_CFG_H
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#define __STB0899_CFG_H
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static const struct stb0899_s2_reg stb0899_s2_init_2[] = {
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{ STB0899_OFF0_DMD_STATUS , STB0899_BASE_DMD_STATUS , 0x00000103 }, /* DMDSTATUS */
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{ STB0899_OFF0_CRL_FREQ , STB0899_BASE_CRL_FREQ , 0x3ed1da56 }, /* CRLFREQ */
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{ STB0899_OFF0_BTR_FREQ , STB0899_BASE_BTR_FREQ , 0x00004000 }, /* BTRFREQ */
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{ STB0899_OFF0_IF_AGC_GAIN , STB0899_BASE_IF_AGC_GAIN , 0x00002ade }, /* IFAGCGAIN */
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{ STB0899_OFF0_BB_AGC_GAIN , STB0899_BASE_BB_AGC_GAIN , 0x000001bc }, /* BBAGCGAIN */
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{ STB0899_OFF0_DC_OFFSET , STB0899_BASE_DC_OFFSET , 0x00000200 }, /* DCOFFSET */
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{ STB0899_OFF0_DMD_CNTRL , STB0899_BASE_DMD_CNTRL , 0x0000000f }, /* DMDCNTRL */
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{ STB0899_OFF0_IF_AGC_CNTRL , STB0899_BASE_IF_AGC_CNTRL , 0x03fb4a20 }, /* IFAGCCNTRL */
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{ STB0899_OFF0_BB_AGC_CNTRL , STB0899_BASE_BB_AGC_CNTRL , 0x00200c97 }, /* BBAGCCNTRL */
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{ STB0899_OFF0_CRL_CNTRL , STB0899_BASE_CRL_CNTRL , 0x00000016 }, /* CRLCNTRL */
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{ STB0899_OFF0_CRL_PHS_INIT , STB0899_BASE_CRL_PHS_INIT , 0x00000000 }, /* CRLPHSINIT */
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{ STB0899_OFF0_CRL_FREQ_INIT , STB0899_BASE_CRL_FREQ_INIT , 0x00000000 }, /* CRLFREQINIT */
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{ STB0899_OFF0_CRL_LOOP_GAIN , STB0899_BASE_CRL_LOOP_GAIN , 0x00000000 }, /* CRLLOOPGAIN */
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{ STB0899_OFF0_CRL_NOM_FREQ , STB0899_BASE_CRL_NOM_FREQ , 0x3ed097b6 }, /* CRLNOMFREQ */
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{ STB0899_OFF0_CRL_SWP_RATE , STB0899_BASE_CRL_SWP_RATE , 0x00000000 }, /* CRLSWPRATE */
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{ STB0899_OFF0_CRL_MAX_SWP , STB0899_BASE_CRL_MAX_SWP , 0x00000000 }, /* CRLMAXSWP */
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{ STB0899_OFF0_CRL_LK_CNTRL , STB0899_BASE_CRL_LK_CNTRL , 0x0f6cdc01 }, /* CRLLKCNTRL */
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{ STB0899_OFF0_DECIM_CNTRL , STB0899_BASE_DECIM_CNTRL , 0x00000000 }, /* DECIMCNTRL */
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{ STB0899_OFF0_BTR_CNTRL , STB0899_BASE_BTR_CNTRL , 0x00003993 }, /* BTRCNTRL */
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{ STB0899_OFF0_BTR_LOOP_GAIN , STB0899_BASE_BTR_LOOP_GAIN , 0x000d3c6f }, /* BTRLOOPGAIN */
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{ STB0899_OFF0_BTR_PHS_INIT , STB0899_BASE_BTR_PHS_INIT , 0x00000000 }, /* BTRPHSINIT */
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{ STB0899_OFF0_BTR_FREQ_INIT , STB0899_BASE_BTR_FREQ_INIT , 0x00000000 }, /* BTRFREQINIT */
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{ STB0899_OFF0_BTR_NOM_FREQ , STB0899_BASE_BTR_NOM_FREQ , 0x0238e38e }, /* BTRNOMFREQ */
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{ STB0899_OFF0_BTR_LK_CNTRL , STB0899_BASE_BTR_LK_CNTRL , 0x00000000 }, /* BTRLKCNTRL */
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{ STB0899_OFF0_DECN_CNTRL , STB0899_BASE_DECN_CNTRL , 0x00000000 }, /* DECNCNTRL */
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{ STB0899_OFF0_TP_CNTRL , STB0899_BASE_TP_CNTRL , 0x00000000 }, /* TPCNTRL */
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{ STB0899_OFF0_TP_BUF_STATUS , STB0899_BASE_TP_BUF_STATUS , 0x00000000 }, /* TPBUFSTATUS */
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{ STB0899_OFF0_DC_ESTIM , STB0899_BASE_DC_ESTIM , 0x00000000 }, /* DCESTIM */
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{ STB0899_OFF0_FLL_CNTRL , STB0899_BASE_FLL_CNTRL , 0x00000000 }, /* FLLCNTRL */
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{ STB0899_OFF0_FLL_FREQ_WD , STB0899_BASE_FLL_FREQ_WD , 0x40070000 }, /* FLLFREQWD */
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{ STB0899_OFF0_ANTI_ALIAS_SEL , STB0899_BASE_ANTI_ALIAS_SEL , 0x00000001 }, /* ANTIALIASSEL */
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{ STB0899_OFF0_RRC_ALPHA , STB0899_BASE_RRC_ALPHA , 0x00000002 }, /* RRCALPHA */
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{ STB0899_OFF0_DC_ADAPT_LSHFT , STB0899_BASE_DC_ADAPT_LSHFT , 0x00000000 }, /* DCADAPTISHFT */
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{ STB0899_OFF0_IMB_OFFSET , STB0899_BASE_IMB_OFFSET , 0x0000fe01 }, /* IMBOFFSET */
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{ STB0899_OFF0_IMB_ESTIMATE , STB0899_BASE_IMB_ESTIMATE , 0x00000000 }, /* IMBESTIMATE */
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{ STB0899_OFF0_IMB_CNTRL , STB0899_BASE_IMB_CNTRL , 0x00000001 }, /* IMBCNTRL */
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{ STB0899_OFF0_IF_AGC_CNTRL2 , STB0899_BASE_IF_AGC_CNTRL2 , 0x00005007 }, /* IFAGCCNTRL2 */
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{ STB0899_OFF0_DMD_CNTRL2 , STB0899_BASE_DMD_CNTRL2 , 0x00000002 }, /* DMDCNTRL2 */
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{ STB0899_OFF0_TP_BUFFER , STB0899_BASE_TP_BUFFER , 0x00000000 }, /* TPBUFFER */
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{ STB0899_OFF0_TP_BUFFER1 , STB0899_BASE_TP_BUFFER1 , 0x00000000 }, /* TPBUFFER1 */
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{ STB0899_OFF0_TP_BUFFER2 , STB0899_BASE_TP_BUFFER2 , 0x00000000 }, /* TPBUFFER2 */
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{ STB0899_OFF0_TP_BUFFER3 , STB0899_BASE_TP_BUFFER3 , 0x00000000 }, /* TPBUFFER3 */
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{ STB0899_OFF0_TP_BUFFER4 , STB0899_BASE_TP_BUFFER4 , 0x00000000 }, /* TPBUFFER4 */
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{ STB0899_OFF0_TP_BUFFER5 , STB0899_BASE_TP_BUFFER5 , 0x00000000 }, /* TPBUFFER5 */
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{ STB0899_OFF0_TP_BUFFER6 , STB0899_BASE_TP_BUFFER6 , 0x00000000 }, /* TPBUFFER6 */
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{ STB0899_OFF0_TP_BUFFER7 , STB0899_BASE_TP_BUFFER7 , 0x00000000 }, /* TPBUFFER7 */
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{ STB0899_OFF0_TP_BUFFER8 , STB0899_BASE_TP_BUFFER8 , 0x00000000 }, /* TPBUFFER8 */
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{ STB0899_OFF0_TP_BUFFER9 , STB0899_BASE_TP_BUFFER9 , 0x00000000 }, /* TPBUFFER9 */
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{ STB0899_OFF0_TP_BUFFER10 , STB0899_BASE_TP_BUFFER10 , 0x00000000 }, /* TPBUFFER10 */
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{ STB0899_OFF0_TP_BUFFER11 , STB0899_BASE_TP_BUFFER11 , 0x00000000 }, /* TPBUFFER11 */
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{ STB0899_OFF0_TP_BUFFER12 , STB0899_BASE_TP_BUFFER12 , 0x00000000 }, /* TPBUFFER12 */
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{ STB0899_OFF0_TP_BUFFER13 , STB0899_BASE_TP_BUFFER13 , 0x00000000 }, /* TPBUFFER13 */
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{ STB0899_OFF0_TP_BUFFER14 , STB0899_BASE_TP_BUFFER14 , 0x00000000 }, /* TPBUFFER14 */
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{ STB0899_OFF0_TP_BUFFER15 , STB0899_BASE_TP_BUFFER15 , 0x00000000 }, /* TPBUFFER15 */
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{ STB0899_OFF0_TP_BUFFER16 , STB0899_BASE_TP_BUFFER16 , 0x0000ff00 }, /* TPBUFFER16 */
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{ STB0899_OFF0_TP_BUFFER17 , STB0899_BASE_TP_BUFFER17 , 0x00000100 }, /* TPBUFFER17 */
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{ STB0899_OFF0_TP_BUFFER18 , STB0899_BASE_TP_BUFFER18 , 0x0000fe01 }, /* TPBUFFER18 */
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{ STB0899_OFF0_TP_BUFFER19 , STB0899_BASE_TP_BUFFER19 , 0x000004fe }, /* TPBUFFER19 */
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{ STB0899_OFF0_TP_BUFFER20 , STB0899_BASE_TP_BUFFER20 , 0x0000cfe7 }, /* TPBUFFER20 */
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{ STB0899_OFF0_TP_BUFFER21 , STB0899_BASE_TP_BUFFER21 , 0x0000bec6 }, /* TPBUFFER21 */
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{ STB0899_OFF0_TP_BUFFER22 , STB0899_BASE_TP_BUFFER22 , 0x0000c2bf }, /* TPBUFFER22 */
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{ STB0899_OFF0_TP_BUFFER23 , STB0899_BASE_TP_BUFFER23 , 0x0000c1c1 }, /* TPBUFFER23 */
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{ STB0899_OFF0_TP_BUFFER24 , STB0899_BASE_TP_BUFFER24 , 0x0000c1c1 }, /* TPBUFFER24 */
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{ STB0899_OFF0_TP_BUFFER25 , STB0899_BASE_TP_BUFFER25 , 0x0000c1c1 }, /* TPBUFFER25 */
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{ STB0899_OFF0_TP_BUFFER26 , STB0899_BASE_TP_BUFFER26 , 0x0000c1c1 }, /* TPBUFFER26 */
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{ STB0899_OFF0_TP_BUFFER27 , STB0899_BASE_TP_BUFFER27 , 0x0000c1c0 }, /* TPBUFFER27 */
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{ STB0899_OFF0_TP_BUFFER28 , STB0899_BASE_TP_BUFFER28 , 0x0000c0c0 }, /* TPBUFFER28 */
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{ STB0899_OFF0_TP_BUFFER29 , STB0899_BASE_TP_BUFFER29 , 0x0000c1c1 }, /* TPBUFFER29 */
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{ STB0899_OFF0_TP_BUFFER30 , STB0899_BASE_TP_BUFFER30 , 0x0000c1c1 }, /* TPBUFFER30 */
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{ STB0899_OFF0_TP_BUFFER31 , STB0899_BASE_TP_BUFFER31 , 0x0000c0c1 }, /* TPBUFFER31 */
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{ STB0899_OFF0_TP_BUFFER32 , STB0899_BASE_TP_BUFFER32 , 0x0000c0c1 }, /* TPBUFFER32 */
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{ STB0899_OFF0_TP_BUFFER33 , STB0899_BASE_TP_BUFFER33 , 0x0000c1c1 }, /* TPBUFFER33 */
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{ STB0899_OFF0_TP_BUFFER34 , STB0899_BASE_TP_BUFFER34 , 0x0000c1c1 }, /* TPBUFFER34 */
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{ STB0899_OFF0_TP_BUFFER35 , STB0899_BASE_TP_BUFFER35 , 0x0000c0c1 }, /* TPBUFFER35 */
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{ STB0899_OFF0_TP_BUFFER36 , STB0899_BASE_TP_BUFFER36 , 0x0000c1c1 }, /* TPBUFFER36 */
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{ STB0899_OFF0_TP_BUFFER37 , STB0899_BASE_TP_BUFFER37 , 0x0000c0c1 }, /* TPBUFFER37 */
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{ STB0899_OFF0_TP_BUFFER38 , STB0899_BASE_TP_BUFFER38 , 0x0000c1c1 }, /* TPBUFFER38 */
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{ STB0899_OFF0_TP_BUFFER39 , STB0899_BASE_TP_BUFFER39 , 0x0000c0c0 }, /* TPBUFFER39 */
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{ STB0899_OFF0_TP_BUFFER40 , STB0899_BASE_TP_BUFFER40 , 0x0000c1c0 }, /* TPBUFFER40 */
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{ STB0899_OFF0_TP_BUFFER41 , STB0899_BASE_TP_BUFFER41 , 0x0000c1c1 }, /* TPBUFFER41 */
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{ STB0899_OFF0_TP_BUFFER42 , STB0899_BASE_TP_BUFFER42 , 0x0000c0c0 }, /* TPBUFFER42 */
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{ STB0899_OFF0_TP_BUFFER43 , STB0899_BASE_TP_BUFFER43 , 0x0000c1c0 }, /* TPBUFFER43 */
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{ STB0899_OFF0_TP_BUFFER44 , STB0899_BASE_TP_BUFFER44 , 0x0000c0c1 }, /* TPBUFFER44 */
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{ STB0899_OFF0_TP_BUFFER45 , STB0899_BASE_TP_BUFFER45 , 0x0000c1be }, /* TPBUFFER45 */
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{ STB0899_OFF0_TP_BUFFER46 , STB0899_BASE_TP_BUFFER46 , 0x0000c1c9 }, /* TPBUFFER46 */
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{ STB0899_OFF0_TP_BUFFER47 , STB0899_BASE_TP_BUFFER47 , 0x0000c0da }, /* TPBUFFER47 */
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{ STB0899_OFF0_TP_BUFFER48 , STB0899_BASE_TP_BUFFER48 , 0x0000c0ba }, /* TPBUFFER48 */
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{ STB0899_OFF0_TP_BUFFER49 , STB0899_BASE_TP_BUFFER49 , 0x0000c1c4 }, /* TPBUFFER49 */
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{ STB0899_OFF0_TP_BUFFER50 , STB0899_BASE_TP_BUFFER50 , 0x0000c1bf }, /* TPBUFFER50 */
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{ STB0899_OFF0_TP_BUFFER51 , STB0899_BASE_TP_BUFFER51 , 0x0000c0c1 }, /* TPBUFFER51 */
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{ STB0899_OFF0_TP_BUFFER52 , STB0899_BASE_TP_BUFFER52 , 0x0000c1c0 }, /* TPBUFFER52 */
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{ STB0899_OFF0_TP_BUFFER53 , STB0899_BASE_TP_BUFFER53 , 0x0000c0c1 }, /* TPBUFFER53 */
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{ STB0899_OFF0_TP_BUFFER54 , STB0899_BASE_TP_BUFFER54 , 0x0000c1c1 }, /* TPBUFFER54 */
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{ STB0899_OFF0_TP_BUFFER55 , STB0899_BASE_TP_BUFFER55 , 0x0000c1c1 }, /* TPBUFFER55 */
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{ STB0899_OFF0_TP_BUFFER56 , STB0899_BASE_TP_BUFFER56 , 0x0000c1c1 }, /* TPBUFFER56 */
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{ STB0899_OFF0_TP_BUFFER57 , STB0899_BASE_TP_BUFFER57 , 0x0000c1c1 }, /* TPBUFFER57 */
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{ STB0899_OFF0_TP_BUFFER58 , STB0899_BASE_TP_BUFFER58 , 0x0000c1c1 }, /* TPBUFFER58 */
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{ STB0899_OFF0_TP_BUFFER59 , STB0899_BASE_TP_BUFFER59 , 0x0000c1c1 }, /* TPBUFFER59 */
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{ STB0899_OFF0_TP_BUFFER60 , STB0899_BASE_TP_BUFFER60 , 0x0000c1c1 }, /* TPBUFFER60 */
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{ STB0899_OFF0_TP_BUFFER61 , STB0899_BASE_TP_BUFFER61 , 0x0000c1c1 }, /* TPBUFFER61 */
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{ STB0899_OFF0_TP_BUFFER62 , STB0899_BASE_TP_BUFFER62 , 0x0000c1c1 }, /* TPBUFFER62 */
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{ STB0899_OFF0_TP_BUFFER63 , STB0899_BASE_TP_BUFFER63 , 0x0000c1c0 }, /* TPBUFFER63 */
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{ STB0899_OFF0_RESET_CNTRL , STB0899_BASE_RESET_CNTRL , 0x00000001 }, /* RESETCNTRL */
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{ STB0899_OFF0_ACM_ENABLE , STB0899_BASE_ACM_ENABLE , 0x00005654 }, /* ACMENABLE */
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{ STB0899_OFF0_DESCR_CNTRL , STB0899_BASE_DESCR_CNTRL , 0x00000000 }, /* DESCRCNTRL */
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{ STB0899_OFF0_CSM_CNTRL1 , STB0899_BASE_CSM_CNTRL1 , 0x00020019 }, /* CSMCNTRL1 */
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{ STB0899_OFF0_CSM_CNTRL2 , STB0899_BASE_CSM_CNTRL2 , 0x004b3237 }, /* CSMCNTRL2 */
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{ STB0899_OFF0_CSM_CNTRL3 , STB0899_BASE_CSM_CNTRL3 , 0x0003dd17 }, /* CSMCNTRL3 */
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{ STB0899_OFF0_CSM_CNTRL4 , STB0899_BASE_CSM_CNTRL4 , 0x00008008 }, /* CSMCNTRL4 */
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{ STB0899_OFF0_UWP_CNTRL1 , STB0899_BASE_UWP_CNTRL1 , 0x002a3106 }, /* UWPCNTRL1 */
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{ STB0899_OFF0_UWP_CNTRL2 , STB0899_BASE_UWP_CNTRL2 , 0x0006140a }, /* UWPCNTRL2 */
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{ STB0899_OFF0_UWP_STAT1 , STB0899_BASE_UWP_STAT1 , 0x00008000 }, /* UWPSTAT1 */
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{ STB0899_OFF0_UWP_STAT2 , STB0899_BASE_UWP_STAT2 , 0x00000000 }, /* UWPSTAT2 */
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{ STB0899_OFF0_DMD_STAT2 , STB0899_BASE_DMD_STAT2 , 0x00000000 }, /* DMDSTAT2 */
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{ STB0899_OFF0_FREQ_ADJ_SCALE , STB0899_BASE_FREQ_ADJ_SCALE , 0x00000471 }, /* FREQADJSCALE */
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{ STB0899_OFF0_UWP_CNTRL3 , STB0899_BASE_UWP_CNTRL3 , 0x017b0465 }, /* UWPCNTRL3 */
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{ STB0899_OFF0_SYM_CLK_SEL , STB0899_BASE_SYM_CLK_SEL , 0x00000002 }, /* SYMCLKSEL */
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{ STB0899_OFF0_SOF_SRCH_TO , STB0899_BASE_SOF_SRCH_TO , 0x00196464 }, /* SOFSRCHTO */
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{ STB0899_OFF0_ACQ_CNTRL1 , STB0899_BASE_ACQ_CNTRL1 , 0x00000603 }, /* ACQCNTRL1 */
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{ STB0899_OFF0_ACQ_CNTRL2 , STB0899_BASE_ACQ_CNTRL2 , 0x02046666 }, /* ACQCNTRL2 */
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{ STB0899_OFF0_ACQ_CNTRL3 , STB0899_BASE_ACQ_CNTRL3 , 0x10046583 }, /* ACQCNTRL3 */
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{ STB0899_OFF0_FE_SETTLE , STB0899_BASE_FE_SETTLE , 0x00010404 }, /* FESETTLE */
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{ STB0899_OFF0_AC_DWELL , STB0899_BASE_AC_DWELL , 0x0002aa8a }, /* ACDWELL */
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{ STB0899_OFF0_ACQUIRE_TRIG , STB0899_BASE_ACQUIRE_TRIG , 0x00000000 }, /* ACQUIRETRIG */
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{ STB0899_OFF0_LOCK_LOST , STB0899_BASE_LOCK_LOST , 0x00000001 }, /* LOCKLOST */
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{ STB0899_OFF0_ACQ_STAT1 , STB0899_BASE_ACQ_STAT1 , 0x00000500 }, /* ACQSTAT1 */
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{ STB0899_OFF0_ACQ_TIMEOUT , STB0899_BASE_ACQ_TIMEOUT , 0x0028a0a0 }, /* ACQTIMEOUT */
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{ STB0899_OFF0_ACQ_TIME , STB0899_BASE_ACQ_TIME , 0x00000000 }, /* ACQTIME */
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{ STB0899_OFF0_FINAL_AGC_CNTRL , STB0899_BASE_FINAL_AGC_CNTRL , 0x00800c17 }, /* FINALAGCCNTRL*/
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{ STB0899_OFF0_FINAL_AGC_GAIN , STB0899_BASE_FINAL_AGC_GAIN , 0x00000000 }, /* FINALAGCCGAIN*/
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{ STB0899_OFF0_EQUALIZER_INIT , STB0899_BASE_EQUALIZER_INIT , 0x00000000 }, /* EQUILIZERINIT*/
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{ STB0899_OFF0_EQ_CNTRL , STB0899_BASE_EQ_CNTRL , 0x00054802 }, /* EQCNTL */
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{ STB0899_OFF0_EQ_I_INIT_COEFF_0, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF0 */
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{ STB0899_OFF1_EQ_I_INIT_COEFF_1, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF1 */
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{ STB0899_OFF2_EQ_I_INIT_COEFF_2, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF2 */
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{ STB0899_OFF3_EQ_I_INIT_COEFF_3, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF3 */
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{ STB0899_OFF4_EQ_I_INIT_COEFF_4, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF4 */
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{ STB0899_OFF5_EQ_I_INIT_COEFF_5, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000400 }, /* EQIINITCOEFF5 */
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{ STB0899_OFF6_EQ_I_INIT_COEFF_6, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF6 */
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{ STB0899_OFF7_EQ_I_INIT_COEFF_7, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF7 */
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{ STB0899_OFF8_EQ_I_INIT_COEFF_8, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF8 */
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{ STB0899_OFF9_EQ_I_INIT_COEFF_9, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF9 */
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{ STB0899_OFFa_EQ_I_INIT_COEFF_10,STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF10*/
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{ STB0899_OFF0_EQ_Q_INIT_COEFF_0, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF0 */
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{ STB0899_OFF1_EQ_Q_INIT_COEFF_1, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF1 */
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{ STB0899_OFF2_EQ_Q_INIT_COEFF_2, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF2 */
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{ STB0899_OFF3_EQ_Q_INIT_COEFF_3, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF3 */
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{ STB0899_OFF4_EQ_Q_INIT_COEFF_4, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF4 */
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{ STB0899_OFF5_EQ_Q_INIT_COEFF_5, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF5 */
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{ STB0899_OFF6_EQ_Q_INIT_COEFF_6, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF6 */
179
+
{ STB0899_OFF7_EQ_Q_INIT_COEFF_7, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF7 */
180
+
{ STB0899_OFF8_EQ_Q_INIT_COEFF_8, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF8 */
181
+
{ STB0899_OFF9_EQ_Q_INIT_COEFF_9, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF9 */
182
+
{ STB0899_OFFa_EQ_Q_INIT_COEFF_10,STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF10*/
183
+
{ STB0899_OFF0_EQ_I_OUT_COEFF_0 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT0 */
184
+
{ STB0899_OFF1_EQ_I_OUT_COEFF_1 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT1 */
185
+
{ STB0899_OFF2_EQ_I_OUT_COEFF_2 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT2 */
186
+
{ STB0899_OFF3_EQ_I_OUT_COEFF_3 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT3 */
187
+
{ STB0899_OFF4_EQ_I_OUT_COEFF_4 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT4 */
188
+
{ STB0899_OFF5_EQ_I_OUT_COEFF_5 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT5 */
189
+
{ STB0899_OFF6_EQ_I_OUT_COEFF_6 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT6 */
190
+
{ STB0899_OFF7_EQ_I_OUT_COEFF_7 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT7 */
191
+
{ STB0899_OFF8_EQ_I_OUT_COEFF_8 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT8 */
192
+
{ STB0899_OFF9_EQ_I_OUT_COEFF_9 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT9 */
193
+
{ STB0899_OFFa_EQ_I_OUT_COEFF_10,STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT10*/
194
+
{ STB0899_OFF0_EQ_Q_OUT_COEFF_0 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT0 */
195
+
{ STB0899_OFF1_EQ_Q_OUT_COEFF_1 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT1 */
196
+
{ STB0899_OFF2_EQ_Q_OUT_COEFF_2 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT2 */
197
+
{ STB0899_OFF3_EQ_Q_OUT_COEFF_3 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT3 */
198
+
{ STB0899_OFF4_EQ_Q_OUT_COEFF_4 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT4 */
199
+
{ STB0899_OFF5_EQ_Q_OUT_COEFF_5 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT5 */
200
+
{ STB0899_OFF6_EQ_Q_OUT_COEFF_6 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT6 */
201
+
{ STB0899_OFF7_EQ_Q_OUT_COEFF_7 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT7 */
202
+
{ STB0899_OFF8_EQ_Q_OUT_COEFF_8 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT8 */
203
+
{ STB0899_OFF9_EQ_Q_OUT_COEFF_9 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT9 */
204
+
{ STB0899_OFFa_EQ_Q_OUT_COEFF_10, STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT10*/
205
+
{ 0xffff , 0xffffffff , 0xffffffff },
206
+
};
207
+
static const struct stb0899_s2_reg stb0899_s2_init_4[] = {
208
+
{ STB0899_OFF0_BLOCK_LNGTH , STB0899_BASE_BLOCK_LNGTH , 0x00000008 }, /* BLOCKLNGTH */
209
+
{ STB0899_OFF0_ROW_STR , STB0899_BASE_ROW_STR , 0x000000b4 }, /* ROWSTR */
210
+
{ STB0899_OFF0_BN_END_ADDR , STB0899_BASE_BN_END_ADDR , 0x000004b5 }, /* BNANDADDR */
211
+
{ STB0899_OFF0_CN_END_ADDR , STB0899_BASE_CN_END_ADDR , 0x00000b4b }, /* CNANDADDR */
212
+
{ STB0899_OFF0_INFO_LENGTH , STB0899_BASE_INFO_LENGTH , 0x00000078 }, /* INFOLENGTH */
213
+
{ STB0899_OFF0_BOT_ADDR , STB0899_BASE_BOT_ADDR , 0x000001e0 }, /* BOT_ADDR */
214
+
{ STB0899_OFF0_BCH_BLK_LN , STB0899_BASE_BCH_BLK_LN , 0x0000a8c0 }, /* BCHBLKLN */
215
+
{ STB0899_OFF0_BCH_T , STB0899_BASE_BCH_T , 0x0000000c }, /* BCHT */
216
+
{ STB0899_OFF0_CNFG_MODE , STB0899_BASE_CNFG_MODE , 0x00000001 }, /* CNFGMODE */
217
+
{ STB0899_OFF0_LDPC_STAT , STB0899_BASE_LDPC_STAT , 0x0000000d }, /* LDPCSTAT */
218
+
{ STB0899_OFF0_ITER_SCALE , STB0899_BASE_ITER_SCALE , 0x00000040 }, /* ITERSCALE */
219
+
{ STB0899_OFF0_INPUT_MODE , STB0899_BASE_INPUT_MODE , 0x00000000 }, /* INPUTMODE */
220
+
{ STB0899_OFF0_LDPCDECRST , STB0899_BASE_LDPCDECRST , 0x00000000 }, /* LDPCDECRST */
221
+
{ STB0899_OFF0_CLK_PER_BYTE_RW , STB0899_BASE_CLK_PER_BYTE_RW , 0x00000008 }, /* CLKPERBYTE */
222
+
{ STB0899_OFF0_BCH_ERRORS , STB0899_BASE_BCH_ERRORS , 0x00000000 }, /* BCHERRORS */
223
+
{ STB0899_OFF0_LDPC_ERRORS , STB0899_BASE_LDPC_ERRORS , 0x00000000 }, /* LDPCERRORS */
224
+
{ STB0899_OFF0_BCH_MODE , STB0899_BASE_BCH_MODE , 0x00000000 }, /* BCHMODE */
225
+
{ STB0899_OFF0_ERR_ACC_PER , STB0899_BASE_ERR_ACC_PER , 0x00000008 }, /* ERRACCPER */
226
+
{ STB0899_OFF0_BCH_ERR_ACC , STB0899_BASE_BCH_ERR_ACC , 0x00000000 }, /* BCHERRACC */
227
+
{ STB0899_OFF0_FEC_TP_SEL , STB0899_BASE_FEC_TP_SEL , 0x00000000 }, /* FECTPSEL */
228
+
{ 0xffff , 0xffffffff , 0xffffffff },
229
+
};
230
+
231
+
static const struct stb0899_s1_reg stb0899_s1_init_5[] = {
232
+
{ STB0899_TSTCK , 0x00 },
233
+
{ STB0899_TSTRES , 0x00 },
234
+
{ STB0899_TSTOUT , 0x00 },
235
+
{ STB0899_TSTIN , 0x00 },
236
+
{ STB0899_TSTSYS , 0x00 },
237
+
{ STB0899_TSTCHIP , 0x00 },
238
+
{ STB0899_TSTFREE , 0x00 },
239
+
{ STB0899_TSTI2C , 0x00 },
240
+
{ STB0899_BITSPEEDM , 0x00 },
241
+
{ STB0899_BITSPEEDL , 0x00 },
242
+
{ STB0899_TBUSBIT , 0x00 },
243
+
{ STB0899_TSTDIS , 0x00 },
244
+
{ STB0899_TSTDISRX , 0x00 },
245
+
{ STB0899_TSTJETON , 0x00 },
246
+
{ STB0899_TSTDCADJ , 0x00 },
247
+
{ STB0899_TSTAGC1 , 0x00 },
248
+
{ STB0899_TSTAGC1N , 0x00 },
249
+
{ STB0899_TSTPOLYPH , 0x00 },
250
+
{ STB0899_TSTR , 0x00 },
251
+
{ STB0899_TSTAGC2 , 0x00 },
252
+
{ STB0899_TSTCTL1 , 0x00 },
253
+
{ STB0899_TSTCTL2 , 0x00 },
254
+
{ STB0899_TSTCTL3 , 0x00 },
255
+
{ STB0899_TSTDEMAP , 0x00 },
256
+
{ STB0899_TSTDEMAP2 , 0x00 },
257
+
{ STB0899_TSTDEMMON , 0x00 },
258
+
{ STB0899_TSTRATE , 0x00 },
259
+
{ STB0899_TSTSELOUT , 0x00 },
260
+
{ STB0899_TSYNC , 0x00 },
261
+
{ STB0899_TSTERR , 0x00 },
262
+
{ STB0899_TSTRAM1 , 0x00 },
263
+
{ STB0899_TSTVSELOUT , 0x00 },
264
+
{ STB0899_TSTFORCEIN , 0x00 },
265
+
{ STB0899_TSTRS1 , 0x00 },
266
+
{ STB0899_TSTRS2 , 0x00 },
267
+
{ STB0899_TSTRS3 , 0x00 },
268
+
{ STB0899_GHOSTREG , 0x81 },
269
+
{ 0xffff , 0xff },
270
+
};
271
+
272
+
#define STB0899_DVBS2_ESNO_AVE 3
273
+
#define STB0899_DVBS2_ESNO_QUANT 32
274
+
#define STB0899_DVBS2_AVFRAMES_COARSE 10
275
+
#define STB0899_DVBS2_AVFRAMES_FINE 20
276
+
#define STB0899_DVBS2_MISS_THRESHOLD 6
277
+
#define STB0899_DVBS2_UWP_THRESHOLD_ACQ 1125
278
+
#define STB0899_DVBS2_UWP_THRESHOLD_TRACK 758
279
+
#define STB0899_DVBS2_UWP_THRESHOLD_SOF 1350
280
+
#define STB0899_DVBS2_SOF_SEARCH_TIMEOUT 1664100
281
+
282
+
#define STB0899_DVBS2_BTR_NCO_BITS 28
283
+
#define STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET 15
284
+
#define STB0899_DVBS2_CRL_NCO_BITS 30
285
+
#define STB0899_DVBS2_LDPC_MAX_ITER 70
286
+
287
+
#endif //__STB0899_CFG_H
+108
drivers/media/dvb/frontends/stb6100_cfg.h
+108
drivers/media/dvb/frontends/stb6100_cfg.h
···
1
+
/*
2
+
STB6100 Silicon Tuner
3
+
Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
+
5
+
Copyright (C) ST Microelectronics
6
+
7
+
This program is free software; you can redistribute it and/or modify
8
+
it under the terms of the GNU General Public License as published by
9
+
the Free Software Foundation; either version 2 of the License, or
10
+
(at your option) any later version.
11
+
12
+
This program is distributed in the hope that it will be useful,
13
+
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15
+
GNU General Public License for more details.
16
+
17
+
You should have received a copy of the GNU General Public License
18
+
along with this program; if not, write to the Free Software
19
+
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
+
*/
21
+
22
+
static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency)
23
+
{
24
+
struct dvb_frontend_ops *frontend_ops = NULL;
25
+
struct dvb_tuner_ops *tuner_ops = NULL;
26
+
struct tuner_state t_state;
27
+
int err = 0;
28
+
29
+
if (&fe->ops)
30
+
frontend_ops = &fe->ops;
31
+
if (&frontend_ops->tuner_ops)
32
+
tuner_ops = &frontend_ops->tuner_ops;
33
+
if (tuner_ops->get_state) {
34
+
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
35
+
printk("%s: Invalid parameter\n", __func__);
36
+
return err;
37
+
}
38
+
*frequency = t_state.frequency;
39
+
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
40
+
}
41
+
return 0;
42
+
}
43
+
44
+
static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
45
+
{
46
+
struct dvb_frontend_ops *frontend_ops = NULL;
47
+
struct dvb_tuner_ops *tuner_ops = NULL;
48
+
struct tuner_state t_state;
49
+
int err = 0;
50
+
51
+
t_state.frequency = frequency;
52
+
if (&fe->ops)
53
+
frontend_ops = &fe->ops;
54
+
if (&frontend_ops->tuner_ops)
55
+
tuner_ops = &frontend_ops->tuner_ops;
56
+
if (tuner_ops->set_state) {
57
+
if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
58
+
printk("%s: Invalid parameter\n", __func__);
59
+
return err;
60
+
}
61
+
}
62
+
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
63
+
return 0;
64
+
}
65
+
66
+
static int stb6100_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
67
+
{
68
+
struct dvb_frontend_ops *frontend_ops = &fe->ops;
69
+
struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
70
+
struct tuner_state t_state;
71
+
int err = 0;
72
+
73
+
if (&fe->ops)
74
+
frontend_ops = &fe->ops;
75
+
if (&frontend_ops->tuner_ops)
76
+
tuner_ops = &frontend_ops->tuner_ops;
77
+
if (tuner_ops->get_state) {
78
+
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
79
+
printk("%s: Invalid parameter\n", __func__);
80
+
return err;
81
+
}
82
+
*bandwidth = t_state.bandwidth;
83
+
}
84
+
printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
85
+
return 0;
86
+
}
87
+
88
+
static int stb6100_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
89
+
{
90
+
struct dvb_frontend_ops *frontend_ops = NULL;
91
+
struct dvb_tuner_ops *tuner_ops = NULL;
92
+
struct tuner_state t_state;
93
+
int err = 0;
94
+
95
+
t_state.bandwidth = bandwidth;
96
+
if (&fe->ops)
97
+
frontend_ops = &fe->ops;
98
+
if (&frontend_ops->tuner_ops)
99
+
tuner_ops = &frontend_ops->tuner_ops;
100
+
if (tuner_ops->set_state) {
101
+
if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
102
+
printk("%s: Invalid parameter\n", __func__);
103
+
return err;
104
+
}
105
+
}
106
+
printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
107
+
return 0;
108
+
}
+19
drivers/media/dvb/frontends/tda8261.h
+19
drivers/media/dvb/frontends/tda8261.h
···
1
+
/*
2
+
TDA8261 8PSK/QPSK tuner driver
3
+
Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
+
5
+
This program is free software; you can redistribute it and/or modify
6
+
it under the terms of the GNU General Public License as published by
7
+
the Free Software Foundation; either version 2 of the License, or
8
+
(at your option) any later version.
9
+
10
+
This program is distributed in the hope that it will be useful,
11
+
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
GNU General Public License for more details.
14
+
15
+
You should have received a copy of the GNU General Public License
16
+
along with this program; if not, write to the Free Software
17
+
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
+
*/
19
+
1
20
#ifndef __TDA8261_H
2
21
#define __TDA8261_H
3
22
+84
drivers/media/dvb/frontends/tda8261_cfg.h
+84
drivers/media/dvb/frontends/tda8261_cfg.h
···
1
+
/*
2
+
TDA8261 8PSK/QPSK tuner driver
3
+
Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
+
5
+
This program is free software; you can redistribute it and/or modify
6
+
it under the terms of the GNU General Public License as published by
7
+
the Free Software Foundation; either version 2 of the License, or
8
+
(at your option) any later version.
9
+
10
+
This program is distributed in the hope that it will be useful,
11
+
but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
GNU General Public License for more details.
14
+
15
+
You should have received a copy of the GNU General Public License
16
+
along with this program; if not, write to the Free Software
17
+
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
18
+
*/
19
+
20
+
static int tda8261_get_frequency(struct dvb_frontend *fe, u32 *frequency)
21
+
{
22
+
struct dvb_frontend_ops *frontend_ops = NULL;
23
+
struct dvb_tuner_ops *tuner_ops = NULL;
24
+
struct tuner_state t_state;
25
+
int err = 0;
26
+
27
+
if (&fe->ops)
28
+
frontend_ops = &fe->ops;
29
+
if (&frontend_ops->tuner_ops)
30
+
tuner_ops = &frontend_ops->tuner_ops;
31
+
if (tuner_ops->get_state) {
32
+
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
33
+
printk("%s: Invalid parameter\n", __func__);
34
+
return err;
35
+
}
36
+
*frequency = t_state.frequency;
37
+
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
38
+
}
39
+
return 0;
40
+
}
41
+
42
+
static int tda8261_set_frequency(struct dvb_frontend *fe, u32 frequency)
43
+
{
44
+
struct dvb_frontend_ops *frontend_ops = NULL;
45
+
struct dvb_tuner_ops *tuner_ops = NULL;
46
+
struct tuner_state t_state;
47
+
int err = 0;
48
+
49
+
t_state.frequency = frequency;
50
+
if (&fe->ops)
51
+
frontend_ops = &fe->ops;
52
+
if (&frontend_ops->tuner_ops)
53
+
tuner_ops = &frontend_ops->tuner_ops;
54
+
if (tuner_ops->set_state) {
55
+
if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
56
+
printk("%s: Invalid parameter\n", __func__);
57
+
return err;
58
+
}
59
+
}
60
+
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
61
+
return 0;
62
+
}
63
+
64
+
static int tda8261_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
65
+
{
66
+
struct dvb_frontend_ops *frontend_ops = &fe->ops;
67
+
struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
68
+
struct tuner_state t_state;
69
+
int err = 0;
70
+
71
+
if (&fe->ops)
72
+
frontend_ops = &fe->ops;
73
+
if (&frontend_ops->tuner_ops)
74
+
tuner_ops = &frontend_ops->tuner_ops;
75
+
if (tuner_ops->get_state) {
76
+
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
77
+
printk("%s: Invalid parameter\n", __func__);
78
+
return err;
79
+
}
80
+
*bandwidth = t_state.bandwidth;
81
+
}
82
+
printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
83
+
return 0;
84
+
}
+18
-345
drivers/media/dvb/ttpci/budget-av.c
+18
-345
drivers/media/dvb/ttpci/budget-av.c
···
37
37
#include "stv0299.h"
38
38
#include "stb0899_drv.h"
39
39
#include "stb0899_reg.h"
40
+
#include "stb0899_cfg.h"
40
41
#include "tda8261.h"
42
+
#include "tda8261_cfg.h"
41
43
#include "tda1002x.h"
42
44
#include "tda1004x.h"
43
45
#include "tua6100.h"
···
977
975
{ 0xffff , 0xff },
978
976
};
979
977
980
-
static const struct stb0899_s2_reg knc1_stb0899_s2_init_2[] = {
981
-
982
-
{ STB0899_OFF0_DMD_STATUS , STB0899_BASE_DMD_STATUS , 0x00000103 }, /* DMDSTATUS */
983
-
{ STB0899_OFF0_CRL_FREQ , STB0899_BASE_CRL_FREQ , 0x3ed1da56 }, /* CRLFREQ */
984
-
{ STB0899_OFF0_BTR_FREQ , STB0899_BASE_BTR_FREQ , 0x00004000 }, /* BTRFREQ */
985
-
{ STB0899_OFF0_IF_AGC_GAIN , STB0899_BASE_IF_AGC_GAIN , 0x00002ade }, /* IFAGCGAIN */
986
-
{ STB0899_OFF0_BB_AGC_GAIN , STB0899_BASE_BB_AGC_GAIN , 0x000001bc }, /* BBAGCGAIN */
987
-
{ STB0899_OFF0_DC_OFFSET , STB0899_BASE_DC_OFFSET , 0x00000200 }, /* DCOFFSET */
988
-
{ STB0899_OFF0_DMD_CNTRL , STB0899_BASE_DMD_CNTRL , 0x0000000f }, /* DMDCNTRL */
989
-
990
-
{ STB0899_OFF0_IF_AGC_CNTRL , STB0899_BASE_IF_AGC_CNTRL , 0x03fb4a20 }, /* IFAGCCNTRL */
991
-
{ STB0899_OFF0_BB_AGC_CNTRL , STB0899_BASE_BB_AGC_CNTRL , 0x00200c97 }, /* BBAGCCNTRL */
992
-
993
-
{ STB0899_OFF0_CRL_CNTRL , STB0899_BASE_CRL_CNTRL , 0x00000016 }, /* CRLCNTRL */
994
-
{ STB0899_OFF0_CRL_PHS_INIT , STB0899_BASE_CRL_PHS_INIT , 0x00000000 }, /* CRLPHSINIT */
995
-
{ STB0899_OFF0_CRL_FREQ_INIT , STB0899_BASE_CRL_FREQ_INIT , 0x00000000 }, /* CRLFREQINIT */
996
-
{ STB0899_OFF0_CRL_LOOP_GAIN , STB0899_BASE_CRL_LOOP_GAIN , 0x00000000 }, /* CRLLOOPGAIN */
997
-
{ STB0899_OFF0_CRL_NOM_FREQ , STB0899_BASE_CRL_NOM_FREQ , 0x3ed097b6 }, /* CRLNOMFREQ */
998
-
{ STB0899_OFF0_CRL_SWP_RATE , STB0899_BASE_CRL_SWP_RATE , 0x00000000 }, /* CRLSWPRATE */
999
-
{ STB0899_OFF0_CRL_MAX_SWP , STB0899_BASE_CRL_MAX_SWP , 0x00000000 }, /* CRLMAXSWP */
1000
-
{ STB0899_OFF0_CRL_LK_CNTRL , STB0899_BASE_CRL_LK_CNTRL , 0x0f6cdc01 }, /* CRLLKCNTRL */
1001
-
{ STB0899_OFF0_DECIM_CNTRL , STB0899_BASE_DECIM_CNTRL , 0x00000000 }, /* DECIMCNTRL */
1002
-
{ STB0899_OFF0_BTR_CNTRL , STB0899_BASE_BTR_CNTRL , 0x00003993 }, /* BTRCNTRL */
1003
-
{ STB0899_OFF0_BTR_LOOP_GAIN , STB0899_BASE_BTR_LOOP_GAIN , 0x000d3c6f }, /* BTRLOOPGAIN */
1004
-
{ STB0899_OFF0_BTR_PHS_INIT , STB0899_BASE_BTR_PHS_INIT , 0x00000000 }, /* BTRPHSINIT */
1005
-
{ STB0899_OFF0_BTR_FREQ_INIT , STB0899_BASE_BTR_FREQ_INIT , 0x00000000 }, /* BTRFREQINIT */
1006
-
{ STB0899_OFF0_BTR_NOM_FREQ , STB0899_BASE_BTR_NOM_FREQ , 0x0238e38e }, /* BTRNOMFREQ */
1007
-
{ STB0899_OFF0_BTR_LK_CNTRL , STB0899_BASE_BTR_LK_CNTRL , 0x00000000 }, /* BTRLKCNTRL */
1008
-
{ STB0899_OFF0_DECN_CNTRL , STB0899_BASE_DECN_CNTRL , 0x00000000 }, /* DECNCNTRL */
1009
-
{ STB0899_OFF0_TP_CNTRL , STB0899_BASE_TP_CNTRL , 0x00000000 }, /* TPCNTRL */
1010
-
{ STB0899_OFF0_TP_BUF_STATUS , STB0899_BASE_TP_BUF_STATUS , 0x00000000 }, /* TPBUFSTATUS */
1011
-
{ STB0899_OFF0_DC_ESTIM , STB0899_BASE_DC_ESTIM , 0x00000000 }, /* DCESTIM */
1012
-
{ STB0899_OFF0_FLL_CNTRL , STB0899_BASE_FLL_CNTRL , 0x00000000 }, /* FLLCNTRL */
1013
-
{ STB0899_OFF0_FLL_FREQ_WD , STB0899_BASE_FLL_FREQ_WD , 0x40070000 }, /* FLLFREQWD */
1014
-
{ STB0899_OFF0_ANTI_ALIAS_SEL , STB0899_BASE_ANTI_ALIAS_SEL , 0x00000001 }, /* ANTIALIASSEL */
1015
-
{ STB0899_OFF0_RRC_ALPHA , STB0899_BASE_RRC_ALPHA , 0x00000002 }, /* RRCALPHA */
1016
-
{ STB0899_OFF0_DC_ADAPT_LSHFT , STB0899_BASE_DC_ADAPT_LSHFT , 0x00000000 }, /* DCADAPTISHFT */
1017
-
{ STB0899_OFF0_IMB_OFFSET , STB0899_BASE_IMB_OFFSET , 0x0000fe01 }, /* IMBOFFSET */
1018
-
{ STB0899_OFF0_IMB_ESTIMATE , STB0899_BASE_IMB_ESTIMATE , 0x00000000 }, /* IMBESTIMATE */
1019
-
{ STB0899_OFF0_IMB_CNTRL , STB0899_BASE_IMB_CNTRL , 0x00000001 }, /* IMBCNTRL */
1020
-
{ STB0899_OFF0_IF_AGC_CNTRL2 , STB0899_BASE_IF_AGC_CNTRL2 , 0x00005007 }, /* IFAGCCNTRL2 */
1021
-
{ STB0899_OFF0_DMD_CNTRL2 , STB0899_BASE_DMD_CNTRL2 , 0x00000002 }, /* DMDCNTRL2 */
1022
-
{ STB0899_OFF0_TP_BUFFER , STB0899_BASE_TP_BUFFER , 0x00000000 }, /* TPBUFFER */
1023
-
{ STB0899_OFF0_TP_BUFFER1 , STB0899_BASE_TP_BUFFER1 , 0x00000000 }, /* TPBUFFER1 */
1024
-
{ STB0899_OFF0_TP_BUFFER2 , STB0899_BASE_TP_BUFFER2 , 0x00000000 }, /* TPBUFFER2 */
1025
-
{ STB0899_OFF0_TP_BUFFER3 , STB0899_BASE_TP_BUFFER3 , 0x00000000 }, /* TPBUFFER3 */
1026
-
{ STB0899_OFF0_TP_BUFFER4 , STB0899_BASE_TP_BUFFER4 , 0x00000000 }, /* TPBUFFER4 */
1027
-
{ STB0899_OFF0_TP_BUFFER5 , STB0899_BASE_TP_BUFFER5 , 0x00000000 }, /* TPBUFFER5 */
1028
-
{ STB0899_OFF0_TP_BUFFER6 , STB0899_BASE_TP_BUFFER6 , 0x00000000 }, /* TPBUFFER6 */
1029
-
{ STB0899_OFF0_TP_BUFFER7 , STB0899_BASE_TP_BUFFER7 , 0x00000000 }, /* TPBUFFER7 */
1030
-
{ STB0899_OFF0_TP_BUFFER8 , STB0899_BASE_TP_BUFFER8 , 0x00000000 }, /* TPBUFFER8 */
1031
-
{ STB0899_OFF0_TP_BUFFER9 , STB0899_BASE_TP_BUFFER9 , 0x00000000 }, /* TPBUFFER9 */
1032
-
{ STB0899_OFF0_TP_BUFFER10 , STB0899_BASE_TP_BUFFER10 , 0x00000000 }, /* TPBUFFER10 */
1033
-
{ STB0899_OFF0_TP_BUFFER11 , STB0899_BASE_TP_BUFFER11 , 0x00000000 }, /* TPBUFFER11 */
1034
-
{ STB0899_OFF0_TP_BUFFER12 , STB0899_BASE_TP_BUFFER12 , 0x00000000 }, /* TPBUFFER12 */
1035
-
{ STB0899_OFF0_TP_BUFFER13 , STB0899_BASE_TP_BUFFER13 , 0x00000000 }, /* TPBUFFER13 */
1036
-
{ STB0899_OFF0_TP_BUFFER14 , STB0899_BASE_TP_BUFFER14 , 0x00000000 }, /* TPBUFFER14 */
1037
-
{ STB0899_OFF0_TP_BUFFER15 , STB0899_BASE_TP_BUFFER15 , 0x00000000 }, /* TPBUFFER15 */
1038
-
{ STB0899_OFF0_TP_BUFFER16 , STB0899_BASE_TP_BUFFER16 , 0x0000ff00 }, /* TPBUFFER16 */
1039
-
{ STB0899_OFF0_TP_BUFFER17 , STB0899_BASE_TP_BUFFER17 , 0x00000100 }, /* TPBUFFER17 */
1040
-
{ STB0899_OFF0_TP_BUFFER18 , STB0899_BASE_TP_BUFFER18 , 0x0000fe01 }, /* TPBUFFER18 */
1041
-
{ STB0899_OFF0_TP_BUFFER19 , STB0899_BASE_TP_BUFFER19 , 0x000004fe }, /* TPBUFFER19 */
1042
-
{ STB0899_OFF0_TP_BUFFER20 , STB0899_BASE_TP_BUFFER20 , 0x0000cfe7 }, /* TPBUFFER20 */
1043
-
{ STB0899_OFF0_TP_BUFFER21 , STB0899_BASE_TP_BUFFER21 , 0x0000bec6 }, /* TPBUFFER21 */
1044
-
{ STB0899_OFF0_TP_BUFFER22 , STB0899_BASE_TP_BUFFER22 , 0x0000c2bf }, /* TPBUFFER22 */
1045
-
{ STB0899_OFF0_TP_BUFFER23 , STB0899_BASE_TP_BUFFER23 , 0x0000c1c1 }, /* TPBUFFER23 */
1046
-
{ STB0899_OFF0_TP_BUFFER24 , STB0899_BASE_TP_BUFFER24 , 0x0000c1c1 }, /* TPBUFFER24 */
1047
-
{ STB0899_OFF0_TP_BUFFER25 , STB0899_BASE_TP_BUFFER25 , 0x0000c1c1 }, /* TPBUFFER25 */
1048
-
{ STB0899_OFF0_TP_BUFFER26 , STB0899_BASE_TP_BUFFER26 , 0x0000c1c1 }, /* TPBUFFER26 */
1049
-
{ STB0899_OFF0_TP_BUFFER27 , STB0899_BASE_TP_BUFFER27 , 0x0000c1c0 }, /* TPBUFFER27 */
1050
-
{ STB0899_OFF0_TP_BUFFER28 , STB0899_BASE_TP_BUFFER28 , 0x0000c0c0 }, /* TPBUFFER28 */
1051
-
{ STB0899_OFF0_TP_BUFFER29 , STB0899_BASE_TP_BUFFER29 , 0x0000c1c1 }, /* TPBUFFER29 */
1052
-
{ STB0899_OFF0_TP_BUFFER30 , STB0899_BASE_TP_BUFFER30 , 0x0000c1c1 }, /* TPBUFFER30 */
1053
-
{ STB0899_OFF0_TP_BUFFER31 , STB0899_BASE_TP_BUFFER31 , 0x0000c0c1 }, /* TPBUFFER31 */
1054
-
{ STB0899_OFF0_TP_BUFFER32 , STB0899_BASE_TP_BUFFER32 , 0x0000c0c1 }, /* TPBUFFER32 */
1055
-
{ STB0899_OFF0_TP_BUFFER33 , STB0899_BASE_TP_BUFFER33 , 0x0000c1c1 }, /* TPBUFFER33 */
1056
-
{ STB0899_OFF0_TP_BUFFER34 , STB0899_BASE_TP_BUFFER34 , 0x0000c1c1 }, /* TPBUFFER34 */
1057
-
{ STB0899_OFF0_TP_BUFFER35 , STB0899_BASE_TP_BUFFER35 , 0x0000c0c1 }, /* TPBUFFER35 */
1058
-
{ STB0899_OFF0_TP_BUFFER36 , STB0899_BASE_TP_BUFFER36 , 0x0000c1c1 }, /* TPBUFFER36 */
1059
-
{ STB0899_OFF0_TP_BUFFER37 , STB0899_BASE_TP_BUFFER37 , 0x0000c0c1 }, /* TPBUFFER37 */
1060
-
{ STB0899_OFF0_TP_BUFFER38 , STB0899_BASE_TP_BUFFER38 , 0x0000c1c1 }, /* TPBUFFER38 */
1061
-
{ STB0899_OFF0_TP_BUFFER39 , STB0899_BASE_TP_BUFFER39 , 0x0000c0c0 }, /* TPBUFFER39 */
1062
-
{ STB0899_OFF0_TP_BUFFER40 , STB0899_BASE_TP_BUFFER40 , 0x0000c1c0 }, /* TPBUFFER40 */
1063
-
{ STB0899_OFF0_TP_BUFFER41 , STB0899_BASE_TP_BUFFER41 , 0x0000c1c1 }, /* TPBUFFER41 */
1064
-
{ STB0899_OFF0_TP_BUFFER42 , STB0899_BASE_TP_BUFFER42 , 0x0000c0c0 }, /* TPBUFFER42 */
1065
-
{ STB0899_OFF0_TP_BUFFER43 , STB0899_BASE_TP_BUFFER43 , 0x0000c1c0 }, /* TPBUFFER43 */
1066
-
{ STB0899_OFF0_TP_BUFFER44 , STB0899_BASE_TP_BUFFER44 , 0x0000c0c1 }, /* TPBUFFER44 */
1067
-
{ STB0899_OFF0_TP_BUFFER45 , STB0899_BASE_TP_BUFFER45 , 0x0000c1be }, /* TPBUFFER45 */
1068
-
{ STB0899_OFF0_TP_BUFFER46 , STB0899_BASE_TP_BUFFER46 , 0x0000c1c9 }, /* TPBUFFER46 */
1069
-
{ STB0899_OFF0_TP_BUFFER47 , STB0899_BASE_TP_BUFFER47 , 0x0000c0da }, /* TPBUFFER47 */
1070
-
{ STB0899_OFF0_TP_BUFFER48 , STB0899_BASE_TP_BUFFER48 , 0x0000c0ba }, /* TPBUFFER48 */
1071
-
{ STB0899_OFF0_TP_BUFFER49 , STB0899_BASE_TP_BUFFER49 , 0x0000c1c4 }, /* TPBUFFER49 */
1072
-
{ STB0899_OFF0_TP_BUFFER50 , STB0899_BASE_TP_BUFFER50 , 0x0000c1bf }, /* TPBUFFER50 */
1073
-
{ STB0899_OFF0_TP_BUFFER51 , STB0899_BASE_TP_BUFFER51 , 0x0000c0c1 }, /* TPBUFFER51 */
1074
-
{ STB0899_OFF0_TP_BUFFER52 , STB0899_BASE_TP_BUFFER52 , 0x0000c1c0 }, /* TPBUFFER52 */
1075
-
{ STB0899_OFF0_TP_BUFFER53 , STB0899_BASE_TP_BUFFER53 , 0x0000c0c1 }, /* TPBUFFER53 */
1076
-
{ STB0899_OFF0_TP_BUFFER54 , STB0899_BASE_TP_BUFFER54 , 0x0000c1c1 }, /* TPBUFFER54 */
1077
-
{ STB0899_OFF0_TP_BUFFER55 , STB0899_BASE_TP_BUFFER55 , 0x0000c1c1 }, /* TPBUFFER55 */
1078
-
{ STB0899_OFF0_TP_BUFFER56 , STB0899_BASE_TP_BUFFER56 , 0x0000c1c1 }, /* TPBUFFER56 */
1079
-
{ STB0899_OFF0_TP_BUFFER57 , STB0899_BASE_TP_BUFFER57 , 0x0000c1c1 }, /* TPBUFFER57 */
1080
-
{ STB0899_OFF0_TP_BUFFER58 , STB0899_BASE_TP_BUFFER58 , 0x0000c1c1 }, /* TPBUFFER58 */
1081
-
{ STB0899_OFF0_TP_BUFFER59 , STB0899_BASE_TP_BUFFER59 , 0x0000c1c1 }, /* TPBUFFER59 */
1082
-
{ STB0899_OFF0_TP_BUFFER60 , STB0899_BASE_TP_BUFFER60 , 0x0000c1c1 }, /* TPBUFFER60 */
1083
-
{ STB0899_OFF0_TP_BUFFER61 , STB0899_BASE_TP_BUFFER61 , 0x0000c1c1 }, /* TPBUFFER61 */
1084
-
{ STB0899_OFF0_TP_BUFFER62 , STB0899_BASE_TP_BUFFER62 , 0x0000c1c1 }, /* TPBUFFER62 */
1085
-
{ STB0899_OFF0_TP_BUFFER63 , STB0899_BASE_TP_BUFFER63 , 0x0000c1c0 }, /* TPBUFFER63 */
1086
-
{ STB0899_OFF0_RESET_CNTRL , STB0899_BASE_RESET_CNTRL , 0x00000001 }, /* RESETCNTRL */
1087
-
{ STB0899_OFF0_ACM_ENABLE , STB0899_BASE_ACM_ENABLE , 0x00005654 }, /* ACMENABLE */
1088
-
{ STB0899_OFF0_DESCR_CNTRL , STB0899_BASE_DESCR_CNTRL , 0x00000000 }, /* DESCRCNTRL */
1089
-
{ STB0899_OFF0_CSM_CNTRL1 , STB0899_BASE_CSM_CNTRL1 , 0x00020019 }, /* CSMCNTRL1 */
1090
-
{ STB0899_OFF0_CSM_CNTRL2 , STB0899_BASE_CSM_CNTRL2 , 0x004b3237 }, /* CSMCNTRL2 */
1091
-
{ STB0899_OFF0_CSM_CNTRL3 , STB0899_BASE_CSM_CNTRL3 , 0x0003dd17 }, /* CSMCNTRL3 */
1092
-
{ STB0899_OFF0_CSM_CNTRL4 , STB0899_BASE_CSM_CNTRL4 , 0x00008008 }, /* CSMCNTRL4 */
1093
-
{ STB0899_OFF0_UWP_CNTRL1 , STB0899_BASE_UWP_CNTRL1 , 0x002a3106 }, /* UWPCNTRL1 */
1094
-
{ STB0899_OFF0_UWP_CNTRL2 , STB0899_BASE_UWP_CNTRL2 , 0x0006140a }, /* UWPCNTRL2 */
1095
-
{ STB0899_OFF0_UWP_STAT1 , STB0899_BASE_UWP_STAT1 , 0x00008000 }, /* UWPSTAT1 */
1096
-
{ STB0899_OFF0_UWP_STAT2 , STB0899_BASE_UWP_STAT2 , 0x00000000 }, /* UWPSTAT2 */
1097
-
{ STB0899_OFF0_DMD_STAT2 , STB0899_BASE_DMD_STAT2 , 0x00000000 }, /* DMDSTAT2 */
1098
-
{ STB0899_OFF0_FREQ_ADJ_SCALE , STB0899_BASE_FREQ_ADJ_SCALE , 0x00000471 }, /* FREQADJSCALE */
1099
-
{ STB0899_OFF0_UWP_CNTRL3 , STB0899_BASE_UWP_CNTRL3 , 0x017b0465 }, /* UWPCNTRL3 */
1100
-
{ STB0899_OFF0_SYM_CLK_SEL , STB0899_BASE_SYM_CLK_SEL , 0x00000002 }, /* SYMCLKSEL */
1101
-
{ STB0899_OFF0_SOF_SRCH_TO , STB0899_BASE_SOF_SRCH_TO , 0x00196464 }, /* SOFSRCHTO */
1102
-
{ STB0899_OFF0_ACQ_CNTRL1 , STB0899_BASE_ACQ_CNTRL1 , 0x00000603 }, /* ACQCNTRL1 */
1103
-
{ STB0899_OFF0_ACQ_CNTRL2 , STB0899_BASE_ACQ_CNTRL2 , 0x02046666 }, /* ACQCNTRL2 */
1104
-
{ STB0899_OFF0_ACQ_CNTRL3 , STB0899_BASE_ACQ_CNTRL3 , 0x10046583 }, /* ACQCNTRL3 */
1105
-
{ STB0899_OFF0_FE_SETTLE , STB0899_BASE_FE_SETTLE , 0x00010404 }, /* FESETTLE */
1106
-
{ STB0899_OFF0_AC_DWELL , STB0899_BASE_AC_DWELL , 0x0002aa8a }, /* ACDWELL */
1107
-
{ STB0899_OFF0_ACQUIRE_TRIG , STB0899_BASE_ACQUIRE_TRIG , 0x00000000 }, /* ACQUIRETRIG */
1108
-
{ STB0899_OFF0_LOCK_LOST , STB0899_BASE_LOCK_LOST , 0x00000001 }, /* LOCKLOST */
1109
-
{ STB0899_OFF0_ACQ_STAT1 , STB0899_BASE_ACQ_STAT1 , 0x00000500 }, /* ACQSTAT1 */
1110
-
{ STB0899_OFF0_ACQ_TIMEOUT , STB0899_BASE_ACQ_TIMEOUT , 0x0028a0a0 }, /* ACQTIMEOUT */
1111
-
{ STB0899_OFF0_ACQ_TIME , STB0899_BASE_ACQ_TIME , 0x00000000 }, /* ACQTIME */
1112
-
{ STB0899_OFF0_FINAL_AGC_CNTRL , STB0899_BASE_FINAL_AGC_CNTRL , 0x00800c17 }, /* FINALAGCCNTRL*/
1113
-
{ STB0899_OFF0_FINAL_AGC_GAIN , STB0899_BASE_FINAL_AGC_GAIN , 0x00000000 }, /* FINALAGCCGAIN*/
1114
-
{ STB0899_OFF0_EQUALIZER_INIT , STB0899_BASE_EQUALIZER_INIT , 0x00000000 }, /* EQUILIZERINIT*/
1115
-
{ STB0899_OFF0_EQ_CNTRL , STB0899_BASE_EQ_CNTRL , 0x00054802 }, /* EQCNTL */
1116
-
{ STB0899_OFF0_EQ_I_INIT_COEFF_0, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF0 */
1117
-
{ STB0899_OFF1_EQ_I_INIT_COEFF_1, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF1 */
1118
-
{ STB0899_OFF2_EQ_I_INIT_COEFF_2, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF2 */
1119
-
{ STB0899_OFF3_EQ_I_INIT_COEFF_3, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF3 */
1120
-
{ STB0899_OFF4_EQ_I_INIT_COEFF_4, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF4 */
1121
-
{ STB0899_OFF5_EQ_I_INIT_COEFF_5, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000400 }, /* EQIINITCOEFF5 */
1122
-
{ STB0899_OFF6_EQ_I_INIT_COEFF_6, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF6 */
1123
-
{ STB0899_OFF7_EQ_I_INIT_COEFF_7, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF7 */
1124
-
{ STB0899_OFF8_EQ_I_INIT_COEFF_8, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF8 */
1125
-
{ STB0899_OFF9_EQ_I_INIT_COEFF_9, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF9 */
1126
-
{ STB0899_OFFa_EQ_I_INIT_COEFF_10,STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF10*/
1127
-
{ STB0899_OFF0_EQ_Q_INIT_COEFF_0, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF0 */
1128
-
{ STB0899_OFF1_EQ_Q_INIT_COEFF_1, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF1 */
1129
-
{ STB0899_OFF2_EQ_Q_INIT_COEFF_2, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF2 */
1130
-
{ STB0899_OFF3_EQ_Q_INIT_COEFF_3, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF3 */
1131
-
{ STB0899_OFF4_EQ_Q_INIT_COEFF_4, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF4 */
1132
-
{ STB0899_OFF5_EQ_Q_INIT_COEFF_5, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF5 */
1133
-
{ STB0899_OFF6_EQ_Q_INIT_COEFF_6, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF6 */
1134
-
{ STB0899_OFF7_EQ_Q_INIT_COEFF_7, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF7 */
1135
-
{ STB0899_OFF8_EQ_Q_INIT_COEFF_8, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF8 */
1136
-
{ STB0899_OFF9_EQ_Q_INIT_COEFF_9, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF9 */
1137
-
{ STB0899_OFFa_EQ_Q_INIT_COEFF_10,STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF10*/
1138
-
{ STB0899_OFF0_EQ_I_OUT_COEFF_0 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT0 */
1139
-
{ STB0899_OFF1_EQ_I_OUT_COEFF_1 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT1 */
1140
-
{ STB0899_OFF2_EQ_I_OUT_COEFF_2 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT2 */
1141
-
{ STB0899_OFF3_EQ_I_OUT_COEFF_3 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT3 */
1142
-
{ STB0899_OFF4_EQ_I_OUT_COEFF_4 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT4 */
1143
-
{ STB0899_OFF5_EQ_I_OUT_COEFF_5 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT5 */
1144
-
{ STB0899_OFF6_EQ_I_OUT_COEFF_6 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT6 */
1145
-
{ STB0899_OFF7_EQ_I_OUT_COEFF_7 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT7 */
1146
-
{ STB0899_OFF8_EQ_I_OUT_COEFF_8 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT8 */
1147
-
{ STB0899_OFF9_EQ_I_OUT_COEFF_9 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT9 */
1148
-
{ STB0899_OFFa_EQ_I_OUT_COEFF_10,STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT10*/
1149
-
{ STB0899_OFF0_EQ_Q_OUT_COEFF_0 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT0 */
1150
-
{ STB0899_OFF1_EQ_Q_OUT_COEFF_1 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT1 */
1151
-
{ STB0899_OFF2_EQ_Q_OUT_COEFF_2 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT2 */
1152
-
{ STB0899_OFF3_EQ_Q_OUT_COEFF_3 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT3 */
1153
-
{ STB0899_OFF4_EQ_Q_OUT_COEFF_4 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT4 */
1154
-
{ STB0899_OFF5_EQ_Q_OUT_COEFF_5 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT5 */
1155
-
{ STB0899_OFF6_EQ_Q_OUT_COEFF_6 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT6 */
1156
-
{ STB0899_OFF7_EQ_Q_OUT_COEFF_7 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT7 */
1157
-
{ STB0899_OFF8_EQ_Q_OUT_COEFF_8 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT8 */
1158
-
{ STB0899_OFF9_EQ_Q_OUT_COEFF_9 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT9 */
1159
-
{ STB0899_OFFa_EQ_Q_OUT_COEFF_10, STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT10*/
1160
-
{ 0xffff , 0xffffffff , 0xffffffff },
1161
-
};
1162
-
1163
978
static const struct stb0899_s1_reg knc1_stb0899_s1_init_3[] = {
1164
979
{ STB0899_DEMOD , 0x00 },
1165
980
{ STB0899_RCOMPC , 0xc9 },
···
1110
1291
{ 0xffff , 0xff },
1111
1292
};
1112
1293
1113
-
static const struct stb0899_s2_reg knc1_stb0899_s2_init_4[] = {
1114
-
{ STB0899_OFF0_BLOCK_LNGTH , STB0899_BASE_BLOCK_LNGTH , 0x00000008 }, /* BLOCKLNGTH */
1115
-
{ STB0899_OFF0_ROW_STR , STB0899_BASE_ROW_STR , 0x000000b4 }, /* ROWSTR */
1116
-
{ STB0899_OFF0_BN_END_ADDR , STB0899_BASE_BN_END_ADDR , 0x000004b5 }, /* BNANDADDR */
1117
-
{ STB0899_OFF0_CN_END_ADDR , STB0899_BASE_CN_END_ADDR , 0x00000b4b }, /* CNANDADDR */
1118
-
{ STB0899_OFF0_INFO_LENGTH , STB0899_BASE_INFO_LENGTH , 0x00000078 }, /* INFOLENGTH */
1119
-
{ STB0899_OFF0_BOT_ADDR , STB0899_BASE_BOT_ADDR , 0x000001e0 }, /* BOT_ADDR */
1120
-
{ STB0899_OFF0_BCH_BLK_LN , STB0899_BASE_BCH_BLK_LN , 0x0000a8c0 }, /* BCHBLKLN */
1121
-
{ STB0899_OFF0_BCH_T , STB0899_BASE_BCH_T , 0x0000000c }, /* BCHT */
1122
-
{ STB0899_OFF0_CNFG_MODE , STB0899_BASE_CNFG_MODE , 0x00000001 }, /* CNFGMODE */
1123
-
{ STB0899_OFF0_LDPC_STAT , STB0899_BASE_LDPC_STAT , 0x0000000d }, /* LDPCSTAT */
1124
-
{ STB0899_OFF0_ITER_SCALE , STB0899_BASE_ITER_SCALE , 0x00000040 }, /* ITERSCALE */
1125
-
{ STB0899_OFF0_INPUT_MODE , STB0899_BASE_INPUT_MODE , 0x00000000 }, /* INPUTMODE */
1126
-
{ STB0899_OFF0_LDPCDECRST , STB0899_BASE_LDPCDECRST , 0x00000000 }, /* LDPCDECRST */
1127
-
{ STB0899_OFF0_CLK_PER_BYTE_RW , STB0899_BASE_CLK_PER_BYTE_RW , 0x00000008 }, /* CLKPERBYTE */
1128
-
{ STB0899_OFF0_BCH_ERRORS , STB0899_BASE_BCH_ERRORS , 0x00000000 }, /* BCHERRORS */
1129
-
{ STB0899_OFF0_LDPC_ERRORS , STB0899_BASE_LDPC_ERRORS , 0x00000000 }, /* LDPCERRORS */
1130
-
{ STB0899_OFF0_BCH_MODE , STB0899_BASE_BCH_MODE , 0x00000000 }, /* BCHMODE */
1131
-
{ STB0899_OFF0_ERR_ACC_PER , STB0899_BASE_ERR_ACC_PER , 0x00000008 }, /* ERRACCPER */
1132
-
{ STB0899_OFF0_BCH_ERR_ACC , STB0899_BASE_BCH_ERR_ACC , 0x00000000 }, /* BCHERRACC */
1133
-
{ STB0899_OFF0_FEC_TP_SEL , STB0899_BASE_FEC_TP_SEL , 0x00000000 }, /* FECTPSEL */
1134
-
{ 0xffff , 0xffffffff , 0xffffffff },
1135
-
};
1136
-
1137
-
static const struct stb0899_s1_reg knc1_stb0899_s1_init_5[] = {
1138
-
{ STB0899_TSTCK , 0x00 },
1139
-
{ STB0899_TSTRES , 0x00 },
1140
-
{ STB0899_TSTOUT , 0x00 },
1141
-
{ STB0899_TSTIN , 0x00 },
1142
-
{ STB0899_TSTSYS , 0x00 },
1143
-
{ STB0899_TSTCHIP , 0x00 },
1144
-
{ STB0899_TSTFREE , 0x00 },
1145
-
{ STB0899_TSTI2C , 0x00 },
1146
-
{ STB0899_BITSPEEDM , 0x00 },
1147
-
{ STB0899_BITSPEEDL , 0x00 },
1148
-
{ STB0899_TBUSBIT , 0x00 },
1149
-
{ STB0899_TSTDIS , 0x00 },
1150
-
{ STB0899_TSTDISRX , 0x00 },
1151
-
{ STB0899_TSTJETON , 0x00 },
1152
-
{ STB0899_TSTDCADJ , 0x00 },
1153
-
{ STB0899_TSTAGC1 , 0x00 },
1154
-
{ STB0899_TSTAGC1N , 0x00 },
1155
-
{ STB0899_TSTPOLYPH , 0x00 },
1156
-
{ STB0899_TSTR , 0x00 },
1157
-
{ STB0899_TSTAGC2 , 0x00 },
1158
-
{ STB0899_TSTCTL1 , 0x00 },
1159
-
{ STB0899_TSTCTL2 , 0x00 },
1160
-
{ STB0899_TSTCTL3 , 0x00 },
1161
-
{ STB0899_TSTDEMAP , 0x00 },
1162
-
{ STB0899_TSTDEMAP2 , 0x00 },
1163
-
{ STB0899_TSTDEMMON , 0x00 },
1164
-
{ STB0899_TSTRATE , 0x00 },
1165
-
{ STB0899_TSTSELOUT , 0x00 },
1166
-
{ STB0899_TSYNC , 0x00 },
1167
-
{ STB0899_TSTERR , 0x00 },
1168
-
{ STB0899_TSTRAM1 , 0x00 },
1169
-
{ STB0899_TSTVSELOUT , 0x00 },
1170
-
{ STB0899_TSTFORCEIN , 0x00 },
1171
-
{ STB0899_TSTRS1 , 0x00 },
1172
-
{ STB0899_TSTRS2 , 0x00 },
1173
-
{ STB0899_TSTRS3 , 0x00 },
1174
-
{ STB0899_GHOSTREG , 0x81 },
1175
-
{ 0xffff , 0xff },
1176
-
};
1177
-
1178
-
#define KNC1_DVBS2_ESNO_AVE 3
1179
-
#define KNC1_DVBS2_ESNO_QUANT 32
1180
-
#define KNC1_DVBS2_AVFRAMES_COARSE 10
1181
-
#define KNC1_DVBS2_AVFRAMES_FINE 20
1182
-
#define KNC1_DVBS2_MISS_THRESHOLD 6
1183
-
#define KNC1_DVBS2_UWP_THRESHOLD_ACQ 1125
1184
-
#define KNC1_DVBS2_UWP_THRESHOLD_TRACK 758
1185
-
#define KNC1_DVBS2_UWP_THRESHOLD_SOF 1350
1186
-
#define KNC1_DVBS2_SOF_SEARCH_TIMEOUT 1664100
1187
-
1188
-
#define KNC1_DVBS2_BTR_NCO_BITS 28
1189
-
#define KNC1_DVBS2_BTR_GAIN_SHIFT_OFFSET 15
1190
-
#define KNC1_DVBS2_CRL_NCO_BITS 30
1191
-
#define KNC1_DVBS2_LDPC_MAX_ITER 70
1192
-
1193
-
static int tda8261_get_frequency(struct dvb_frontend *fe, u32 *frequency)
1194
-
{
1195
-
struct dvb_frontend_ops *frontend_ops = NULL;
1196
-
struct dvb_tuner_ops *tuner_ops = NULL;
1197
-
struct tuner_state t_state;
1198
-
int err = 0;
1199
-
1200
-
if (&fe->ops)
1201
-
frontend_ops = &fe->ops;
1202
-
if (&frontend_ops->tuner_ops)
1203
-
tuner_ops = &frontend_ops->tuner_ops;
1204
-
if (tuner_ops->get_state) {
1205
-
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
1206
-
printk("%s: Invalid parameter\n", __func__);
1207
-
return err;
1208
-
}
1209
-
*frequency = t_state.frequency;
1210
-
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
1211
-
}
1212
-
return 0;
1213
-
}
1214
-
1215
-
static int tda8261_set_frequency(struct dvb_frontend *fe, u32 frequency)
1216
-
{
1217
-
struct dvb_frontend_ops *frontend_ops = NULL;
1218
-
struct dvb_tuner_ops *tuner_ops = NULL;
1219
-
struct tuner_state t_state;
1220
-
int err = 0;
1221
-
1222
-
t_state.frequency = frequency;
1223
-
if (&fe->ops)
1224
-
frontend_ops = &fe->ops;
1225
-
if (&frontend_ops->tuner_ops)
1226
-
tuner_ops = &frontend_ops->tuner_ops;
1227
-
if (tuner_ops->set_state) {
1228
-
if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
1229
-
printk("%s: Invalid parameter\n", __func__);
1230
-
return err;
1231
-
}
1232
-
}
1233
-
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
1234
-
return 0;
1235
-
}
1236
-
1237
-
static int tda8261_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1238
-
{
1239
-
struct dvb_frontend_ops *frontend_ops = &fe->ops;
1240
-
struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
1241
-
struct tuner_state t_state;
1242
-
int err = 0;
1243
-
1244
-
if (&fe->ops)
1245
-
frontend_ops = &fe->ops;
1246
-
if (&frontend_ops->tuner_ops)
1247
-
tuner_ops = &frontend_ops->tuner_ops;
1248
-
if (tuner_ops->get_state) {
1249
-
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
1250
-
printk("%s: Invalid parameter\n", __func__);
1251
-
return err;
1252
-
}
1253
-
*bandwidth = t_state.bandwidth;
1254
-
}
1255
-
printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
1256
-
return 0;
1257
-
}
1258
-
1259
1294
/* STB0899 demodulator config for the KNC1 and clones */
1260
1295
static struct stb0899_config knc1_dvbs2_config = {
1261
1296
.init_dev = knc1_stb0899_s1_init_1,
1262
-
.init_s2_demod = knc1_stb0899_s2_init_2,
1297
+
.init_s2_demod = stb0899_s2_init_2,
1263
1298
.init_s1_demod = knc1_stb0899_s1_init_3,
1264
-
.init_s2_fec = knc1_stb0899_s2_init_4,
1265
-
.init_tst = knc1_stb0899_s1_init_5,
1299
+
.init_s2_fec = stb0899_s2_init_4,
1300
+
.init_tst = stb0899_s1_init_5,
1266
1301
1267
1302
.postproc = NULL,
1268
1303
···
1128
1455
.xtal_freq = 27000000,
1129
1456
.inversion = IQ_SWAP_OFF, /* 1 */
1130
1457
1131
-
.esno_ave = KNC1_DVBS2_ESNO_AVE,
1132
-
.esno_quant = KNC1_DVBS2_ESNO_QUANT,
1133
-
.avframes_coarse = KNC1_DVBS2_AVFRAMES_COARSE,
1134
-
.avframes_fine = KNC1_DVBS2_AVFRAMES_FINE,
1135
-
.miss_threshold = KNC1_DVBS2_MISS_THRESHOLD,
1136
-
.uwp_threshold_acq = KNC1_DVBS2_UWP_THRESHOLD_ACQ,
1137
-
.uwp_threshold_track = KNC1_DVBS2_UWP_THRESHOLD_TRACK,
1138
-
.uwp_threshold_sof = KNC1_DVBS2_UWP_THRESHOLD_SOF,
1139
-
.sof_search_timeout = KNC1_DVBS2_SOF_SEARCH_TIMEOUT,
1458
+
.esno_ave = STB0899_DVBS2_ESNO_AVE,
1459
+
.esno_quant = STB0899_DVBS2_ESNO_QUANT,
1460
+
.avframes_coarse = STB0899_DVBS2_AVFRAMES_COARSE,
1461
+
.avframes_fine = STB0899_DVBS2_AVFRAMES_FINE,
1462
+
.miss_threshold = STB0899_DVBS2_MISS_THRESHOLD,
1463
+
.uwp_threshold_acq = STB0899_DVBS2_UWP_THRESHOLD_ACQ,
1464
+
.uwp_threshold_track = STB0899_DVBS2_UWP_THRESHOLD_TRACK,
1465
+
.uwp_threshold_sof = STB0899_DVBS2_UWP_THRESHOLD_SOF,
1466
+
.sof_search_timeout = STB0899_DVBS2_SOF_SEARCH_TIMEOUT,
1140
1467
1141
-
.btr_nco_bits = KNC1_DVBS2_BTR_NCO_BITS,
1142
-
.btr_gain_shift_offset = KNC1_DVBS2_BTR_GAIN_SHIFT_OFFSET,
1143
-
.crl_nco_bits = KNC1_DVBS2_CRL_NCO_BITS,
1144
-
.ldpc_max_iter = KNC1_DVBS2_LDPC_MAX_ITER,
1468
+
.btr_nco_bits = STB0899_DVBS2_BTR_NCO_BITS,
1469
+
.btr_gain_shift_offset = STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET,
1470
+
.crl_nco_bits = STB0899_DVBS2_CRL_NCO_BITS,
1471
+
.ldpc_max_iter = STB0899_DVBS2_LDPC_MAX_ITER,
1145
1472
1146
1473
.tuner_get_frequency = tda8261_get_frequency,
1147
1474
.tuner_set_frequency = tda8261_set_frequency,
+18
-367
drivers/media/dvb/ttpci/budget-ci.c
+18
-367
drivers/media/dvb/ttpci/budget-ci.c
···
45
45
#include "tda1004x.h"
46
46
#include "stb0899_drv.h"
47
47
#include "stb0899_reg.h"
48
+
#include "stb0899_cfg.h"
48
49
#include "stb6100.h"
50
+
#include "stb6100_cfg.h"
49
51
#include "lnbp21.h"
50
52
#include "bsbe1.h"
51
53
#include "bsru6.h"
···
1166
1164
{ 0xffff , 0xff },
1167
1165
};
1168
1166
1169
-
static const struct stb0899_s2_reg tt3200_stb0899_s2_init_2[] = {
1170
-
1171
-
{ STB0899_OFF0_DMD_STATUS , STB0899_BASE_DMD_STATUS , 0x00000103 }, /* DMDSTATUS */
1172
-
{ STB0899_OFF0_CRL_FREQ , STB0899_BASE_CRL_FREQ , 0x3ed1da56 }, /* CRLFREQ */
1173
-
{ STB0899_OFF0_BTR_FREQ , STB0899_BASE_BTR_FREQ , 0x00004000 }, /* BTRFREQ */
1174
-
{ STB0899_OFF0_IF_AGC_GAIN , STB0899_BASE_IF_AGC_GAIN , 0x00002ade }, /* IFAGCGAIN */
1175
-
{ STB0899_OFF0_BB_AGC_GAIN , STB0899_BASE_BB_AGC_GAIN , 0x000001bc }, /* BBAGCGAIN */
1176
-
{ STB0899_OFF0_DC_OFFSET , STB0899_BASE_DC_OFFSET , 0x00000200 }, /* DCOFFSET */
1177
-
{ STB0899_OFF0_DMD_CNTRL , STB0899_BASE_DMD_CNTRL , 0x0000000f }, /* DMDCNTRL */
1178
-
1179
-
{ STB0899_OFF0_IF_AGC_CNTRL , STB0899_BASE_IF_AGC_CNTRL , 0x03fb4a20 }, /* IFAGCCNTRL */
1180
-
{ STB0899_OFF0_BB_AGC_CNTRL , STB0899_BASE_BB_AGC_CNTRL , 0x00200c97 }, /* BBAGCCNTRL */
1181
-
1182
-
{ STB0899_OFF0_CRL_CNTRL , STB0899_BASE_CRL_CNTRL , 0x00000016 }, /* CRLCNTRL */
1183
-
{ STB0899_OFF0_CRL_PHS_INIT , STB0899_BASE_CRL_PHS_INIT , 0x00000000 }, /* CRLPHSINIT */
1184
-
{ STB0899_OFF0_CRL_FREQ_INIT , STB0899_BASE_CRL_FREQ_INIT , 0x00000000 }, /* CRLFREQINIT */
1185
-
{ STB0899_OFF0_CRL_LOOP_GAIN , STB0899_BASE_CRL_LOOP_GAIN , 0x00000000 }, /* CRLLOOPGAIN */
1186
-
{ STB0899_OFF0_CRL_NOM_FREQ , STB0899_BASE_CRL_NOM_FREQ , 0x3ed097b6 }, /* CRLNOMFREQ */
1187
-
{ STB0899_OFF0_CRL_SWP_RATE , STB0899_BASE_CRL_SWP_RATE , 0x00000000 }, /* CRLSWPRATE */
1188
-
{ STB0899_OFF0_CRL_MAX_SWP , STB0899_BASE_CRL_MAX_SWP , 0x00000000 }, /* CRLMAXSWP */
1189
-
{ STB0899_OFF0_CRL_LK_CNTRL , STB0899_BASE_CRL_LK_CNTRL , 0x0f6cdc01 }, /* CRLLKCNTRL */
1190
-
{ STB0899_OFF0_DECIM_CNTRL , STB0899_BASE_DECIM_CNTRL , 0x00000000 }, /* DECIMCNTRL */
1191
-
{ STB0899_OFF0_BTR_CNTRL , STB0899_BASE_BTR_CNTRL , 0x00003993 }, /* BTRCNTRL */
1192
-
{ STB0899_OFF0_BTR_LOOP_GAIN , STB0899_BASE_BTR_LOOP_GAIN , 0x000d3c6f }, /* BTRLOOPGAIN */
1193
-
{ STB0899_OFF0_BTR_PHS_INIT , STB0899_BASE_BTR_PHS_INIT , 0x00000000 }, /* BTRPHSINIT */
1194
-
{ STB0899_OFF0_BTR_FREQ_INIT , STB0899_BASE_BTR_FREQ_INIT , 0x00000000 }, /* BTRFREQINIT */
1195
-
{ STB0899_OFF0_BTR_NOM_FREQ , STB0899_BASE_BTR_NOM_FREQ , 0x0238e38e }, /* BTRNOMFREQ */
1196
-
{ STB0899_OFF0_BTR_LK_CNTRL , STB0899_BASE_BTR_LK_CNTRL , 0x00000000 }, /* BTRLKCNTRL */
1197
-
{ STB0899_OFF0_DECN_CNTRL , STB0899_BASE_DECN_CNTRL , 0x00000000 }, /* DECNCNTRL */
1198
-
{ STB0899_OFF0_TP_CNTRL , STB0899_BASE_TP_CNTRL , 0x00000000 }, /* TPCNTRL */
1199
-
{ STB0899_OFF0_TP_BUF_STATUS , STB0899_BASE_TP_BUF_STATUS , 0x00000000 }, /* TPBUFSTATUS */
1200
-
{ STB0899_OFF0_DC_ESTIM , STB0899_BASE_DC_ESTIM , 0x00000000 }, /* DCESTIM */
1201
-
{ STB0899_OFF0_FLL_CNTRL , STB0899_BASE_FLL_CNTRL , 0x00000000 }, /* FLLCNTRL */
1202
-
{ STB0899_OFF0_FLL_FREQ_WD , STB0899_BASE_FLL_FREQ_WD , 0x40070000 }, /* FLLFREQWD */
1203
-
{ STB0899_OFF0_ANTI_ALIAS_SEL , STB0899_BASE_ANTI_ALIAS_SEL , 0x00000001 }, /* ANTIALIASSEL */
1204
-
{ STB0899_OFF0_RRC_ALPHA , STB0899_BASE_RRC_ALPHA , 0x00000002 }, /* RRCALPHA */
1205
-
{ STB0899_OFF0_DC_ADAPT_LSHFT , STB0899_BASE_DC_ADAPT_LSHFT , 0x00000000 }, /* DCADAPTISHFT */
1206
-
{ STB0899_OFF0_IMB_OFFSET , STB0899_BASE_IMB_OFFSET , 0x0000fe01 }, /* IMBOFFSET */
1207
-
{ STB0899_OFF0_IMB_ESTIMATE , STB0899_BASE_IMB_ESTIMATE , 0x00000000 }, /* IMBESTIMATE */
1208
-
{ STB0899_OFF0_IMB_CNTRL , STB0899_BASE_IMB_CNTRL , 0x00000001 }, /* IMBCNTRL */
1209
-
{ STB0899_OFF0_IF_AGC_CNTRL2 , STB0899_BASE_IF_AGC_CNTRL2 , 0x00005007 }, /* IFAGCCNTRL2 */
1210
-
{ STB0899_OFF0_DMD_CNTRL2 , STB0899_BASE_DMD_CNTRL2 , 0x00000002 }, /* DMDCNTRL2 */
1211
-
{ STB0899_OFF0_TP_BUFFER , STB0899_BASE_TP_BUFFER , 0x00000000 }, /* TPBUFFER */
1212
-
{ STB0899_OFF0_TP_BUFFER1 , STB0899_BASE_TP_BUFFER1 , 0x00000000 }, /* TPBUFFER1 */
1213
-
{ STB0899_OFF0_TP_BUFFER2 , STB0899_BASE_TP_BUFFER2 , 0x00000000 }, /* TPBUFFER2 */
1214
-
{ STB0899_OFF0_TP_BUFFER3 , STB0899_BASE_TP_BUFFER3 , 0x00000000 }, /* TPBUFFER3 */
1215
-
{ STB0899_OFF0_TP_BUFFER4 , STB0899_BASE_TP_BUFFER4 , 0x00000000 }, /* TPBUFFER4 */
1216
-
{ STB0899_OFF0_TP_BUFFER5 , STB0899_BASE_TP_BUFFER5 , 0x00000000 }, /* TPBUFFER5 */
1217
-
{ STB0899_OFF0_TP_BUFFER6 , STB0899_BASE_TP_BUFFER6 , 0x00000000 }, /* TPBUFFER6 */
1218
-
{ STB0899_OFF0_TP_BUFFER7 , STB0899_BASE_TP_BUFFER7 , 0x00000000 }, /* TPBUFFER7 */
1219
-
{ STB0899_OFF0_TP_BUFFER8 , STB0899_BASE_TP_BUFFER8 , 0x00000000 }, /* TPBUFFER8 */
1220
-
{ STB0899_OFF0_TP_BUFFER9 , STB0899_BASE_TP_BUFFER9 , 0x00000000 }, /* TPBUFFER9 */
1221
-
{ STB0899_OFF0_TP_BUFFER10 , STB0899_BASE_TP_BUFFER10 , 0x00000000 }, /* TPBUFFER10 */
1222
-
{ STB0899_OFF0_TP_BUFFER11 , STB0899_BASE_TP_BUFFER11 , 0x00000000 }, /* TPBUFFER11 */
1223
-
{ STB0899_OFF0_TP_BUFFER12 , STB0899_BASE_TP_BUFFER12 , 0x00000000 }, /* TPBUFFER12 */
1224
-
{ STB0899_OFF0_TP_BUFFER13 , STB0899_BASE_TP_BUFFER13 , 0x00000000 }, /* TPBUFFER13 */
1225
-
{ STB0899_OFF0_TP_BUFFER14 , STB0899_BASE_TP_BUFFER14 , 0x00000000 }, /* TPBUFFER14 */
1226
-
{ STB0899_OFF0_TP_BUFFER15 , STB0899_BASE_TP_BUFFER15 , 0x00000000 }, /* TPBUFFER15 */
1227
-
{ STB0899_OFF0_TP_BUFFER16 , STB0899_BASE_TP_BUFFER16 , 0x0000ff00 }, /* TPBUFFER16 */
1228
-
{ STB0899_OFF0_TP_BUFFER17 , STB0899_BASE_TP_BUFFER17 , 0x00000100 }, /* TPBUFFER17 */
1229
-
{ STB0899_OFF0_TP_BUFFER18 , STB0899_BASE_TP_BUFFER18 , 0x0000fe01 }, /* TPBUFFER18 */
1230
-
{ STB0899_OFF0_TP_BUFFER19 , STB0899_BASE_TP_BUFFER19 , 0x000004fe }, /* TPBUFFER19 */
1231
-
{ STB0899_OFF0_TP_BUFFER20 , STB0899_BASE_TP_BUFFER20 , 0x0000cfe7 }, /* TPBUFFER20 */
1232
-
{ STB0899_OFF0_TP_BUFFER21 , STB0899_BASE_TP_BUFFER21 , 0x0000bec6 }, /* TPBUFFER21 */
1233
-
{ STB0899_OFF0_TP_BUFFER22 , STB0899_BASE_TP_BUFFER22 , 0x0000c2bf }, /* TPBUFFER22 */
1234
-
{ STB0899_OFF0_TP_BUFFER23 , STB0899_BASE_TP_BUFFER23 , 0x0000c1c1 }, /* TPBUFFER23 */
1235
-
{ STB0899_OFF0_TP_BUFFER24 , STB0899_BASE_TP_BUFFER24 , 0x0000c1c1 }, /* TPBUFFER24 */
1236
-
{ STB0899_OFF0_TP_BUFFER25 , STB0899_BASE_TP_BUFFER25 , 0x0000c1c1 }, /* TPBUFFER25 */
1237
-
{ STB0899_OFF0_TP_BUFFER26 , STB0899_BASE_TP_BUFFER26 , 0x0000c1c1 }, /* TPBUFFER26 */
1238
-
{ STB0899_OFF0_TP_BUFFER27 , STB0899_BASE_TP_BUFFER27 , 0x0000c1c0 }, /* TPBUFFER27 */
1239
-
{ STB0899_OFF0_TP_BUFFER28 , STB0899_BASE_TP_BUFFER28 , 0x0000c0c0 }, /* TPBUFFER28 */
1240
-
{ STB0899_OFF0_TP_BUFFER29 , STB0899_BASE_TP_BUFFER29 , 0x0000c1c1 }, /* TPBUFFER29 */
1241
-
{ STB0899_OFF0_TP_BUFFER30 , STB0899_BASE_TP_BUFFER30 , 0x0000c1c1 }, /* TPBUFFER30 */
1242
-
{ STB0899_OFF0_TP_BUFFER31 , STB0899_BASE_TP_BUFFER31 , 0x0000c0c1 }, /* TPBUFFER31 */
1243
-
{ STB0899_OFF0_TP_BUFFER32 , STB0899_BASE_TP_BUFFER32 , 0x0000c0c1 }, /* TPBUFFER32 */
1244
-
{ STB0899_OFF0_TP_BUFFER33 , STB0899_BASE_TP_BUFFER33 , 0x0000c1c1 }, /* TPBUFFER33 */
1245
-
{ STB0899_OFF0_TP_BUFFER34 , STB0899_BASE_TP_BUFFER34 , 0x0000c1c1 }, /* TPBUFFER34 */
1246
-
{ STB0899_OFF0_TP_BUFFER35 , STB0899_BASE_TP_BUFFER35 , 0x0000c0c1 }, /* TPBUFFER35 */
1247
-
{ STB0899_OFF0_TP_BUFFER36 , STB0899_BASE_TP_BUFFER36 , 0x0000c1c1 }, /* TPBUFFER36 */
1248
-
{ STB0899_OFF0_TP_BUFFER37 , STB0899_BASE_TP_BUFFER37 , 0x0000c0c1 }, /* TPBUFFER37 */
1249
-
{ STB0899_OFF0_TP_BUFFER38 , STB0899_BASE_TP_BUFFER38 , 0x0000c1c1 }, /* TPBUFFER38 */
1250
-
{ STB0899_OFF0_TP_BUFFER39 , STB0899_BASE_TP_BUFFER39 , 0x0000c0c0 }, /* TPBUFFER39 */
1251
-
{ STB0899_OFF0_TP_BUFFER40 , STB0899_BASE_TP_BUFFER40 , 0x0000c1c0 }, /* TPBUFFER40 */
1252
-
{ STB0899_OFF0_TP_BUFFER41 , STB0899_BASE_TP_BUFFER41 , 0x0000c1c1 }, /* TPBUFFER41 */
1253
-
{ STB0899_OFF0_TP_BUFFER42 , STB0899_BASE_TP_BUFFER42 , 0x0000c0c0 }, /* TPBUFFER42 */
1254
-
{ STB0899_OFF0_TP_BUFFER43 , STB0899_BASE_TP_BUFFER43 , 0x0000c1c0 }, /* TPBUFFER43 */
1255
-
{ STB0899_OFF0_TP_BUFFER44 , STB0899_BASE_TP_BUFFER44 , 0x0000c0c1 }, /* TPBUFFER44 */
1256
-
{ STB0899_OFF0_TP_BUFFER45 , STB0899_BASE_TP_BUFFER45 , 0x0000c1be }, /* TPBUFFER45 */
1257
-
{ STB0899_OFF0_TP_BUFFER46 , STB0899_BASE_TP_BUFFER46 , 0x0000c1c9 }, /* TPBUFFER46 */
1258
-
{ STB0899_OFF0_TP_BUFFER47 , STB0899_BASE_TP_BUFFER47 , 0x0000c0da }, /* TPBUFFER47 */
1259
-
{ STB0899_OFF0_TP_BUFFER48 , STB0899_BASE_TP_BUFFER48 , 0x0000c0ba }, /* TPBUFFER48 */
1260
-
{ STB0899_OFF0_TP_BUFFER49 , STB0899_BASE_TP_BUFFER49 , 0x0000c1c4 }, /* TPBUFFER49 */
1261
-
{ STB0899_OFF0_TP_BUFFER50 , STB0899_BASE_TP_BUFFER50 , 0x0000c1bf }, /* TPBUFFER50 */
1262
-
{ STB0899_OFF0_TP_BUFFER51 , STB0899_BASE_TP_BUFFER51 , 0x0000c0c1 }, /* TPBUFFER51 */
1263
-
{ STB0899_OFF0_TP_BUFFER52 , STB0899_BASE_TP_BUFFER52 , 0x0000c1c0 }, /* TPBUFFER52 */
1264
-
{ STB0899_OFF0_TP_BUFFER53 , STB0899_BASE_TP_BUFFER53 , 0x0000c0c1 }, /* TPBUFFER53 */
1265
-
{ STB0899_OFF0_TP_BUFFER54 , STB0899_BASE_TP_BUFFER54 , 0x0000c1c1 }, /* TPBUFFER54 */
1266
-
{ STB0899_OFF0_TP_BUFFER55 , STB0899_BASE_TP_BUFFER55 , 0x0000c1c1 }, /* TPBUFFER55 */
1267
-
{ STB0899_OFF0_TP_BUFFER56 , STB0899_BASE_TP_BUFFER56 , 0x0000c1c1 }, /* TPBUFFER56 */
1268
-
{ STB0899_OFF0_TP_BUFFER57 , STB0899_BASE_TP_BUFFER57 , 0x0000c1c1 }, /* TPBUFFER57 */
1269
-
{ STB0899_OFF0_TP_BUFFER58 , STB0899_BASE_TP_BUFFER58 , 0x0000c1c1 }, /* TPBUFFER58 */
1270
-
{ STB0899_OFF0_TP_BUFFER59 , STB0899_BASE_TP_BUFFER59 , 0x0000c1c1 }, /* TPBUFFER59 */
1271
-
{ STB0899_OFF0_TP_BUFFER60 , STB0899_BASE_TP_BUFFER60 , 0x0000c1c1 }, /* TPBUFFER60 */
1272
-
{ STB0899_OFF0_TP_BUFFER61 , STB0899_BASE_TP_BUFFER61 , 0x0000c1c1 }, /* TPBUFFER61 */
1273
-
{ STB0899_OFF0_TP_BUFFER62 , STB0899_BASE_TP_BUFFER62 , 0x0000c1c1 }, /* TPBUFFER62 */
1274
-
{ STB0899_OFF0_TP_BUFFER63 , STB0899_BASE_TP_BUFFER63 , 0x0000c1c0 }, /* TPBUFFER63 */
1275
-
{ STB0899_OFF0_RESET_CNTRL , STB0899_BASE_RESET_CNTRL , 0x00000001 }, /* RESETCNTRL */
1276
-
{ STB0899_OFF0_ACM_ENABLE , STB0899_BASE_ACM_ENABLE , 0x00005654 }, /* ACMENABLE */
1277
-
{ STB0899_OFF0_DESCR_CNTRL , STB0899_BASE_DESCR_CNTRL , 0x00000000 }, /* DESCRCNTRL */
1278
-
{ STB0899_OFF0_CSM_CNTRL1 , STB0899_BASE_CSM_CNTRL1 , 0x00020019 }, /* CSMCNTRL1 */
1279
-
{ STB0899_OFF0_CSM_CNTRL2 , STB0899_BASE_CSM_CNTRL2 , 0x004b3237 }, /* CSMCNTRL2 */
1280
-
{ STB0899_OFF0_CSM_CNTRL3 , STB0899_BASE_CSM_CNTRL3 , 0x0003dd17 }, /* CSMCNTRL3 */
1281
-
{ STB0899_OFF0_CSM_CNTRL4 , STB0899_BASE_CSM_CNTRL4 , 0x00008008 }, /* CSMCNTRL4 */
1282
-
{ STB0899_OFF0_UWP_CNTRL1 , STB0899_BASE_UWP_CNTRL1 , 0x002a3106 }, /* UWPCNTRL1 */
1283
-
{ STB0899_OFF0_UWP_CNTRL2 , STB0899_BASE_UWP_CNTRL2 , 0x0006140a }, /* UWPCNTRL2 */
1284
-
{ STB0899_OFF0_UWP_STAT1 , STB0899_BASE_UWP_STAT1 , 0x00008000 }, /* UWPSTAT1 */
1285
-
{ STB0899_OFF0_UWP_STAT2 , STB0899_BASE_UWP_STAT2 , 0x00000000 }, /* UWPSTAT2 */
1286
-
{ STB0899_OFF0_DMD_STAT2 , STB0899_BASE_DMD_STAT2 , 0x00000000 }, /* DMDSTAT2 */
1287
-
{ STB0899_OFF0_FREQ_ADJ_SCALE , STB0899_BASE_FREQ_ADJ_SCALE , 0x00000471 }, /* FREQADJSCALE */
1288
-
{ STB0899_OFF0_UWP_CNTRL3 , STB0899_BASE_UWP_CNTRL3 , 0x017b0465 }, /* UWPCNTRL3 */
1289
-
{ STB0899_OFF0_SYM_CLK_SEL , STB0899_BASE_SYM_CLK_SEL , 0x00000002 }, /* SYMCLKSEL */
1290
-
{ STB0899_OFF0_SOF_SRCH_TO , STB0899_BASE_SOF_SRCH_TO , 0x00196464 }, /* SOFSRCHTO */
1291
-
{ STB0899_OFF0_ACQ_CNTRL1 , STB0899_BASE_ACQ_CNTRL1 , 0x00000603 }, /* ACQCNTRL1 */
1292
-
{ STB0899_OFF0_ACQ_CNTRL2 , STB0899_BASE_ACQ_CNTRL2 , 0x02046666 }, /* ACQCNTRL2 */
1293
-
{ STB0899_OFF0_ACQ_CNTRL3 , STB0899_BASE_ACQ_CNTRL3 , 0x10046583 }, /* ACQCNTRL3 */
1294
-
{ STB0899_OFF0_FE_SETTLE , STB0899_BASE_FE_SETTLE , 0x00010404 }, /* FESETTLE */
1295
-
{ STB0899_OFF0_AC_DWELL , STB0899_BASE_AC_DWELL , 0x0002aa8a }, /* ACDWELL */
1296
-
{ STB0899_OFF0_ACQUIRE_TRIG , STB0899_BASE_ACQUIRE_TRIG , 0x00000000 }, /* ACQUIRETRIG */
1297
-
{ STB0899_OFF0_LOCK_LOST , STB0899_BASE_LOCK_LOST , 0x00000001 }, /* LOCKLOST */
1298
-
{ STB0899_OFF0_ACQ_STAT1 , STB0899_BASE_ACQ_STAT1 , 0x00000500 }, /* ACQSTAT1 */
1299
-
{ STB0899_OFF0_ACQ_TIMEOUT , STB0899_BASE_ACQ_TIMEOUT , 0x0028a0a0 }, /* ACQTIMEOUT */
1300
-
{ STB0899_OFF0_ACQ_TIME , STB0899_BASE_ACQ_TIME , 0x00000000 }, /* ACQTIME */
1301
-
{ STB0899_OFF0_FINAL_AGC_CNTRL , STB0899_BASE_FINAL_AGC_CNTRL , 0x00800c17 }, /* FINALAGCCNTRL*/
1302
-
{ STB0899_OFF0_FINAL_AGC_GAIN , STB0899_BASE_FINAL_AGC_GAIN , 0x00000000 }, /* FINALAGCCGAIN*/
1303
-
{ STB0899_OFF0_EQUALIZER_INIT , STB0899_BASE_EQUALIZER_INIT , 0x00000000 }, /* EQUILIZERINIT*/
1304
-
{ STB0899_OFF0_EQ_CNTRL , STB0899_BASE_EQ_CNTRL , 0x00054802 }, /* EQCNTL */
1305
-
{ STB0899_OFF0_EQ_I_INIT_COEFF_0, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF0 */
1306
-
{ STB0899_OFF1_EQ_I_INIT_COEFF_1, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF1 */
1307
-
{ STB0899_OFF2_EQ_I_INIT_COEFF_2, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF2 */
1308
-
{ STB0899_OFF3_EQ_I_INIT_COEFF_3, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF3 */
1309
-
{ STB0899_OFF4_EQ_I_INIT_COEFF_4, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF4 */
1310
-
{ STB0899_OFF5_EQ_I_INIT_COEFF_5, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000400 }, /* EQIINITCOEFF5 */
1311
-
{ STB0899_OFF6_EQ_I_INIT_COEFF_6, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF6 */
1312
-
{ STB0899_OFF7_EQ_I_INIT_COEFF_7, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF7 */
1313
-
{ STB0899_OFF8_EQ_I_INIT_COEFF_8, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF8 */
1314
-
{ STB0899_OFF9_EQ_I_INIT_COEFF_9, STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF9 */
1315
-
{ STB0899_OFFa_EQ_I_INIT_COEFF_10,STB0899_BASE_EQ_I_INIT_COEFF_N, 0x00000000 }, /* EQIINITCOEFF10*/
1316
-
{ STB0899_OFF0_EQ_Q_INIT_COEFF_0, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF0 */
1317
-
{ STB0899_OFF1_EQ_Q_INIT_COEFF_1, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF1 */
1318
-
{ STB0899_OFF2_EQ_Q_INIT_COEFF_2, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF2 */
1319
-
{ STB0899_OFF3_EQ_Q_INIT_COEFF_3, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF3 */
1320
-
{ STB0899_OFF4_EQ_Q_INIT_COEFF_4, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF4 */
1321
-
{ STB0899_OFF5_EQ_Q_INIT_COEFF_5, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF5 */
1322
-
{ STB0899_OFF6_EQ_Q_INIT_COEFF_6, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF6 */
1323
-
{ STB0899_OFF7_EQ_Q_INIT_COEFF_7, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF7 */
1324
-
{ STB0899_OFF8_EQ_Q_INIT_COEFF_8, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF8 */
1325
-
{ STB0899_OFF9_EQ_Q_INIT_COEFF_9, STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF9 */
1326
-
{ STB0899_OFFa_EQ_Q_INIT_COEFF_10,STB0899_BASE_EQ_Q_INIT_COEFF_N, 0x00000000 }, /* EQQINITCOEFF10*/
1327
-
{ STB0899_OFF0_EQ_I_OUT_COEFF_0 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT0 */
1328
-
{ STB0899_OFF1_EQ_I_OUT_COEFF_1 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT1 */
1329
-
{ STB0899_OFF2_EQ_I_OUT_COEFF_2 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT2 */
1330
-
{ STB0899_OFF3_EQ_I_OUT_COEFF_3 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT3 */
1331
-
{ STB0899_OFF4_EQ_I_OUT_COEFF_4 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT4 */
1332
-
{ STB0899_OFF5_EQ_I_OUT_COEFF_5 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT5 */
1333
-
{ STB0899_OFF6_EQ_I_OUT_COEFF_6 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT6 */
1334
-
{ STB0899_OFF7_EQ_I_OUT_COEFF_7 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT7 */
1335
-
{ STB0899_OFF8_EQ_I_OUT_COEFF_8 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT8 */
1336
-
{ STB0899_OFF9_EQ_I_OUT_COEFF_9 , STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT9 */
1337
-
{ STB0899_OFFa_EQ_I_OUT_COEFF_10,STB0899_BASE_EQ_I_OUT_COEFF_N , 0x00000000 }, /* EQICOEFFSOUT10*/
1338
-
{ STB0899_OFF0_EQ_Q_OUT_COEFF_0 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT0 */
1339
-
{ STB0899_OFF1_EQ_Q_OUT_COEFF_1 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT1 */
1340
-
{ STB0899_OFF2_EQ_Q_OUT_COEFF_2 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT2 */
1341
-
{ STB0899_OFF3_EQ_Q_OUT_COEFF_3 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT3 */
1342
-
{ STB0899_OFF4_EQ_Q_OUT_COEFF_4 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT4 */
1343
-
{ STB0899_OFF5_EQ_Q_OUT_COEFF_5 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT5 */
1344
-
{ STB0899_OFF6_EQ_Q_OUT_COEFF_6 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT6 */
1345
-
{ STB0899_OFF7_EQ_Q_OUT_COEFF_7 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT7 */
1346
-
{ STB0899_OFF8_EQ_Q_OUT_COEFF_8 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT8 */
1347
-
{ STB0899_OFF9_EQ_Q_OUT_COEFF_9 , STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT9 */
1348
-
{ STB0899_OFFa_EQ_Q_OUT_COEFF_10, STB0899_BASE_EQ_Q_OUT_COEFF_N , 0x00000000 }, /* EQQCOEFFSOUT10*/
1349
-
{ 0xffff , 0xffffffff , 0xffffffff },
1350
-
};
1351
-
1352
1167
static const struct stb0899_s1_reg tt3200_stb0899_s1_init_3[] = {
1353
1168
{ STB0899_DEMOD , 0x00 },
1354
1169
{ STB0899_RCOMPC , 0xc9 },
···
1299
1480
{ 0xffff , 0xff },
1300
1481
};
1301
1482
1302
-
static const struct stb0899_s2_reg tt3200_stb0899_s2_init_4[] = {
1303
-
{ STB0899_OFF0_BLOCK_LNGTH , STB0899_BASE_BLOCK_LNGTH , 0x00000008 }, /* BLOCKLNGTH */
1304
-
{ STB0899_OFF0_ROW_STR , STB0899_BASE_ROW_STR , 0x000000b4 }, /* ROWSTR */
1305
-
{ STB0899_OFF0_BN_END_ADDR , STB0899_BASE_BN_END_ADDR , 0x000004b5 }, /* BNANDADDR */
1306
-
{ STB0899_OFF0_CN_END_ADDR , STB0899_BASE_CN_END_ADDR , 0x00000b4b }, /* CNANDADDR */
1307
-
{ STB0899_OFF0_INFO_LENGTH , STB0899_BASE_INFO_LENGTH , 0x00000078 }, /* INFOLENGTH */
1308
-
{ STB0899_OFF0_BOT_ADDR , STB0899_BASE_BOT_ADDR , 0x000001e0 }, /* BOT_ADDR */
1309
-
{ STB0899_OFF0_BCH_BLK_LN , STB0899_BASE_BCH_BLK_LN , 0x0000a8c0 }, /* BCHBLKLN */
1310
-
{ STB0899_OFF0_BCH_T , STB0899_BASE_BCH_T , 0x0000000c }, /* BCHT */
1311
-
{ STB0899_OFF0_CNFG_MODE , STB0899_BASE_CNFG_MODE , 0x00000001 }, /* CNFGMODE */
1312
-
{ STB0899_OFF0_LDPC_STAT , STB0899_BASE_LDPC_STAT , 0x0000000d }, /* LDPCSTAT */
1313
-
{ STB0899_OFF0_ITER_SCALE , STB0899_BASE_ITER_SCALE , 0x00000040 }, /* ITERSCALE */
1314
-
{ STB0899_OFF0_INPUT_MODE , STB0899_BASE_INPUT_MODE , 0x00000000 }, /* INPUTMODE */
1315
-
{ STB0899_OFF0_LDPCDECRST , STB0899_BASE_LDPCDECRST , 0x00000000 }, /* LDPCDECRST */
1316
-
{ STB0899_OFF0_CLK_PER_BYTE_RW , STB0899_BASE_CLK_PER_BYTE_RW , 0x00000008 }, /* CLKPERBYTE */
1317
-
{ STB0899_OFF0_BCH_ERRORS , STB0899_BASE_BCH_ERRORS , 0x00000000 }, /* BCHERRORS */
1318
-
{ STB0899_OFF0_LDPC_ERRORS , STB0899_BASE_LDPC_ERRORS , 0x00000000 }, /* LDPCERRORS */
1319
-
{ STB0899_OFF0_BCH_MODE , STB0899_BASE_BCH_MODE , 0x00000000 }, /* BCHMODE */
1320
-
{ STB0899_OFF0_ERR_ACC_PER , STB0899_BASE_ERR_ACC_PER , 0x00000008 }, /* ERRACCPER */
1321
-
{ STB0899_OFF0_BCH_ERR_ACC , STB0899_BASE_BCH_ERR_ACC , 0x00000000 }, /* BCHERRACC */
1322
-
{ STB0899_OFF0_FEC_TP_SEL , STB0899_BASE_FEC_TP_SEL , 0x00000000 }, /* FECTPSEL */
1323
-
{ 0xffff , 0xffffffff , 0xffffffff },
1324
-
};
1325
-
1326
-
static const struct stb0899_s1_reg tt3200_stb0899_s1_init_5[] = {
1327
-
{ STB0899_TSTCK , 0x00 },
1328
-
{ STB0899_TSTRES , 0x00 },
1329
-
{ STB0899_TSTOUT , 0x00 },
1330
-
{ STB0899_TSTIN , 0x00 },
1331
-
{ STB0899_TSTSYS , 0x00 },
1332
-
{ STB0899_TSTCHIP , 0x00 },
1333
-
{ STB0899_TSTFREE , 0x00 },
1334
-
{ STB0899_TSTI2C , 0x00 },
1335
-
{ STB0899_BITSPEEDM , 0x00 },
1336
-
{ STB0899_BITSPEEDL , 0x00 },
1337
-
{ STB0899_TBUSBIT , 0x00 },
1338
-
{ STB0899_TSTDIS , 0x00 },
1339
-
{ STB0899_TSTDISRX , 0x00 },
1340
-
{ STB0899_TSTJETON , 0x00 },
1341
-
{ STB0899_TSTDCADJ , 0x00 },
1342
-
{ STB0899_TSTAGC1 , 0x00 },
1343
-
{ STB0899_TSTAGC1N , 0x00 },
1344
-
{ STB0899_TSTPOLYPH , 0x00 },
1345
-
{ STB0899_TSTR , 0x00 },
1346
-
{ STB0899_TSTAGC2 , 0x00 },
1347
-
{ STB0899_TSTCTL1 , 0x00 },
1348
-
{ STB0899_TSTCTL2 , 0x00 },
1349
-
{ STB0899_TSTCTL3 , 0x00 },
1350
-
{ STB0899_TSTDEMAP , 0x00 },
1351
-
{ STB0899_TSTDEMAP2 , 0x00 },
1352
-
{ STB0899_TSTDEMMON , 0x00 },
1353
-
{ STB0899_TSTRATE , 0x00 },
1354
-
{ STB0899_TSTSELOUT , 0x00 },
1355
-
{ STB0899_TSYNC , 0x00 },
1356
-
{ STB0899_TSTERR , 0x00 },
1357
-
{ STB0899_TSTRAM1 , 0x00 },
1358
-
{ STB0899_TSTVSELOUT , 0x00 },
1359
-
{ STB0899_TSTFORCEIN , 0x00 },
1360
-
{ STB0899_TSTRS1 , 0x00 },
1361
-
{ STB0899_TSTRS2 , 0x00 },
1362
-
{ STB0899_TSTRS3 , 0x00 },
1363
-
{ STB0899_GHOSTREG , 0x81 },
1364
-
{ 0xffff , 0xff },
1365
-
};
1366
-
1367
-
#define TT3200_DVBS2_ESNO_AVE 3
1368
-
#define TT3200_DVBS2_ESNO_QUANT 32
1369
-
#define TT3200_DVBS2_AVFRAMES_COARSE 10
1370
-
#define TT3200_DVBS2_AVFRAMES_FINE 20
1371
-
#define TT3200_DVBS2_MISS_THRESHOLD 6
1372
-
#define TT3200_DVBS2_UWP_THRESHOLD_ACQ 1125
1373
-
#define TT3200_DVBS2_UWP_THRESHOLD_TRACK 758
1374
-
#define TT3200_DVBS2_UWP_THRESHOLD_SOF 1350
1375
-
#define TT3200_DVBS2_SOF_SEARCH_TIMEOUT 1664100
1376
-
1377
-
#define TT3200_DVBS2_BTR_NCO_BITS 28
1378
-
#define TT3200_DVBS2_BTR_GAIN_SHIFT_OFFSET 15
1379
-
#define TT3200_DVBS2_CRL_NCO_BITS 30
1380
-
#define TT3200_DVBS2_LDPC_MAX_ITER 70
1381
-
1382
-
static int stb6100_get_frequency(struct dvb_frontend *fe, u32 *frequency)
1383
-
{
1384
-
struct dvb_frontend_ops *frontend_ops = NULL;
1385
-
struct dvb_tuner_ops *tuner_ops = NULL;
1386
-
struct tuner_state t_state;
1387
-
int err = 0;
1388
-
1389
-
if (&fe->ops)
1390
-
frontend_ops = &fe->ops;
1391
-
if (&frontend_ops->tuner_ops)
1392
-
tuner_ops = &frontend_ops->tuner_ops;
1393
-
if (tuner_ops->get_state) {
1394
-
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
1395
-
printk("%s: Invalid parameter\n", __func__);
1396
-
return err;
1397
-
}
1398
-
*frequency = t_state.frequency;
1399
-
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
1400
-
}
1401
-
return 0;
1402
-
}
1403
-
1404
-
static int stb6100_set_frequency(struct dvb_frontend *fe, u32 frequency)
1405
-
{
1406
-
struct dvb_frontend_ops *frontend_ops = NULL;
1407
-
struct dvb_tuner_ops *tuner_ops = NULL;
1408
-
struct tuner_state t_state;
1409
-
int err = 0;
1410
-
1411
-
t_state.frequency = frequency;
1412
-
if (&fe->ops)
1413
-
frontend_ops = &fe->ops;
1414
-
if (&frontend_ops->tuner_ops)
1415
-
tuner_ops = &frontend_ops->tuner_ops;
1416
-
if (tuner_ops->set_state) {
1417
-
if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_FREQUENCY, &t_state)) < 0) {
1418
-
printk("%s: Invalid parameter\n", __func__);
1419
-
return err;
1420
-
}
1421
-
}
1422
-
printk("%s: Frequency=%d\n", __func__, t_state.frequency);
1423
-
return 0;
1424
-
}
1425
-
1426
-
static int stb6100_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
1427
-
{
1428
-
struct dvb_frontend_ops *frontend_ops = &fe->ops;
1429
-
struct dvb_tuner_ops *tuner_ops = &frontend_ops->tuner_ops;
1430
-
struct tuner_state t_state;
1431
-
int err = 0;
1432
-
1433
-
if (&fe->ops)
1434
-
frontend_ops = &fe->ops;
1435
-
if (&frontend_ops->tuner_ops)
1436
-
tuner_ops = &frontend_ops->tuner_ops;
1437
-
if (tuner_ops->get_state) {
1438
-
if ((err = tuner_ops->get_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
1439
-
printk("%s: Invalid parameter\n", __func__);
1440
-
return err;
1441
-
}
1442
-
*bandwidth = t_state.bandwidth;
1443
-
}
1444
-
printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
1445
-
return 0;
1446
-
}
1447
-
1448
-
static int stb6100_set_bandwidth(struct dvb_frontend *fe, u32 bandwidth)
1449
-
{
1450
-
struct dvb_frontend_ops *frontend_ops = NULL;
1451
-
struct dvb_tuner_ops *tuner_ops = NULL;
1452
-
struct tuner_state t_state;
1453
-
int err = 0;
1454
-
1455
-
t_state.bandwidth = bandwidth;
1456
-
if (&fe->ops)
1457
-
frontend_ops = &fe->ops;
1458
-
if (&frontend_ops->tuner_ops)
1459
-
tuner_ops = &frontend_ops->tuner_ops;
1460
-
if (tuner_ops->set_state) {
1461
-
if ((err = tuner_ops->set_state(fe, DVBFE_TUNER_BANDWIDTH, &t_state)) < 0) {
1462
-
printk("%s: Invalid parameter\n", __func__);
1463
-
return err;
1464
-
}
1465
-
}
1466
-
printk("%s: Bandwidth=%d\n", __func__, t_state.bandwidth);
1467
-
return 0;
1468
-
}
1469
-
1470
1483
static struct stb0899_config tt3200_config = {
1471
1484
.init_dev = tt3200_stb0899_s1_init_1,
1472
-
.init_s2_demod = tt3200_stb0899_s2_init_2,
1485
+
.init_s2_demod = stb0899_s2_init_2,
1473
1486
.init_s1_demod = tt3200_stb0899_s1_init_3,
1474
-
.init_s2_fec = tt3200_stb0899_s2_init_4,
1475
-
.init_tst = tt3200_stb0899_s1_init_5,
1487
+
.init_s2_fec = stb0899_s2_init_4,
1488
+
.init_tst = stb0899_s1_init_5,
1476
1489
1477
1490
.postproc = NULL,
1478
1491
···
1313
1662
.xtal_freq = 27000000,
1314
1663
.inversion = IQ_SWAP_ON, /* 1 */
1315
1664
1316
-
.esno_ave = TT3200_DVBS2_ESNO_AVE,
1317
-
.esno_quant = TT3200_DVBS2_ESNO_QUANT,
1318
-
.avframes_coarse = TT3200_DVBS2_AVFRAMES_COARSE,
1319
-
.avframes_fine = TT3200_DVBS2_AVFRAMES_FINE,
1320
-
.miss_threshold = TT3200_DVBS2_MISS_THRESHOLD,
1321
-
.uwp_threshold_acq = TT3200_DVBS2_UWP_THRESHOLD_ACQ,
1322
-
.uwp_threshold_track = TT3200_DVBS2_UWP_THRESHOLD_TRACK,
1323
-
.uwp_threshold_sof = TT3200_DVBS2_UWP_THRESHOLD_SOF,
1324
-
.sof_search_timeout = TT3200_DVBS2_SOF_SEARCH_TIMEOUT,
1665
+
.esno_ave = STB0899_DVBS2_ESNO_AVE,
1666
+
.esno_quant = STB0899_DVBS2_ESNO_QUANT,
1667
+
.avframes_coarse = STB0899_DVBS2_AVFRAMES_COARSE,
1668
+
.avframes_fine = STB0899_DVBS2_AVFRAMES_FINE,
1669
+
.miss_threshold = STB0899_DVBS2_MISS_THRESHOLD,
1670
+
.uwp_threshold_acq = STB0899_DVBS2_UWP_THRESHOLD_ACQ,
1671
+
.uwp_threshold_track = STB0899_DVBS2_UWP_THRESHOLD_TRACK,
1672
+
.uwp_threshold_sof = STB0899_DVBS2_UWP_THRESHOLD_SOF,
1673
+
.sof_search_timeout = STB0899_DVBS2_SOF_SEARCH_TIMEOUT,
1325
1674
1326
-
.btr_nco_bits = TT3200_DVBS2_BTR_NCO_BITS,
1327
-
.btr_gain_shift_offset = TT3200_DVBS2_BTR_GAIN_SHIFT_OFFSET,
1328
-
.crl_nco_bits = TT3200_DVBS2_CRL_NCO_BITS,
1329
-
.ldpc_max_iter = TT3200_DVBS2_LDPC_MAX_ITER,
1675
+
.btr_nco_bits = STB0899_DVBS2_BTR_NCO_BITS,
1676
+
.btr_gain_shift_offset = STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET,
1677
+
.crl_nco_bits = STB0899_DVBS2_CRL_NCO_BITS,
1678
+
.ldpc_max_iter = STB0899_DVBS2_LDPC_MAX_ITER,
1330
1679
1331
1680
.tuner_get_frequency = stb6100_get_frequency,
1332
1681
.tuner_set_frequency = stb6100_set_frequency,