Merge branch 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* 'sh-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
sh: clkfwk: Fix up checkpatch warnings.
sh: make some needlessly global sh7724 clocks static
sh: add clk_round_parent() to optimize parent clock rate
sh: Simplify phys_addr_mask()/PTE_PHYS_MASK for 29/32-bit.
sh: nommu: Support building without an uncached mapping.
sh: nommu: use 32-bit phys mode.
sh: mach-se: Fix up SE7206 no ioport build.
sh: intc: Update for single IRQ reservation helper.
sh: clkfwk: Fix up rate rounding error handling.
sh: mach-se: Rip out superfluous 7751 PIO routines.
sh: mach-se: Rip out superfluous 770x PIO routines.
sh: mach-edosk7705: Kill off machtype, consolidate board def.
sh: mach-edosk7705: update for this century, kill off PIO trapping.
sh: mach-se: Rip out superfluous 7206 PIO routines.
sh: mach-systemh: Kill off dead board.
sh: mach-snapgear: Kill off machtype, consolidate board def.
sh: mach-snapgear: Rip out superfluous PIO routines.
sh: mach-microdev: SuperIO-relative ioport mapping.

+259 -1482
+1
arch/sh/Kconfig
··· 193 config CPU_SH2A 194 bool 195 select CPU_SH2 196 197 config CPU_SH3 198 bool
··· 193 config CPU_SH2A 194 bool 195 select CPU_SH2 196 + select UNCACHED_MAPPING 197 198 config CPU_SH3 199 bool
-3
arch/sh/Makefile
··· 133 machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx 134 machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast 135 machdir-$(CONFIG_SH_SH03) += mach-sh03 136 - machdir-$(CONFIG_SH_SECUREEDGE5410) += mach-snapgear 137 machdir-$(CONFIG_SH_RTS7751R2D) += mach-r2d 138 - machdir-$(CONFIG_SH_7751_SYSTEMH) += mach-systemh 139 - machdir-$(CONFIG_SH_EDOSK7705) += mach-edosk7705 140 machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 141 machdir-$(CONFIG_SH_MIGOR) += mach-migor 142 machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
··· 133 machdir-$(CONFIG_SH_HP6XX) += mach-hp6xx 134 machdir-$(CONFIG_SH_DREAMCAST) += mach-dreamcast 135 machdir-$(CONFIG_SH_SH03) += mach-sh03 136 machdir-$(CONFIG_SH_RTS7751R2D) += mach-r2d 137 machdir-$(CONFIG_SH_HIGHLANDER) += mach-highlander 138 machdir-$(CONFIG_SH_MIGOR) += mach-migor 139 machdir-$(CONFIG_SH_AP325RXA) += mach-ap325rxa
-7
arch/sh/boards/Kconfig
··· 81 Select 7343 SolutionEngine if configuring for a Hitachi 82 SH7343 (SH-Mobile 3AS) evaluation board. 83 84 - config SH_7751_SYSTEMH 85 - bool "SystemH7751R" 86 - depends on CPU_SUBTYPE_SH7751R 87 - help 88 - Select SystemH if you are configuring for a Renesas SystemH 89 - 7751R evaluation board. 90 - 91 config SH_HP6XX 92 bool "HP6XX" 93 select SYS_SUPPORTS_APM_EMULATION
··· 81 Select 7343 SolutionEngine if configuring for a Hitachi 82 SH7343 (SH-Mobile 3AS) evaluation board. 83 84 config SH_HP6XX 85 bool "HP6XX" 86 select SYS_SUPPORTS_APM_EMULATION
+2
arch/sh/boards/Makefile
··· 2 # Specific board support, not covered by a mach group. 3 # 4 obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 5 obj-$(CONFIG_SH_SH2007) += board-sh2007.o 6 obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 7 obj-$(CONFIG_SH_URQUELL) += board-urquell.o 8 obj-$(CONFIG_SH_SHMIN) += board-shmin.o 9 obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 10 obj-$(CONFIG_SH_ESPT) += board-espt.o 11 obj-$(CONFIG_SH_POLARIS) += board-polaris.o
··· 2 # Specific board support, not covered by a mach group. 3 # 4 obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 5 + obj-$(CONFIG_SH_SECUREEDGE5410) += board-secureedge5410.o 6 obj-$(CONFIG_SH_SH2007) += board-sh2007.o 7 obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 8 obj-$(CONFIG_SH_URQUELL) += board-urquell.o 9 obj-$(CONFIG_SH_SHMIN) += board-shmin.o 10 + obj-$(CONFIG_SH_EDOSK7705) += board-edosk7705.o 11 obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 12 obj-$(CONFIG_SH_ESPT) += board-espt.o 13 obj-$(CONFIG_SH_POLARIS) += board-polaris.o
+78
arch/sh/boards/board-edosk7705.c
···
··· 1 + /* 2 + * arch/sh/boards/renesas/edosk7705/setup.c 3 + * 4 + * Copyright (C) 2000 Kazumoto Kojima 5 + * 6 + * Hitachi SolutionEngine Support. 7 + * 8 + * Modified for edosk7705 development 9 + * board by S. Dunn, 2003. 10 + */ 11 + #include <linux/init.h> 12 + #include <linux/irq.h> 13 + #include <linux/platform_device.h> 14 + #include <linux/interrupt.h> 15 + #include <linux/smc91x.h> 16 + #include <asm/machvec.h> 17 + #include <asm/sizes.h> 18 + 19 + #define SMC_IOBASE 0xA2000000 20 + #define SMC_IO_OFFSET 0x300 21 + #define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET) 22 + 23 + #define ETHERNET_IRQ 0x09 24 + 25 + static void __init sh_edosk7705_init_irq(void) 26 + { 27 + make_imask_irq(ETHERNET_IRQ); 28 + } 29 + 30 + /* eth initialization functions */ 31 + static struct smc91x_platdata smc91x_info = { 32 + .flags = SMC91X_USE_16BIT | SMC91X_IO_SHIFT_1 | IORESOURCE_IRQ_LOWLEVEL, 33 + }; 34 + 35 + static struct resource smc91x_res[] = { 36 + [0] = { 37 + .start = SMC_IOADDR, 38 + .end = SMC_IOADDR + SZ_32 - 1, 39 + .flags = IORESOURCE_MEM, 40 + }, 41 + [1] = { 42 + .start = ETHERNET_IRQ, 43 + .end = ETHERNET_IRQ, 44 + .flags = IORESOURCE_IRQ , 45 + } 46 + }; 47 + 48 + static struct platform_device smc91x_dev = { 49 + .name = "smc91x", 50 + .id = -1, 51 + .num_resources = ARRAY_SIZE(smc91x_res), 52 + .resource = smc91x_res, 53 + 54 + .dev = { 55 + .platform_data = &smc91x_info, 56 + }, 57 + }; 58 + 59 + /* platform init code */ 60 + static struct platform_device *edosk7705_devices[] __initdata = { 61 + &smc91x_dev, 62 + }; 63 + 64 + static int __init init_edosk7705_devices(void) 65 + { 66 + return platform_add_devices(edosk7705_devices, 67 + ARRAY_SIZE(edosk7705_devices)); 68 + } 69 + __initcall(init_edosk7705_devices); 70 + 71 + /* 72 + * The Machine Vector 73 + */ 74 + static struct sh_machine_vector mv_edosk7705 __initmv = { 75 + .mv_name = "EDOSK7705", 76 + .mv_nr_irqs = 80, 77 + .mv_init_irq = sh_edosk7705_init_irq, 78 + };
-5
arch/sh/boards/mach-edosk7705/Makefile
··· 1 - # 2 - # Makefile for the EDOSK7705 specific parts of the kernel 3 - # 4 - 5 - obj-y := setup.o io.o
···
-71
arch/sh/boards/mach-edosk7705/io.c
··· 1 - /* 2 - * arch/sh/boards/renesas/edosk7705/io.c 3 - * 4 - * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 5 - * Based largely on io_se.c. 6 - * 7 - * I/O routines for Hitachi EDOSK7705 board. 8 - * 9 - */ 10 - 11 - #include <linux/kernel.h> 12 - #include <linux/types.h> 13 - #include <linux/io.h> 14 - #include <mach/edosk7705.h> 15 - #include <asm/addrspace.h> 16 - 17 - #define SMC_IOADDR 0xA2000000 18 - 19 - /* Map the Ethernet addresses as if it is at 0x300 - 0x320 */ 20 - static unsigned long sh_edosk7705_isa_port2addr(unsigned long port) 21 - { 22 - /* 23 - * SMC91C96 registers are 4 byte aligned rather than the 24 - * usual 2 byte! 25 - */ 26 - if (port >= 0x300 && port < 0x320) 27 - return SMC_IOADDR + ((port - 0x300) * 2); 28 - 29 - maybebadio(port); 30 - return port; 31 - } 32 - 33 - /* Trying to read / write bytes on odd-byte boundaries to the Ethernet 34 - * registers causes problems. So we bit-shift the value and read / write 35 - * in 2 byte chunks. Setting the low byte to 0 does not cause problems 36 - * now as odd byte writes are only made on the bit mask / interrupt 37 - * register. This may not be the case in future Mar-2003 SJD 38 - */ 39 - unsigned char sh_edosk7705_inb(unsigned long port) 40 - { 41 - if (port >= 0x300 && port < 0x320 && port & 0x01) 42 - return __raw_readw(port - 1) >> 8; 43 - 44 - return __raw_readb(sh_edosk7705_isa_port2addr(port)); 45 - } 46 - 47 - void sh_edosk7705_outb(unsigned char value, unsigned long port) 48 - { 49 - if (port >= 0x300 && port < 0x320 && port & 0x01) { 50 - __raw_writew(((unsigned short)value << 8), port - 1); 51 - return; 52 - } 53 - 54 - __raw_writeb(value, sh_edosk7705_isa_port2addr(port)); 55 - } 56 - 57 - void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count) 58 - { 59 - unsigned char *p = addr; 60 - 61 - while (count--) 62 - *p++ = sh_edosk7705_inb(port); 63 - } 64 - 65 - void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count) 66 - { 67 - unsigned char *p = (unsigned char *)addr; 68 - 69 - while (count--) 70 - sh_edosk7705_outb(*p++, port); 71 - }
···
-36
arch/sh/boards/mach-edosk7705/setup.c
··· 1 - /* 2 - * arch/sh/boards/renesas/edosk7705/setup.c 3 - * 4 - * Copyright (C) 2000 Kazumoto Kojima 5 - * 6 - * Hitachi SolutionEngine Support. 7 - * 8 - * Modified for edosk7705 development 9 - * board by S. Dunn, 2003. 10 - */ 11 - #include <linux/init.h> 12 - #include <linux/irq.h> 13 - #include <asm/machvec.h> 14 - #include <mach/edosk7705.h> 15 - 16 - static void __init sh_edosk7705_init_irq(void) 17 - { 18 - /* This is the Ethernet interrupt */ 19 - make_imask_irq(0x09); 20 - } 21 - 22 - /* 23 - * The Machine Vector 24 - */ 25 - static struct sh_machine_vector mv_edosk7705 __initmv = { 26 - .mv_name = "EDOSK7705", 27 - .mv_nr_irqs = 80, 28 - 29 - .mv_inb = sh_edosk7705_inb, 30 - .mv_outb = sh_edosk7705_outb, 31 - 32 - .mv_insb = sh_edosk7705_insb, 33 - .mv_outsb = sh_edosk7705_outsb, 34 - 35 - .mv_init_irq = sh_edosk7705_init_irq, 36 - };
···
+2 -244
arch/sh/boards/mach-microdev/io.c
··· 54 /* 55 * map I/O ports to memory-mapped addresses 56 */ 57 - static unsigned long microdev_isa_port2addr(unsigned long offset) 58 { 59 unsigned long result; 60 ··· 72 * Configuration Registers 73 */ 74 result = IO_SUPERIO_PHYS + (offset << 1); 75 - #if 0 76 - } else if (offset == KBD_DATA_REG || offset == KBD_CNTL_REG || 77 - offset == KBD_STATUS_REG) { 78 - /* 79 - * SMSC FDC37C93xAPM SuperIO chip 80 - * 81 - * PS/2 Keyboard + Mouse (ports 0x60 and 0x64). 82 - */ 83 - result = IO_SUPERIO_PHYS + (offset << 1); 84 - #endif 85 } else if (((offset >= IO_IDE1_BASE) && 86 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || 87 (offset == IO_IDE1_MISC)) { ··· 121 result = PVR; 122 } 123 124 - return result; 125 - } 126 - 127 - #define PORT2ADDR(x) (microdev_isa_port2addr(x)) 128 - 129 - static inline void delay(void) 130 - { 131 - #if defined(CONFIG_PCI) 132 - /* System board present, just make a dummy SRAM access. (CS0 will be 133 - mapped to PCI memory, probably good to avoid it.) */ 134 - __raw_readw(0xa6800000); 135 - #else 136 - /* CS0 will be mapped to flash, ROM etc so safe to access it. */ 137 - __raw_readw(0xa0000000); 138 - #endif 139 - } 140 - 141 - unsigned char microdev_inb(unsigned long port) 142 - { 143 - #ifdef CONFIG_PCI 144 - if (port >= PCIBIOS_MIN_IO) 145 - return microdev_pci_inb(port); 146 - #endif 147 - return *(volatile unsigned char*)PORT2ADDR(port); 148 - } 149 - 150 - unsigned short microdev_inw(unsigned long port) 151 - { 152 - #ifdef CONFIG_PCI 153 - if (port >= PCIBIOS_MIN_IO) 154 - return microdev_pci_inw(port); 155 - #endif 156 - return *(volatile unsigned short*)PORT2ADDR(port); 157 - } 158 - 159 - unsigned int microdev_inl(unsigned long port) 160 - { 161 - #ifdef CONFIG_PCI 162 - if (port >= PCIBIOS_MIN_IO) 163 - return microdev_pci_inl(port); 164 - #endif 165 - return *(volatile unsigned int*)PORT2ADDR(port); 166 - } 167 - 168 - void microdev_outw(unsigned short b, unsigned long port) 169 - { 170 - #ifdef CONFIG_PCI 171 - if (port >= PCIBIOS_MIN_IO) { 172 - microdev_pci_outw(b, port); 173 - return; 174 - } 175 - #endif 176 - *(volatile unsigned short*)PORT2ADDR(port) = b; 177 - } 178 - 179 - void microdev_outb(unsigned char b, unsigned long port) 180 - { 181 - #ifdef CONFIG_PCI 182 - if (port >= PCIBIOS_MIN_IO) { 183 - microdev_pci_outb(b, port); 184 - return; 185 - } 186 - #endif 187 - 188 - /* 189 - * There is a board feature with the current SH4-202 MicroDev in 190 - * that the 2 byte enables (nBE0 and nBE1) are tied together (and 191 - * to the Chip Select Line (Ethernet_CS)). Due to this connectivity, 192 - * it is not possible to safely perform 8-bit writes to the 193 - * Ethernet registers, as 16-bits will be consumed from the Data 194 - * lines (corrupting the other byte). Hence, this function is 195 - * written to implement 16-bit read/modify/write for all byte-wide 196 - * accesses. 197 - * 198 - * Note: there is no problem with byte READS (even or odd). 199 - * 200 - * Sean McGoogan - 16th June 2003. 201 - */ 202 - if ((port >= IO_LAN91C111_BASE) && 203 - (port < IO_LAN91C111_BASE + IO_LAN91C111_EXTENT)) { 204 - /* 205 - * Then are trying to perform a byte-write to the 206 - * LAN91C111. This needs special care. 207 - */ 208 - if (port % 2 == 1) { /* is the port odd ? */ 209 - /* unset bit-0, i.e. make even */ 210 - const unsigned long evenPort = port-1; 211 - unsigned short word; 212 - 213 - /* 214 - * do a 16-bit read/write to write to 'port', 215 - * preserving even byte. 216 - * 217 - * Even addresses are bits 0-7 218 - * Odd addresses are bits 8-15 219 - */ 220 - word = microdev_inw(evenPort); 221 - word = (word & 0xffu) | (b << 8); 222 - microdev_outw(word, evenPort); 223 - } else { 224 - /* else, we are trying to do an even byte write */ 225 - unsigned short word; 226 - 227 - /* 228 - * do a 16-bit read/write to write to 'port', 229 - * preserving odd byte. 230 - * 231 - * Even addresses are bits 0-7 232 - * Odd addresses are bits 8-15 233 - */ 234 - word = microdev_inw(port); 235 - word = (word & 0xff00u) | (b); 236 - microdev_outw(word, port); 237 - } 238 - } else { 239 - *(volatile unsigned char*)PORT2ADDR(port) = b; 240 - } 241 - } 242 - 243 - void microdev_outl(unsigned int b, unsigned long port) 244 - { 245 - #ifdef CONFIG_PCI 246 - if (port >= PCIBIOS_MIN_IO) { 247 - microdev_pci_outl(b, port); 248 - return; 249 - } 250 - #endif 251 - *(volatile unsigned int*)PORT2ADDR(port) = b; 252 - } 253 - 254 - unsigned char microdev_inb_p(unsigned long port) 255 - { 256 - unsigned char v = microdev_inb(port); 257 - delay(); 258 - return v; 259 - } 260 - 261 - unsigned short microdev_inw_p(unsigned long port) 262 - { 263 - unsigned short v = microdev_inw(port); 264 - delay(); 265 - return v; 266 - } 267 - 268 - unsigned int microdev_inl_p(unsigned long port) 269 - { 270 - unsigned int v = microdev_inl(port); 271 - delay(); 272 - return v; 273 - } 274 - 275 - void microdev_outb_p(unsigned char b, unsigned long port) 276 - { 277 - microdev_outb(b, port); 278 - delay(); 279 - } 280 - 281 - void microdev_outw_p(unsigned short b, unsigned long port) 282 - { 283 - microdev_outw(b, port); 284 - delay(); 285 - } 286 - 287 - void microdev_outl_p(unsigned int b, unsigned long port) 288 - { 289 - microdev_outl(b, port); 290 - delay(); 291 - } 292 - 293 - void microdev_insb(unsigned long port, void *buffer, unsigned long count) 294 - { 295 - volatile unsigned char *port_addr; 296 - unsigned char *buf = buffer; 297 - 298 - port_addr = (volatile unsigned char *)PORT2ADDR(port); 299 - 300 - while (count--) 301 - *buf++ = *port_addr; 302 - } 303 - 304 - void microdev_insw(unsigned long port, void *buffer, unsigned long count) 305 - { 306 - volatile unsigned short *port_addr; 307 - unsigned short *buf = buffer; 308 - 309 - port_addr = (volatile unsigned short *)PORT2ADDR(port); 310 - 311 - while (count--) 312 - *buf++ = *port_addr; 313 - } 314 - 315 - void microdev_insl(unsigned long port, void *buffer, unsigned long count) 316 - { 317 - volatile unsigned long *port_addr; 318 - unsigned int *buf = buffer; 319 - 320 - port_addr = (volatile unsigned long *)PORT2ADDR(port); 321 - 322 - while (count--) 323 - *buf++ = *port_addr; 324 - } 325 - 326 - void microdev_outsb(unsigned long port, const void *buffer, unsigned long count) 327 - { 328 - volatile unsigned char *port_addr; 329 - const unsigned char *buf = buffer; 330 - 331 - port_addr = (volatile unsigned char *)PORT2ADDR(port); 332 - 333 - while (count--) 334 - *port_addr = *buf++; 335 - } 336 - 337 - void microdev_outsw(unsigned long port, const void *buffer, unsigned long count) 338 - { 339 - volatile unsigned short *port_addr; 340 - const unsigned short *buf = buffer; 341 - 342 - port_addr = (volatile unsigned short *)PORT2ADDR(port); 343 - 344 - while (count--) 345 - *port_addr = *buf++; 346 - } 347 - 348 - void microdev_outsl(unsigned long port, const void *buffer, unsigned long count) 349 - { 350 - volatile unsigned long *port_addr; 351 - const unsigned int *buf = buffer; 352 - 353 - port_addr = (volatile unsigned long *)PORT2ADDR(port); 354 - 355 - while (count--) 356 - *port_addr = *buf++; 357 }
··· 54 /* 55 * map I/O ports to memory-mapped addresses 56 */ 57 + void __iomem *microdev_ioport_map(unsigned long offset, unsigned int len) 58 { 59 unsigned long result; 60 ··· 72 * Configuration Registers 73 */ 74 result = IO_SUPERIO_PHYS + (offset << 1); 75 } else if (((offset >= IO_IDE1_BASE) && 76 (offset < IO_IDE1_BASE + IO_IDE_EXTENT)) || 77 (offset == IO_IDE1_MISC)) { ··· 131 result = PVR; 132 } 133 134 + return (void __iomem *)result; 135 }
+1 -22
arch/sh/boards/mach-microdev/setup.c
··· 195 static struct sh_machine_vector mv_sh4202_microdev __initmv = { 196 .mv_name = "SH4-202 MicroDev", 197 .mv_nr_irqs = 72, 198 - 199 - .mv_inb = microdev_inb, 200 - .mv_inw = microdev_inw, 201 - .mv_inl = microdev_inl, 202 - .mv_outb = microdev_outb, 203 - .mv_outw = microdev_outw, 204 - .mv_outl = microdev_outl, 205 - 206 - .mv_inb_p = microdev_inb_p, 207 - .mv_inw_p = microdev_inw_p, 208 - .mv_inl_p = microdev_inl_p, 209 - .mv_outb_p = microdev_outb_p, 210 - .mv_outw_p = microdev_outw_p, 211 - .mv_outl_p = microdev_outl_p, 212 - 213 - .mv_insb = microdev_insb, 214 - .mv_insw = microdev_insw, 215 - .mv_insl = microdev_insl, 216 - .mv_outsb = microdev_outsb, 217 - .mv_outsw = microdev_outsw, 218 - .mv_outsl = microdev_outsl, 219 - 220 .mv_init_irq = init_microdev_irq, 221 };
··· 195 static struct sh_machine_vector mv_sh4202_microdev __initmv = { 196 .mv_name = "SH4-202 MicroDev", 197 .mv_nr_irqs = 72, 198 + .mv_ioport_map = microdev_ioport_map, 199 .mv_init_irq = init_microdev_irq, 200 };
+1 -1
arch/sh/boards/mach-se/7206/Makefile
··· 2 # Makefile for the 7206 SolutionEngine specific parts of the kernel 3 # 4 5 - obj-y := setup.o io.o irq.o
··· 2 # Makefile for the 7206 SolutionEngine specific parts of the kernel 3 # 4 5 + obj-y := setup.o irq.o
-104
arch/sh/boards/mach-se/7206/io.c
··· 1 - /* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $ 2 - * 3 - * linux/arch/sh/boards/se/7206/io.c 4 - * 5 - * Copyright (C) 2006 Yoshinori Sato 6 - * 7 - * I/O routine for Hitachi 7206 SolutionEngine. 8 - * 9 - */ 10 - 11 - #include <linux/kernel.h> 12 - #include <linux/types.h> 13 - #include <asm/io.h> 14 - #include <mach-se/mach/se7206.h> 15 - 16 - 17 - static inline void delay(void) 18 - { 19 - __raw_readw(0x20000000); /* P2 ROM Area */ 20 - } 21 - 22 - /* MS7750 requires special versions of in*, out* routines, since 23 - PC-like io ports are located at upper half byte of 16-bit word which 24 - can be accessed only with 16-bit wide. */ 25 - 26 - static inline volatile __u16 * 27 - port2adr(unsigned int port) 28 - { 29 - if (port >= 0x2000 && port < 0x2020) 30 - return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 31 - else if (port >= 0x300 && port < 0x310) 32 - return (volatile __u16 *) (PA_SMSC + (port - 0x300)); 33 - 34 - return (volatile __u16 *)port; 35 - } 36 - 37 - unsigned char se7206_inb(unsigned long port) 38 - { 39 - return (*port2adr(port)) & 0xff; 40 - } 41 - 42 - unsigned char se7206_inb_p(unsigned long port) 43 - { 44 - unsigned long v; 45 - 46 - v = (*port2adr(port)) & 0xff; 47 - delay(); 48 - return v; 49 - } 50 - 51 - unsigned short se7206_inw(unsigned long port) 52 - { 53 - return *port2adr(port); 54 - } 55 - 56 - void se7206_outb(unsigned char value, unsigned long port) 57 - { 58 - *(port2adr(port)) = value; 59 - } 60 - 61 - void se7206_outb_p(unsigned char value, unsigned long port) 62 - { 63 - *(port2adr(port)) = value; 64 - delay(); 65 - } 66 - 67 - void se7206_outw(unsigned short value, unsigned long port) 68 - { 69 - *port2adr(port) = value; 70 - } 71 - 72 - void se7206_insb(unsigned long port, void *addr, unsigned long count) 73 - { 74 - volatile __u16 *p = port2adr(port); 75 - __u8 *ap = addr; 76 - 77 - while (count--) 78 - *ap++ = *p; 79 - } 80 - 81 - void se7206_insw(unsigned long port, void *addr, unsigned long count) 82 - { 83 - volatile __u16 *p = port2adr(port); 84 - __u16 *ap = addr; 85 - while (count--) 86 - *ap++ = *p; 87 - } 88 - 89 - void se7206_outsb(unsigned long port, const void *addr, unsigned long count) 90 - { 91 - volatile __u16 *p = port2adr(port); 92 - const __u8 *ap = addr; 93 - 94 - while (count--) 95 - *p = *ap++; 96 - } 97 - 98 - void se7206_outsw(unsigned long port, const void *addr, unsigned long count) 99 - { 100 - volatile __u16 *p = port2adr(port); 101 - const __u16 *ap = addr; 102 - while (count--) 103 - *p = *ap++; 104 - }
···
+3 -1
arch/sh/boards/mach-se/7206/irq.c
··· 139 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 140 make_se7206_irq(IRQ1_IRQ); /* ATA */ 141 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 142 - __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 143 144 /* FPGA System register setup*/ 145 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ 146 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ 147 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 148 __raw_writew(0x0001,INTSEL); 149 }
··· 139 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 140 make_se7206_irq(IRQ1_IRQ); /* ATA */ 141 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 142 + 143 + __raw_writew(__raw_readw(INTC_ICR1) | 0x000b, INTC_ICR); /* ICR1 */ 144 145 /* FPGA System register setup*/ 146 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */ 147 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */ 148 + 149 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 150 __raw_writew(0x0001,INTSEL); 151 }
-15
arch/sh/boards/mach-se/7206/setup.c
··· 86 static struct sh_machine_vector mv_se __initmv = { 87 .mv_name = "SolutionEngine", 88 .mv_nr_irqs = 256, 89 - .mv_inb = se7206_inb, 90 - .mv_inw = se7206_inw, 91 - .mv_outb = se7206_outb, 92 - .mv_outw = se7206_outw, 93 - 94 - .mv_inb_p = se7206_inb_p, 95 - .mv_inw_p = se7206_inw, 96 - .mv_outb_p = se7206_outb_p, 97 - .mv_outw_p = se7206_outw, 98 - 99 - .mv_insb = se7206_insb, 100 - .mv_insw = se7206_insw, 101 - .mv_outsb = se7206_outsb, 102 - .mv_outsw = se7206_outsw, 103 - 104 .mv_init_irq = init_se7206_IRQ, 105 };
··· 86 static struct sh_machine_vector mv_se __initmv = { 87 .mv_name = "SolutionEngine", 88 .mv_nr_irqs = 256, 89 .mv_init_irq = init_se7206_IRQ, 90 };
+1 -1
arch/sh/boards/mach-se/770x/Makefile
··· 2 # Makefile for the 770x SolutionEngine specific parts of the kernel 3 # 4 5 - obj-y := setup.o io.o irq.o
··· 2 # Makefile for the 770x SolutionEngine specific parts of the kernel 3 # 4 5 + obj-y := setup.o irq.o
-156
arch/sh/boards/mach-se/770x/io.c
··· 1 - /* 2 - * Copyright (C) 2000 Kazumoto Kojima 3 - * 4 - * I/O routine for Hitachi SolutionEngine. 5 - */ 6 - #include <linux/kernel.h> 7 - #include <linux/types.h> 8 - #include <asm/io.h> 9 - #include <mach-se/mach/se.h> 10 - 11 - /* MS7750 requires special versions of in*, out* routines, since 12 - PC-like io ports are located at upper half byte of 16-bit word which 13 - can be accessed only with 16-bit wide. */ 14 - 15 - static inline volatile __u16 * 16 - port2adr(unsigned int port) 17 - { 18 - if (port & 0xff000000) 19 - return ( volatile __u16 *) port; 20 - if (port >= 0x2000) 21 - return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 22 - else if (port >= 0x1000) 23 - return (volatile __u16 *) (PA_83902 + (port << 1)); 24 - else 25 - return (volatile __u16 *) (PA_SUPERIO + (port << 1)); 26 - } 27 - 28 - static inline int 29 - shifted_port(unsigned long port) 30 - { 31 - /* For IDE registers, value is not shifted */ 32 - if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 33 - return 0; 34 - else 35 - return 1; 36 - } 37 - 38 - unsigned char se_inb(unsigned long port) 39 - { 40 - if (shifted_port(port)) 41 - return (*port2adr(port) >> 8); 42 - else 43 - return (*port2adr(port))&0xff; 44 - } 45 - 46 - unsigned char se_inb_p(unsigned long port) 47 - { 48 - unsigned long v; 49 - 50 - if (shifted_port(port)) 51 - v = (*port2adr(port) >> 8); 52 - else 53 - v = (*port2adr(port))&0xff; 54 - ctrl_delay(); 55 - return v; 56 - } 57 - 58 - unsigned short se_inw(unsigned long port) 59 - { 60 - if (port >= 0x2000) 61 - return *port2adr(port); 62 - else 63 - maybebadio(port); 64 - return 0; 65 - } 66 - 67 - unsigned int se_inl(unsigned long port) 68 - { 69 - maybebadio(port); 70 - return 0; 71 - } 72 - 73 - void se_outb(unsigned char value, unsigned long port) 74 - { 75 - if (shifted_port(port)) 76 - *(port2adr(port)) = value << 8; 77 - else 78 - *(port2adr(port)) = value; 79 - } 80 - 81 - void se_outb_p(unsigned char value, unsigned long port) 82 - { 83 - if (shifted_port(port)) 84 - *(port2adr(port)) = value << 8; 85 - else 86 - *(port2adr(port)) = value; 87 - ctrl_delay(); 88 - } 89 - 90 - void se_outw(unsigned short value, unsigned long port) 91 - { 92 - if (port >= 0x2000) 93 - *port2adr(port) = value; 94 - else 95 - maybebadio(port); 96 - } 97 - 98 - void se_outl(unsigned int value, unsigned long port) 99 - { 100 - maybebadio(port); 101 - } 102 - 103 - void se_insb(unsigned long port, void *addr, unsigned long count) 104 - { 105 - volatile __u16 *p = port2adr(port); 106 - __u8 *ap = addr; 107 - 108 - if (shifted_port(port)) { 109 - while (count--) 110 - *ap++ = *p >> 8; 111 - } else { 112 - while (count--) 113 - *ap++ = *p; 114 - } 115 - } 116 - 117 - void se_insw(unsigned long port, void *addr, unsigned long count) 118 - { 119 - volatile __u16 *p = port2adr(port); 120 - __u16 *ap = addr; 121 - while (count--) 122 - *ap++ = *p; 123 - } 124 - 125 - void se_insl(unsigned long port, void *addr, unsigned long count) 126 - { 127 - maybebadio(port); 128 - } 129 - 130 - void se_outsb(unsigned long port, const void *addr, unsigned long count) 131 - { 132 - volatile __u16 *p = port2adr(port); 133 - const __u8 *ap = addr; 134 - 135 - if (shifted_port(port)) { 136 - while (count--) 137 - *p = *ap++ << 8; 138 - } else { 139 - while (count--) 140 - *p = *ap++; 141 - } 142 - } 143 - 144 - void se_outsw(unsigned long port, const void *addr, unsigned long count) 145 - { 146 - volatile __u16 *p = port2adr(port); 147 - const __u16 *ap = addr; 148 - 149 - while (count--) 150 - *p = *ap++; 151 - } 152 - 153 - void se_outsl(unsigned long port, const void *addr, unsigned long count) 154 - { 155 - maybebadio(port); 156 - }
···
-22
arch/sh/boards/mach-se/770x/setup.c
··· 195 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 196 .mv_nr_irqs = 104, 197 #endif 198 - 199 - .mv_inb = se_inb, 200 - .mv_inw = se_inw, 201 - .mv_inl = se_inl, 202 - .mv_outb = se_outb, 203 - .mv_outw = se_outw, 204 - .mv_outl = se_outl, 205 - 206 - .mv_inb_p = se_inb_p, 207 - .mv_inw_p = se_inw, 208 - .mv_inl_p = se_inl, 209 - .mv_outb_p = se_outb_p, 210 - .mv_outw_p = se_outw, 211 - .mv_outl_p = se_outl, 212 - 213 - .mv_insb = se_insb, 214 - .mv_insw = se_insw, 215 - .mv_insl = se_insl, 216 - .mv_outsb = se_outsb, 217 - .mv_outsw = se_outsw, 218 - .mv_outsl = se_outsl, 219 - 220 .mv_init_irq = init_se_IRQ, 221 };
··· 195 #elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712) 196 .mv_nr_irqs = 104, 197 #endif 198 .mv_init_irq = init_se_IRQ, 199 };
+1 -1
arch/sh/boards/mach-se/7751/Makefile
··· 2 # Makefile for the 7751 SolutionEngine specific parts of the kernel 3 # 4 5 - obj-y := setup.o io.o irq.o
··· 2 # Makefile for the 7751 SolutionEngine specific parts of the kernel 3 # 4 5 + obj-y := setup.o irq.o
-119
arch/sh/boards/mach-se/7751/io.c
··· 1 - /* 2 - * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 3 - * Based largely on io_se.c. 4 - * 5 - * I/O routine for Hitachi 7751 SolutionEngine. 6 - * 7 - * Initial version only to support LAN access; some 8 - * placeholder code from io_se.c left in with the 9 - * expectation of later SuperIO and PCMCIA access. 10 - */ 11 - #include <linux/kernel.h> 12 - #include <linux/types.h> 13 - #include <linux/pci.h> 14 - #include <asm/io.h> 15 - #include <mach-se/mach/se7751.h> 16 - #include <asm/addrspace.h> 17 - 18 - static inline volatile u16 *port2adr(unsigned int port) 19 - { 20 - if (port >= 0x2000) 21 - return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 22 - maybebadio((unsigned long)port); 23 - return (volatile __u16*)port; 24 - } 25 - 26 - /* 27 - * General outline: remap really low stuff [eventually] to SuperIO, 28 - * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 29 - * is mapped through the PCI IO window. Stuff with high bits (PXSEG) 30 - * should be way beyond the window, and is used w/o translation for 31 - * compatibility. 32 - */ 33 - unsigned char sh7751se_inb(unsigned long port) 34 - { 35 - if (PXSEG(port)) 36 - return *(volatile unsigned char *)port; 37 - else 38 - return (*port2adr(port)) & 0xff; 39 - } 40 - 41 - unsigned char sh7751se_inb_p(unsigned long port) 42 - { 43 - unsigned char v; 44 - 45 - if (PXSEG(port)) 46 - v = *(volatile unsigned char *)port; 47 - else 48 - v = (*port2adr(port)) & 0xff; 49 - ctrl_delay(); 50 - return v; 51 - } 52 - 53 - unsigned short sh7751se_inw(unsigned long port) 54 - { 55 - if (PXSEG(port)) 56 - return *(volatile unsigned short *)port; 57 - else if (port >= 0x2000) 58 - return *port2adr(port); 59 - else 60 - maybebadio(port); 61 - return 0; 62 - } 63 - 64 - unsigned int sh7751se_inl(unsigned long port) 65 - { 66 - if (PXSEG(port)) 67 - return *(volatile unsigned long *)port; 68 - else if (port >= 0x2000) 69 - return *port2adr(port); 70 - else 71 - maybebadio(port); 72 - return 0; 73 - } 74 - 75 - void sh7751se_outb(unsigned char value, unsigned long port) 76 - { 77 - 78 - if (PXSEG(port)) 79 - *(volatile unsigned char *)port = value; 80 - else 81 - *(port2adr(port)) = value; 82 - } 83 - 84 - void sh7751se_outb_p(unsigned char value, unsigned long port) 85 - { 86 - if (PXSEG(port)) 87 - *(volatile unsigned char *)port = value; 88 - else 89 - *(port2adr(port)) = value; 90 - ctrl_delay(); 91 - } 92 - 93 - void sh7751se_outw(unsigned short value, unsigned long port) 94 - { 95 - if (PXSEG(port)) 96 - *(volatile unsigned short *)port = value; 97 - else if (port >= 0x2000) 98 - *port2adr(port) = value; 99 - else 100 - maybebadio(port); 101 - } 102 - 103 - void sh7751se_outl(unsigned int value, unsigned long port) 104 - { 105 - if (PXSEG(port)) 106 - *(volatile unsigned long *)port = value; 107 - else 108 - maybebadio(port); 109 - } 110 - 111 - void sh7751se_insl(unsigned long port, void *addr, unsigned long count) 112 - { 113 - maybebadio(port); 114 - } 115 - 116 - void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count) 117 - { 118 - maybebadio(port); 119 - }
···
-18
arch/sh/boards/mach-se/7751/setup.c
··· 56 static struct sh_machine_vector mv_7751se __initmv = { 57 .mv_name = "7751 SolutionEngine", 58 .mv_nr_irqs = 72, 59 - 60 - .mv_inb = sh7751se_inb, 61 - .mv_inw = sh7751se_inw, 62 - .mv_inl = sh7751se_inl, 63 - .mv_outb = sh7751se_outb, 64 - .mv_outw = sh7751se_outw, 65 - .mv_outl = sh7751se_outl, 66 - 67 - .mv_inb_p = sh7751se_inb_p, 68 - .mv_inw_p = sh7751se_inw, 69 - .mv_inl_p = sh7751se_inl, 70 - .mv_outb_p = sh7751se_outb_p, 71 - .mv_outw_p = sh7751se_outw, 72 - .mv_outl_p = sh7751se_outl, 73 - 74 - .mv_insl = sh7751se_insl, 75 - .mv_outsl = sh7751se_outsl, 76 - 77 .mv_init_irq = init_7751se_IRQ, 78 };
··· 56 static struct sh_machine_vector mv_7751se __initmv = { 57 .mv_name = "7751 SolutionEngine", 58 .mv_nr_irqs = 72, 59 .mv_init_irq = init_7751se_IRQ, 60 };
-5
arch/sh/boards/mach-snapgear/Makefile
··· 1 - # 2 - # Makefile for the SnapGear specific parts of the kernel 3 - # 4 - 5 - obj-y := setup.o io.o
···
-121
arch/sh/boards/mach-snapgear/io.c
··· 1 - /* 2 - * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 3 - * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 4 - * Based largely on io_se.c. 5 - * 6 - * I/O routine for Hitachi 7751 SolutionEngine. 7 - * 8 - * Initial version only to support LAN access; some 9 - * placeholder code from io_se.c left in with the 10 - * expectation of later SuperIO and PCMCIA access. 11 - */ 12 - #include <linux/kernel.h> 13 - #include <linux/types.h> 14 - #include <linux/pci.h> 15 - #include <asm/io.h> 16 - #include <asm/addrspace.h> 17 - 18 - #ifdef CONFIG_SH_SECUREEDGE5410 19 - unsigned short secureedge5410_ioport; 20 - #endif 21 - 22 - static inline volatile __u16 *port2adr(unsigned int port) 23 - { 24 - maybebadio((unsigned long)port); 25 - return (volatile __u16*)port; 26 - } 27 - 28 - /* 29 - * General outline: remap really low stuff [eventually] to SuperIO, 30 - * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 31 - * is mapped through the PCI IO window. Stuff with high bits (PXSEG) 32 - * should be way beyond the window, and is used w/o translation for 33 - * compatibility. 34 - */ 35 - unsigned char snapgear_inb(unsigned long port) 36 - { 37 - if (PXSEG(port)) 38 - return *(volatile unsigned char *)port; 39 - else 40 - return (*port2adr(port)) & 0xff; 41 - } 42 - 43 - unsigned char snapgear_inb_p(unsigned long port) 44 - { 45 - unsigned char v; 46 - 47 - if (PXSEG(port)) 48 - v = *(volatile unsigned char *)port; 49 - else 50 - v = (*port2adr(port))&0xff; 51 - ctrl_delay(); 52 - return v; 53 - } 54 - 55 - unsigned short snapgear_inw(unsigned long port) 56 - { 57 - if (PXSEG(port)) 58 - return *(volatile unsigned short *)port; 59 - else if (port >= 0x2000) 60 - return *port2adr(port); 61 - else 62 - maybebadio(port); 63 - return 0; 64 - } 65 - 66 - unsigned int snapgear_inl(unsigned long port) 67 - { 68 - if (PXSEG(port)) 69 - return *(volatile unsigned long *)port; 70 - else if (port >= 0x2000) 71 - return *port2adr(port); 72 - else 73 - maybebadio(port); 74 - return 0; 75 - } 76 - 77 - void snapgear_outb(unsigned char value, unsigned long port) 78 - { 79 - 80 - if (PXSEG(port)) 81 - *(volatile unsigned char *)port = value; 82 - else 83 - *(port2adr(port)) = value; 84 - } 85 - 86 - void snapgear_outb_p(unsigned char value, unsigned long port) 87 - { 88 - if (PXSEG(port)) 89 - *(volatile unsigned char *)port = value; 90 - else 91 - *(port2adr(port)) = value; 92 - ctrl_delay(); 93 - } 94 - 95 - void snapgear_outw(unsigned short value, unsigned long port) 96 - { 97 - if (PXSEG(port)) 98 - *(volatile unsigned short *)port = value; 99 - else if (port >= 0x2000) 100 - *port2adr(port) = value; 101 - else 102 - maybebadio(port); 103 - } 104 - 105 - void snapgear_outl(unsigned int value, unsigned long port) 106 - { 107 - if (PXSEG(port)) 108 - *(volatile unsigned long *)port = value; 109 - else 110 - maybebadio(port); 111 - } 112 - 113 - void snapgear_insl(unsigned long port, void *addr, unsigned long count) 114 - { 115 - maybebadio(port); 116 - } 117 - 118 - void snapgear_outsl(unsigned long port, const void *addr, unsigned long count) 119 - { 120 - maybebadio(port); 121 - }
···
+11 -27
arch/sh/boards/mach-snapgear/setup.c arch/sh/boards/board-secureedge5410.c
··· 1 /* 2 - * linux/arch/sh/boards/snapgear/setup.c 3 - * 4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 5 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> 6 * ··· 17 #include <linux/module.h> 18 #include <linux/sched.h> 19 #include <asm/machvec.h> 20 - #include <mach/snapgear.h> 21 #include <asm/irq.h> 22 #include <asm/io.h> 23 #include <cpu/timer.h> 24 25 /* 26 * EraseConfig handling functions 27 */ 28 - 29 static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 30 { 31 - (void)__raw_readb(0xb8000000); /* dummy read */ 32 33 printk("SnapGear: erase switch interrupt!\n"); 34 ··· 38 39 static int __init eraseconfig_init(void) 40 { 41 printk("SnapGear: EraseConfig init\n"); 42 /* Setup "EraseConfig" switch on external IRQ 0 */ 43 - if (request_irq(IRL0_IRQ, eraseconfig_interrupt, IRQF_DISABLED, 44 "Erase Config", NULL)) 45 printk("SnapGear: failed to register IRQ%d for Reset witch\n", 46 - IRL0_IRQ); 47 else 48 printk("SnapGear: registered EraseConfig switch on IRQ%d\n", 49 - IRL0_IRQ); 50 - return(0); 51 } 52 - 53 module_init(eraseconfig_init); 54 55 - /****************************************************************************/ 56 /* 57 * Initialize IRQ setting 58 * ··· 62 * IRL2 = eth1 63 * IRL3 = crypto 64 */ 65 - 66 static void __init init_snapgear_IRQ(void) 67 { 68 printk("Setup SnapGear IRQ/IPR ...\n"); ··· 75 static struct sh_machine_vector mv_snapgear __initmv = { 76 .mv_name = "SnapGear SecureEdge5410", 77 .mv_nr_irqs = 72, 78 - 79 - .mv_inb = snapgear_inb, 80 - .mv_inw = snapgear_inw, 81 - .mv_inl = snapgear_inl, 82 - .mv_outb = snapgear_outb, 83 - .mv_outw = snapgear_outw, 84 - .mv_outl = snapgear_outl, 85 - 86 - .mv_inb_p = snapgear_inb_p, 87 - .mv_inw_p = snapgear_inw, 88 - .mv_inl_p = snapgear_inl, 89 - .mv_outb_p = snapgear_outb_p, 90 - .mv_outw_p = snapgear_outw, 91 - .mv_outl_p = snapgear_outl, 92 - 93 .mv_init_irq = init_snapgear_IRQ, 94 };
··· 1 /* 2 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 3 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> 4 * ··· 19 #include <linux/module.h> 20 #include <linux/sched.h> 21 #include <asm/machvec.h> 22 + #include <mach/secureedge5410.h> 23 #include <asm/irq.h> 24 #include <asm/io.h> 25 #include <cpu/timer.h> 26 27 + unsigned short secureedge5410_ioport; 28 + 29 /* 30 * EraseConfig handling functions 31 */ 32 static irqreturn_t eraseconfig_interrupt(int irq, void *dev_id) 33 { 34 + ctrl_delay(); /* dummy read */ 35 36 printk("SnapGear: erase switch interrupt!\n"); 37 ··· 39 40 static int __init eraseconfig_init(void) 41 { 42 + unsigned int irq = evt2irq(0x240); 43 + 44 printk("SnapGear: EraseConfig init\n"); 45 + 46 /* Setup "EraseConfig" switch on external IRQ 0 */ 47 + if (request_irq(irq, eraseconfig_interrupt, IRQF_DISABLED, 48 "Erase Config", NULL)) 49 printk("SnapGear: failed to register IRQ%d for Reset witch\n", 50 + irq); 51 else 52 printk("SnapGear: registered EraseConfig switch on IRQ%d\n", 53 + irq); 54 + return 0; 55 } 56 module_init(eraseconfig_init); 57 58 /* 59 * Initialize IRQ setting 60 * ··· 62 * IRL2 = eth1 63 * IRL3 = crypto 64 */ 65 static void __init init_snapgear_IRQ(void) 66 { 67 printk("Setup SnapGear IRQ/IPR ...\n"); ··· 76 static struct sh_machine_vector mv_snapgear __initmv = { 77 .mv_name = "SnapGear SecureEdge5410", 78 .mv_nr_irqs = 72, 79 .mv_init_irq = init_snapgear_IRQ, 80 };
-13
arch/sh/boards/mach-systemh/Makefile
··· 1 - # 2 - # Makefile for the SystemH specific parts of the kernel 3 - # 4 - 5 - obj-y := setup.o irq.o io.o 6 - 7 - # XXX: This wants to be consolidated in arch/sh/drivers/pci, and more 8 - # importantly, with the generic sh7751_pcic_init() code. For now, we'll 9 - # just abuse the hell out of kbuild, because we can.. 10 - 11 - obj-$(CONFIG_PCI) += pci.o 12 - pci-y := ../../se/7751/pci.o 13 -
···
-158
arch/sh/boards/mach-systemh/io.c
··· 1 - /* 2 - * linux/arch/sh/boards/renesas/systemh/io.c 3 - * 4 - * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 5 - * Based largely on io_se.c. 6 - * 7 - * I/O routine for Hitachi 7751 Systemh. 8 - */ 9 - #include <linux/kernel.h> 10 - #include <linux/types.h> 11 - #include <linux/pci.h> 12 - #include <mach/systemh7751.h> 13 - #include <asm/addrspace.h> 14 - #include <asm/io.h> 15 - 16 - #define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area 17 - of smc lan chip*/ 18 - static inline volatile __u16 * 19 - port2adr(unsigned int port) 20 - { 21 - if (port >= 0x2000) 22 - return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 23 - maybebadio((unsigned long)port); 24 - return (volatile __u16*)port; 25 - } 26 - 27 - /* 28 - * General outline: remap really low stuff [eventually] to SuperIO, 29 - * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 30 - * is mapped through the PCI IO window. Stuff with high bits (PXSEG) 31 - * should be way beyond the window, and is used w/o translation for 32 - * compatibility. 33 - */ 34 - unsigned char sh7751systemh_inb(unsigned long port) 35 - { 36 - if (PXSEG(port)) 37 - return *(volatile unsigned char *)port; 38 - else if (port <= 0x3F1) 39 - return *(volatile unsigned char *)ETHER_IOMAP(port); 40 - else 41 - return (*port2adr(port))&0xff; 42 - } 43 - 44 - unsigned char sh7751systemh_inb_p(unsigned long port) 45 - { 46 - unsigned char v; 47 - 48 - if (PXSEG(port)) 49 - v = *(volatile unsigned char *)port; 50 - else if (port <= 0x3F1) 51 - v = *(volatile unsigned char *)ETHER_IOMAP(port); 52 - else 53 - v = (*port2adr(port))&0xff; 54 - ctrl_delay(); 55 - return v; 56 - } 57 - 58 - unsigned short sh7751systemh_inw(unsigned long port) 59 - { 60 - if (PXSEG(port)) 61 - return *(volatile unsigned short *)port; 62 - else if (port >= 0x2000) 63 - return *port2adr(port); 64 - else if (port <= 0x3F1) 65 - return *(volatile unsigned int *)ETHER_IOMAP(port); 66 - else 67 - maybebadio(port); 68 - return 0; 69 - } 70 - 71 - unsigned int sh7751systemh_inl(unsigned long port) 72 - { 73 - if (PXSEG(port)) 74 - return *(volatile unsigned long *)port; 75 - else if (port >= 0x2000) 76 - return *port2adr(port); 77 - else if (port <= 0x3F1) 78 - return *(volatile unsigned int *)ETHER_IOMAP(port); 79 - else 80 - maybebadio(port); 81 - return 0; 82 - } 83 - 84 - void sh7751systemh_outb(unsigned char value, unsigned long port) 85 - { 86 - 87 - if (PXSEG(port)) 88 - *(volatile unsigned char *)port = value; 89 - else if (port <= 0x3F1) 90 - *(volatile unsigned char *)ETHER_IOMAP(port) = value; 91 - else 92 - *(port2adr(port)) = value; 93 - } 94 - 95 - void sh7751systemh_outb_p(unsigned char value, unsigned long port) 96 - { 97 - if (PXSEG(port)) 98 - *(volatile unsigned char *)port = value; 99 - else if (port <= 0x3F1) 100 - *(volatile unsigned char *)ETHER_IOMAP(port) = value; 101 - else 102 - *(port2adr(port)) = value; 103 - ctrl_delay(); 104 - } 105 - 106 - void sh7751systemh_outw(unsigned short value, unsigned long port) 107 - { 108 - if (PXSEG(port)) 109 - *(volatile unsigned short *)port = value; 110 - else if (port >= 0x2000) 111 - *port2adr(port) = value; 112 - else if (port <= 0x3F1) 113 - *(volatile unsigned short *)ETHER_IOMAP(port) = value; 114 - else 115 - maybebadio(port); 116 - } 117 - 118 - void sh7751systemh_outl(unsigned int value, unsigned long port) 119 - { 120 - if (PXSEG(port)) 121 - *(volatile unsigned long *)port = value; 122 - else 123 - maybebadio(port); 124 - } 125 - 126 - void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count) 127 - { 128 - unsigned char *p = addr; 129 - while (count--) *p++ = sh7751systemh_inb(port); 130 - } 131 - 132 - void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count) 133 - { 134 - unsigned short *p = addr; 135 - while (count--) *p++ = sh7751systemh_inw(port); 136 - } 137 - 138 - void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count) 139 - { 140 - maybebadio(port); 141 - } 142 - 143 - void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count) 144 - { 145 - unsigned char *p = (unsigned char*)addr; 146 - while (count--) sh7751systemh_outb(*p++, port); 147 - } 148 - 149 - void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long count) 150 - { 151 - unsigned short *p = (unsigned short*)addr; 152 - while (count--) sh7751systemh_outw(*p++, port); 153 - } 154 - 155 - void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count) 156 - { 157 - maybebadio(port); 158 - }
···
-61
arch/sh/boards/mach-systemh/irq.c
··· 1 - /* 2 - * linux/arch/sh/boards/renesas/systemh/irq.c 3 - * 4 - * Copyright (C) 2000 Kazumoto Kojima 5 - * 6 - * Hitachi SystemH Support. 7 - * 8 - * Modified for 7751 SystemH by 9 - * Jonathan Short. 10 - */ 11 - 12 - #include <linux/init.h> 13 - #include <linux/irq.h> 14 - #include <linux/interrupt.h> 15 - #include <linux/io.h> 16 - 17 - #include <mach/systemh7751.h> 18 - #include <asm/smc37c93x.h> 19 - 20 - /* address of external interrupt mask register 21 - * address must be set prior to use these (maybe in init_XXX_irq()) 22 - * XXX : is it better to use .config than specifying it in code? */ 23 - static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004; 24 - static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; 25 - 26 - static void disable_systemh_irq(struct irq_data *data) 27 - { 28 - unsigned long val, mask = 0x01 << 1; 29 - 30 - /* Clear the "irq"th bit in the mask and set it in the request */ 31 - val = __raw_readl((unsigned long)systemh_irq_mask_register); 32 - val &= ~mask; 33 - __raw_writel(val, (unsigned long)systemh_irq_mask_register); 34 - 35 - val = __raw_readl((unsigned long)systemh_irq_request_register); 36 - val |= mask; 37 - __raw_writel(val, (unsigned long)systemh_irq_request_register); 38 - } 39 - 40 - static void enable_systemh_irq(struct irq_data *data) 41 - { 42 - unsigned long val, mask = 0x01 << 1; 43 - 44 - /* Set "irq"th bit in the mask register */ 45 - val = __raw_readl((unsigned long)systemh_irq_mask_register); 46 - val |= mask; 47 - __raw_writel(val, (unsigned long)systemh_irq_mask_register); 48 - } 49 - 50 - static struct irq_chip systemh_irq_type = { 51 - .name = "SystemH Register", 52 - .irq_unmask = enable_systemh_irq, 53 - .irq_mask = disable_systemh_irq, 54 - }; 55 - 56 - void make_systemh_irq(unsigned int irq) 57 - { 58 - disable_irq_nosync(irq); 59 - set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq); 60 - disable_systemh_irq(irq_get_irq_data(irq)); 61 - }
···
-57
arch/sh/boards/mach-systemh/setup.c
··· 1 - /* 2 - * linux/arch/sh/boards/renesas/systemh/setup.c 3 - * 4 - * Copyright (C) 2000 Kazumoto Kojima 5 - * Copyright (C) 2003 Paul Mundt 6 - * 7 - * Hitachi SystemH Support. 8 - * 9 - * Modified for 7751 SystemH by Jonathan Short. 10 - * 11 - * Rewritten for 2.6 by Paul Mundt. 12 - * 13 - * This file is subject to the terms and conditions of the GNU General Public 14 - * License. See the file "COPYING" in the main directory of this archive 15 - * for more details. 16 - */ 17 - #include <linux/init.h> 18 - #include <asm/machvec.h> 19 - #include <mach/systemh7751.h> 20 - 21 - extern void make_systemh_irq(unsigned int irq); 22 - 23 - /* 24 - * Initialize IRQ setting 25 - */ 26 - static void __init sh7751systemh_init_irq(void) 27 - { 28 - make_systemh_irq(0xb); /* Ethernet interrupt */ 29 - } 30 - 31 - static struct sh_machine_vector mv_7751systemh __initmv = { 32 - .mv_name = "7751 SystemH", 33 - .mv_nr_irqs = 72, 34 - 35 - .mv_inb = sh7751systemh_inb, 36 - .mv_inw = sh7751systemh_inw, 37 - .mv_inl = sh7751systemh_inl, 38 - .mv_outb = sh7751systemh_outb, 39 - .mv_outw = sh7751systemh_outw, 40 - .mv_outl = sh7751systemh_outl, 41 - 42 - .mv_inb_p = sh7751systemh_inb_p, 43 - .mv_inw_p = sh7751systemh_inw, 44 - .mv_inl_p = sh7751systemh_inl, 45 - .mv_outb_p = sh7751systemh_outb_p, 46 - .mv_outw_p = sh7751systemh_outw, 47 - .mv_outl_p = sh7751systemh_outl, 48 - 49 - .mv_insb = sh7751systemh_insb, 50 - .mv_insw = sh7751systemh_insw, 51 - .mv_insl = sh7751systemh_insl, 52 - .mv_outsb = sh7751systemh_outsb, 53 - .mv_outsw = sh7751systemh_outsw, 54 - .mv_outsl = sh7751systemh_outsl, 55 - 56 - .mv_init_irq = sh7751systemh_init_irq, 57 - };
···
arch/sh/configs/snapgear_defconfig arch/sh/configs/secureedge5410_defconfig
-28
arch/sh/configs/systemh_defconfig
··· 1 - CONFIG_EXPERIMENTAL=y 2 - CONFIG_LOG_BUF_SHIFT=14 3 - CONFIG_BLK_DEV_INITRD=y 4 - # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 5 - # CONFIG_SYSCTL_SYSCALL is not set 6 - # CONFIG_HOTPLUG is not set 7 - CONFIG_SLAB=y 8 - CONFIG_MODULES=y 9 - CONFIG_MODULE_UNLOAD=y 10 - # CONFIG_BLK_DEV_BSG is not set 11 - CONFIG_CPU_SUBTYPE_SH7751R=y 12 - CONFIG_MEMORY_START=0x0c000000 13 - CONFIG_MEMORY_SIZE=0x00400000 14 - CONFIG_FLATMEM_MANUAL=y 15 - CONFIG_SH_7751_SYSTEMH=y 16 - CONFIG_PREEMPT=y 17 - # CONFIG_STANDALONE is not set 18 - CONFIG_BLK_DEV_RAM=y 19 - CONFIG_BLK_DEV_RAM_SIZE=1024 20 - # CONFIG_INPUT is not set 21 - # CONFIG_SERIO_SERPORT is not set 22 - # CONFIG_VT is not set 23 - CONFIG_HW_RANDOM=y 24 - CONFIG_PROC_KCORE=y 25 - CONFIG_TMPFS=y 26 - CONFIG_CRAMFS=y 27 - CONFIG_ROMFS_FS=y 28 - # CONFIG_RCU_CPU_STALL_DETECTOR is not set
···
+4 -4
arch/sh/include/asm/addrspace.h
··· 44 /* 45 * These will never work in 32-bit, don't even bother. 46 */ 47 - #define P1SEGADDR(a) __futile_remapping_attempt 48 - #define P2SEGADDR(a) __futile_remapping_attempt 49 - #define P3SEGADDR(a) __futile_remapping_attempt 50 - #define P4SEGADDR(a) __futile_remapping_attempt 51 #endif 52 #endif /* P1SEG */ 53
··· 44 /* 45 * These will never work in 32-bit, don't even bother. 46 */ 47 + #define P1SEGADDR(a) ({ (void)(a); BUG(); NULL; }) 48 + #define P2SEGADDR(a) ({ (void)(a); BUG(); NULL; }) 49 + #define P3SEGADDR(a) ({ (void)(a); BUG(); NULL; }) 50 + #define P4SEGADDR(a) ({ (void)(a); BUG(); NULL; }) 51 #endif 52 #endif /* P1SEG */ 53
-12
arch/sh/include/asm/pgtable.h
··· 66 #define PHYS_ADDR_MASK29 0x1fffffff 67 #define PHYS_ADDR_MASK32 0xffffffff 68 69 - #ifdef CONFIG_PMB 70 static inline unsigned long phys_addr_mask(void) 71 { 72 /* Is the MMU in 29bit mode? */ ··· 74 75 return PHYS_ADDR_MASK32; 76 } 77 - #elif defined(CONFIG_32BIT) 78 - static inline unsigned long phys_addr_mask(void) 79 - { 80 - return PHYS_ADDR_MASK32; 81 - } 82 - #else 83 - static inline unsigned long phys_addr_mask(void) 84 - { 85 - return PHYS_ADDR_MASK29; 86 - } 87 - #endif 88 89 #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) 90 #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
··· 66 #define PHYS_ADDR_MASK29 0x1fffffff 67 #define PHYS_ADDR_MASK32 0xffffffff 68 69 static inline unsigned long phys_addr_mask(void) 70 { 71 /* Is the MMU in 29bit mode? */ ··· 75 76 return PHYS_ADDR_MASK32; 77 } 78 79 #define PTE_PHYS_MASK (phys_addr_mask() & PAGE_MASK) 80 #define PTE_FLAGS_MASK (~(PTE_PHYS_MASK) << PAGE_SHIFT)
+1 -3
arch/sh/include/asm/system.h
··· 10 #include <linux/compiler.h> 11 #include <linux/linkage.h> 12 #include <asm/types.h> 13 14 #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ 15 ··· 137 #else 138 #define instruction_size(insn) (4) 139 #endif 140 - 141 - extern unsigned long cached_to_uncached; 142 - extern unsigned long uncached_size; 143 144 void per_cpu_trap_init(void); 145 void default_idle(void);
··· 10 #include <linux/compiler.h> 11 #include <linux/linkage.h> 12 #include <asm/types.h> 13 + #include <asm/uncached.h> 14 15 #define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */ 16 ··· 136 #else 137 #define instruction_size(insn) (4) 138 #endif 139 140 void per_cpu_trap_init(void); 141 void default_idle(void);
-36
arch/sh/include/asm/system_32.h
··· 145 __restore_dsp(prev); \ 146 } while (0) 147 148 - /* 149 - * Jump to uncached area. 150 - * When handling TLB or caches, we need to do it from an uncached area. 151 - */ 152 - #define jump_to_uncached() \ 153 - do { \ 154 - unsigned long __dummy; \ 155 - \ 156 - __asm__ __volatile__( \ 157 - "mova 1f, %0\n\t" \ 158 - "add %1, %0\n\t" \ 159 - "jmp @%0\n\t" \ 160 - " nop\n\t" \ 161 - ".balign 4\n" \ 162 - "1:" \ 163 - : "=&z" (__dummy) \ 164 - : "r" (cached_to_uncached)); \ 165 - } while (0) 166 - 167 - /* 168 - * Back to cached area. 169 - */ 170 - #define back_to_cached() \ 171 - do { \ 172 - unsigned long __dummy; \ 173 - ctrl_barrier(); \ 174 - __asm__ __volatile__( \ 175 - "mov.l 1f, %0\n\t" \ 176 - "jmp @%0\n\t" \ 177 - " nop\n\t" \ 178 - ".balign 4\n" \ 179 - "1: .long 2f\n" \ 180 - "2:" \ 181 - : "=&r" (__dummy)); \ 182 - } while (0) 183 - 184 #ifdef CONFIG_CPU_HAS_SR_RB 185 #define lookup_exception_vector() \ 186 ({ \
··· 145 __restore_dsp(prev); \ 146 } while (0) 147 148 #ifdef CONFIG_CPU_HAS_SR_RB 149 #define lookup_exception_vector() \ 150 ({ \
-3
arch/sh/include/asm/system_64.h
··· 34 &next->thread); \ 35 } while (0) 36 37 - #define jump_to_uncached() do { } while (0) 38 - #define back_to_cached() do { } while (0) 39 - 40 #define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) 41 #define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) 42 #define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
··· 34 &next->thread); \ 35 } while (0) 36 37 #define __icbi(addr) __asm__ __volatile__ ( "icbi %0, 0\n\t" : : "r" (addr)) 38 #define __ocbp(addr) __asm__ __volatile__ ( "ocbp %0, 0\n\t" : : "r" (addr)) 39 #define __ocbi(addr) __asm__ __volatile__ ( "ocbi %0, 0\n\t" : : "r" (addr))
+40
arch/sh/include/asm/uncached.h
··· 4 #include <linux/bug.h> 5 6 #ifdef CONFIG_UNCACHED_MAPPING 7 extern unsigned long uncached_start, uncached_end; 8 9 extern int virt_addr_uncached(unsigned long kaddr); 10 extern void uncached_init(void); 11 extern void uncached_resize(unsigned long size); 12 #else 13 #define virt_addr_uncached(kaddr) (0) 14 #define uncached_init() do { } while (0) 15 #define uncached_resize(size) BUG() 16 #endif 17 18 #endif /* __ASM_SH_UNCACHED_H */
··· 4 #include <linux/bug.h> 5 6 #ifdef CONFIG_UNCACHED_MAPPING 7 + extern unsigned long cached_to_uncached; 8 + extern unsigned long uncached_size; 9 extern unsigned long uncached_start, uncached_end; 10 11 extern int virt_addr_uncached(unsigned long kaddr); 12 extern void uncached_init(void); 13 extern void uncached_resize(unsigned long size); 14 + 15 + /* 16 + * Jump to uncached area. 17 + * When handling TLB or caches, we need to do it from an uncached area. 18 + */ 19 + #define jump_to_uncached() \ 20 + do { \ 21 + unsigned long __dummy; \ 22 + \ 23 + __asm__ __volatile__( \ 24 + "mova 1f, %0\n\t" \ 25 + "add %1, %0\n\t" \ 26 + "jmp @%0\n\t" \ 27 + " nop\n\t" \ 28 + ".balign 4\n" \ 29 + "1:" \ 30 + : "=&z" (__dummy) \ 31 + : "r" (cached_to_uncached)); \ 32 + } while (0) 33 + 34 + /* 35 + * Back to cached area. 36 + */ 37 + #define back_to_cached() \ 38 + do { \ 39 + unsigned long __dummy; \ 40 + ctrl_barrier(); \ 41 + __asm__ __volatile__( \ 42 + "mov.l 1f, %0\n\t" \ 43 + "jmp @%0\n\t" \ 44 + " nop\n\t" \ 45 + ".balign 4\n" \ 46 + "1: .long 2f\n" \ 47 + "2:" \ 48 + : "=&r" (__dummy)); \ 49 + } while (0) 50 #else 51 #define virt_addr_uncached(kaddr) (0) 52 #define uncached_init() do { } while (0) 53 #define uncached_resize(size) BUG() 54 + #define jump_to_uncached() do { } while (0) 55 + #define back_to_cached() do { } while (0) 56 #endif 57 58 #endif /* __ASM_SH_UNCACHED_H */
-7
arch/sh/include/mach-common/mach/edosk7705.h
··· 1 - #ifndef __ASM_SH_EDOSK7705_H 2 - #define __ASM_SH_EDOSK7705_H 3 - 4 - #define __IO_PREFIX sh_edosk7705 5 - #include <asm/io_generic.h> 6 - 7 - #endif /* __ASM_SH_EDOSK7705_H */
···
-9
arch/sh/include/mach-common/mach/microdev.h
··· 68 #define __IO_PREFIX microdev 69 #include <asm/io_generic.h> 70 71 - #if defined(CONFIG_PCI) 72 - unsigned char microdev_pci_inb(unsigned long port); 73 - unsigned short microdev_pci_inw(unsigned long port); 74 - unsigned long microdev_pci_inl(unsigned long port); 75 - void microdev_pci_outb(unsigned char data, unsigned long port); 76 - void microdev_pci_outw(unsigned short data, unsigned long port); 77 - void microdev_pci_outl(unsigned long data, unsigned long port); 78 - #endif 79 - 80 #endif /* __ASM_SH_MICRODEV_H */
··· 68 #define __IO_PREFIX microdev 69 #include <asm/io_generic.h> 70 71 #endif /* __ASM_SH_MICRODEV_H */
-22
arch/sh/include/mach-common/mach/snapgear.h arch/sh/include/mach-common/mach/secureedge5410.h
··· 12 #ifndef _ASM_SH_IO_SNAPGEAR_H 13 #define _ASM_SH_IO_SNAPGEAR_H 14 15 - #if defined(CONFIG_CPU_SH4) 16 - /* 17 - * The external interrupt lines, these take up ints 0 - 15 inclusive 18 - * depending on the priority for the interrupt. In fact the priority 19 - * is the interrupt :-) 20 - */ 21 - 22 - #define IRL0_IRQ 2 23 - #define IRL0_PRIORITY 13 24 - 25 - #define IRL1_IRQ 5 26 - #define IRL1_PRIORITY 10 27 - 28 - #define IRL2_IRQ 8 29 - #define IRL2_PRIORITY 7 30 - 31 - #define IRL3_IRQ 11 32 - #define IRL3_PRIORITY 4 33 - #endif 34 - 35 #define __IO_PREFIX snapgear 36 #include <asm/io_generic.h> 37 38 - #ifdef CONFIG_SH_SECUREEDGE5410 39 /* 40 * We need to remember what was written to the ioport as some bits 41 * are shared with other functions and you cannot read back what was ··· 45 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) 46 #define SECUREEDGE_READ_IOPORT() \ 47 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) 48 - #endif 49 50 #endif /* _ASM_SH_IO_SNAPGEAR_H */
··· 12 #ifndef _ASM_SH_IO_SNAPGEAR_H 13 #define _ASM_SH_IO_SNAPGEAR_H 14 15 #define __IO_PREFIX snapgear 16 #include <asm/io_generic.h> 17 18 /* 19 * We need to remember what was written to the ioport as some bits 20 * are shared with other functions and you cannot read back what was ··· 66 ((secureedge5410_ioport & ~(mask)) | ((val) & (mask))))) 67 #define SECUREEDGE_READ_IOPORT() \ 68 ((*SECUREEDGE_IOPORT_ADDR&0x0817) | (secureedge5410_ioport&~0x0817)) 69 70 #endif /* _ASM_SH_IO_SNAPGEAR_H */
-71
arch/sh/include/mach-common/mach/systemh7751.h
··· 1 - #ifndef __ASM_SH_SYSTEMH_7751SYSTEMH_H 2 - #define __ASM_SH_SYSTEMH_7751SYSTEMH_H 3 - 4 - /* 5 - * linux/include/asm-sh/systemh/7751systemh.h 6 - * 7 - * Copyright (C) 2000 Kazumoto Kojima 8 - * 9 - * Hitachi SystemH support 10 - 11 - * Modified for 7751 SystemH by 12 - * Jonathan Short, 2002. 13 - */ 14 - 15 - /* Box specific addresses. */ 16 - 17 - #define PA_ROM 0x00000000 /* EPROM */ 18 - #define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */ 19 - #define PA_FROM 0x01000000 /* EPROM */ 20 - #define PA_FROM_SIZE 0x00400000 /* EPROM size 4M byte */ 21 - #define PA_EXT1 0x04000000 22 - #define PA_EXT1_SIZE 0x04000000 23 - #define PA_EXT2 0x08000000 24 - #define PA_EXT2_SIZE 0x04000000 25 - #define PA_SDRAM 0x0c000000 26 - #define PA_SDRAM_SIZE 0x04000000 27 - 28 - #define PA_EXT4 0x12000000 29 - #define PA_EXT4_SIZE 0x02000000 30 - #define PA_EXT5 0x14000000 31 - #define PA_EXT5_SIZE 0x04000000 32 - #define PA_PCIC 0x18000000 /* MR-SHPC-01 PCMCIA */ 33 - 34 - #define PA_DIPSW0 0xb9000000 /* Dip switch 5,6 */ 35 - #define PA_DIPSW1 0xb9000002 /* Dip switch 7,8 */ 36 - #define PA_LED 0xba000000 /* LED */ 37 - #define PA_BCR 0xbb000000 /* FPGA on the MS7751SE01 */ 38 - 39 - #define PA_MRSHPC 0xb83fffe0 /* MR-SHPC-01 PCMCIA controller */ 40 - #define PA_MRSHPC_MW1 0xb8400000 /* MR-SHPC-01 memory window base */ 41 - #define PA_MRSHPC_MW2 0xb8500000 /* MR-SHPC-01 attribute window base */ 42 - #define PA_MRSHPC_IO 0xb8600000 /* MR-SHPC-01 I/O window base */ 43 - #define MRSHPC_MODE (PA_MRSHPC + 4) 44 - #define MRSHPC_OPTION (PA_MRSHPC + 6) 45 - #define MRSHPC_CSR (PA_MRSHPC + 8) 46 - #define MRSHPC_ISR (PA_MRSHPC + 10) 47 - #define MRSHPC_ICR (PA_MRSHPC + 12) 48 - #define MRSHPC_CPWCR (PA_MRSHPC + 14) 49 - #define MRSHPC_MW0CR1 (PA_MRSHPC + 16) 50 - #define MRSHPC_MW1CR1 (PA_MRSHPC + 18) 51 - #define MRSHPC_IOWCR1 (PA_MRSHPC + 20) 52 - #define MRSHPC_MW0CR2 (PA_MRSHPC + 22) 53 - #define MRSHPC_MW1CR2 (PA_MRSHPC + 24) 54 - #define MRSHPC_IOWCR2 (PA_MRSHPC + 26) 55 - #define MRSHPC_CDCR (PA_MRSHPC + 28) 56 - #define MRSHPC_PCIC_INFO (PA_MRSHPC + 30) 57 - 58 - #define BCR_ILCRA (PA_BCR + 0) 59 - #define BCR_ILCRB (PA_BCR + 2) 60 - #define BCR_ILCRC (PA_BCR + 4) 61 - #define BCR_ILCRD (PA_BCR + 6) 62 - #define BCR_ILCRE (PA_BCR + 8) 63 - #define BCR_ILCRF (PA_BCR + 10) 64 - #define BCR_ILCRG (PA_BCR + 12) 65 - 66 - #define IRQ_79C973 13 67 - 68 - #define __IO_PREFIX sh7751systemh 69 - #include <asm/io_generic.h> 70 - 71 - #endif /* __ASM_SH_SYSTEMH_7751SYSTEMH_H */
···
+3 -3
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
··· 48 * Default rate for the root input clock, reset this with clk_set_rate() 49 * from the platform code. 50 */ 51 - struct clk extal_clk = { 52 .rate = 33333333, 53 }; 54 ··· 111 .parent = &pll_clk, 112 }; 113 114 - struct clk *main_clks[] = { 115 &r_clk, 116 &extal_clk, 117 &fll_clk, ··· 156 157 enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 158 159 - struct clk div6_clks[DIV6_NR] = { 160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), 161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0), 162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
··· 48 * Default rate for the root input clock, reset this with clk_set_rate() 49 * from the platform code. 50 */ 51 + static struct clk extal_clk = { 52 .rate = 33333333, 53 }; 54 ··· 111 .parent = &pll_clk, 112 }; 113 114 + static struct clk *main_clks[] = { 115 &r_clk, 116 &extal_clk, 117 &fll_clk, ··· 156 157 enum { DIV6_V, DIV6_FA, DIV6_FB, DIV6_I, DIV6_S, DIV6_NR }; 158 159 + static struct clk div6_clks[DIV6_NR] = { 160 [DIV6_V] = SH_CLK_DIV6(&div3_clk, VCLKCR, 0), 161 [DIV6_FA] = SH_CLK_DIV6(&div3_clk, FCLKACR, 0), 162 [DIV6_FB] = SH_CLK_DIV6(&div3_clk, FCLKBCR, 0),
+1 -1
arch/sh/mm/Kconfig
··· 79 80 config 32BIT 81 bool 82 - default y if CPU_SH5 83 84 config PMB 85 bool "Support 32-bit physical addressing through PMB"
··· 79 80 config 32BIT 81 bool 82 + default y if CPU_SH5 || !MMU 83 84 config PMB 85 bool "Support 32-bit physical addressing through PMB"
+7 -8
arch/sh/mm/consistent.c
··· 79 void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 80 enum dma_data_direction direction) 81 { 82 - #if defined(CONFIG_CPU_SH5) || defined(CONFIG_PMB) 83 - void *p1addr = vaddr; 84 - #else 85 - void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 86 - #endif 87 88 switch (direction) { 89 case DMA_FROM_DEVICE: /* invalidate only */ 90 - __flush_invalidate_region(p1addr, size); 91 break; 92 case DMA_TO_DEVICE: /* writeback only */ 93 - __flush_wback_region(p1addr, size); 94 break; 95 case DMA_BIDIRECTIONAL: /* writeback and invalidate */ 96 - __flush_purge_region(p1addr, size); 97 break; 98 default: 99 BUG();
··· 79 void dma_cache_sync(struct device *dev, void *vaddr, size_t size, 80 enum dma_data_direction direction) 81 { 82 + void *addr; 83 + 84 + addr = __in_29bit_mode() ? 85 + (void *)P1SEGADDR((unsigned long)vaddr) : vaddr; 86 87 switch (direction) { 88 case DMA_FROM_DEVICE: /* invalidate only */ 89 + __flush_invalidate_region(addr, size); 90 break; 91 case DMA_TO_DEVICE: /* writeback only */ 92 + __flush_wback_region(addr, size); 93 break; 94 case DMA_BIDIRECTIONAL: /* writeback and invalidate */ 95 + __flush_purge_region(addr, size); 96 break; 97 default: 98 BUG();
+1 -1
arch/sh/mm/uncached.c
··· 28 29 void __init uncached_init(void) 30 { 31 - #ifdef CONFIG_29BIT 32 uncached_start = P2SEG; 33 #else 34 uncached_start = memory_end;
··· 28 29 void __init uncached_init(void) 30 { 31 + #if defined(CONFIG_29BIT) || !defined(CONFIG_MMU) 32 uncached_start = P2SEG; 33 #else 34 uncached_start = memory_end;
-1
arch/sh/tools/mach-types
··· 26 7724SE SH_7724_SOLUTION_ENGINE 27 7751SE SH_7751_SOLUTION_ENGINE 28 7780SE SH_7780_SOLUTION_ENGINE 29 - 7751SYSTEMH SH_7751_SYSTEMH 30 HP6XX SH_HP6XX 31 DREAMCAST SH_DREAMCAST 32 SNAPGEAR SH_SECUREEDGE5410
··· 26 7724SE SH_7724_SOLUTION_ENGINE 27 7751SE SH_7751_SOLUTION_ENGINE 28 7780SE SH_7780_SOLUTION_ENGINE 29 HP6XX SH_HP6XX 30 DREAMCAST SH_DREAMCAST 31 SNAPGEAR SH_SECUREEDGE5410
+1 -1
drivers/rtc/rtc-ds1302.c
··· 35 36 #ifdef CONFIG_SH_SECUREEDGE5410 37 #include <asm/rtc.h> 38 - #include <mach/snapgear.h> 39 40 #define RTC_RESET 0x1000 41 #define RTC_IODATA 0x0800
··· 35 36 #ifdef CONFIG_SH_SECUREEDGE5410 37 #include <asm/rtc.h> 38 + #include <mach/secureedge5410.h> 39 40 #define RTC_RESET 0x1000 41 #define RTC_IODATA 0x0800
+94 -2
drivers/sh/clk/core.c
··· 90 static long clk_rate_round_helper(struct clk_rate_round_data *rounder) 91 { 92 unsigned long rate_error, rate_error_prev = ~0UL; 93 - unsigned long rate_best_fit = rounder->rate; 94 unsigned long highest, lowest, freq; 95 int i; 96 97 highest = 0; ··· 146 }; 147 148 if (clk->nr_freqs < 1) 149 - return 0; 150 151 return clk_rate_round_helper(&table_round); 152 } ··· 540 return clk_get_rate(clk); 541 } 542 EXPORT_SYMBOL_GPL(clk_round_rate); 543 544 #ifdef CONFIG_PM 545 static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
··· 90 static long clk_rate_round_helper(struct clk_rate_round_data *rounder) 91 { 92 unsigned long rate_error, rate_error_prev = ~0UL; 93 unsigned long highest, lowest, freq; 94 + long rate_best_fit = -ENOENT; 95 int i; 96 97 highest = 0; ··· 146 }; 147 148 if (clk->nr_freqs < 1) 149 + return -ENOSYS; 150 151 return clk_rate_round_helper(&table_round); 152 } ··· 540 return clk_get_rate(clk); 541 } 542 EXPORT_SYMBOL_GPL(clk_round_rate); 543 + 544 + long clk_round_parent(struct clk *clk, unsigned long target, 545 + unsigned long *best_freq, unsigned long *parent_freq, 546 + unsigned int div_min, unsigned int div_max) 547 + { 548 + struct cpufreq_frequency_table *freq, *best = NULL; 549 + unsigned long error = ULONG_MAX, freq_high, freq_low, div; 550 + struct clk *parent = clk_get_parent(clk); 551 + 552 + if (!parent) { 553 + *parent_freq = 0; 554 + *best_freq = clk_round_rate(clk, target); 555 + return abs(target - *best_freq); 556 + } 557 + 558 + for (freq = parent->freq_table; freq->frequency != CPUFREQ_TABLE_END; 559 + freq++) { 560 + if (freq->frequency == CPUFREQ_ENTRY_INVALID) 561 + continue; 562 + 563 + if (unlikely(freq->frequency / target <= div_min - 1)) { 564 + unsigned long freq_max; 565 + 566 + freq_max = (freq->frequency + div_min / 2) / div_min; 567 + if (error > target - freq_max) { 568 + error = target - freq_max; 569 + best = freq; 570 + if (best_freq) 571 + *best_freq = freq_max; 572 + } 573 + 574 + pr_debug("too low freq %lu, error %lu\n", freq->frequency, 575 + target - freq_max); 576 + 577 + if (!error) 578 + break; 579 + 580 + continue; 581 + } 582 + 583 + if (unlikely(freq->frequency / target >= div_max)) { 584 + unsigned long freq_min; 585 + 586 + freq_min = (freq->frequency + div_max / 2) / div_max; 587 + if (error > freq_min - target) { 588 + error = freq_min - target; 589 + best = freq; 590 + if (best_freq) 591 + *best_freq = freq_min; 592 + } 593 + 594 + pr_debug("too high freq %lu, error %lu\n", freq->frequency, 595 + freq_min - target); 596 + 597 + if (!error) 598 + break; 599 + 600 + continue; 601 + } 602 + 603 + div = freq->frequency / target; 604 + freq_high = freq->frequency / div; 605 + freq_low = freq->frequency / (div + 1); 606 + 607 + if (freq_high - target < error) { 608 + error = freq_high - target; 609 + best = freq; 610 + if (best_freq) 611 + *best_freq = freq_high; 612 + } 613 + 614 + if (target - freq_low < error) { 615 + error = target - freq_low; 616 + best = freq; 617 + if (best_freq) 618 + *best_freq = freq_low; 619 + } 620 + 621 + pr_debug("%u / %lu = %lu, / %lu = %lu, best %lu, parent %u\n", 622 + freq->frequency, div, freq_high, div + 1, freq_low, 623 + *best_freq, best->frequency); 624 + 625 + if (!error) 626 + break; 627 + } 628 + 629 + if (parent_freq) 630 + *parent_freq = best->frequency; 631 + 632 + return error; 633 + } 634 + EXPORT_SYMBOL_GPL(clk_round_parent); 635 636 #ifdef CONFIG_PM 637 static int clks_sysdev_suspend(struct sys_device *dev, pm_message_t state)
+1 -1
drivers/sh/intc/core.c
··· 79 * Register the IRQ position with the global IRQ map, then insert 80 * it in to the radix tree. 81 */ 82 - irq_reserve_irqs(irq, 1); 83 84 raw_spin_lock_irqsave(&intc_big_lock, flags); 85 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq));
··· 79 * Register the IRQ position with the global IRQ map, then insert 80 * it in to the radix tree. 81 */ 82 + irq_reserve_irq(irq); 83 84 raw_spin_lock_irqsave(&intc_big_lock, flags); 85 radix_tree_insert(&d->tree, enum_id, intc_irq_xlate_get(irq));
+1 -1
drivers/sh/intc/dynamic.c
··· 60 int i; 61 62 for (i = 0; i < nr_vecs; i++) 63 - irq_reserve_irqs(evt2irq(vectors[i].vect), 1); 64 }
··· 60 int i; 61 62 for (i = 0; i < nr_vecs; i++) 63 + irq_reserve_irq(evt2irq(vectors[i].vect)); 64 }
+4
include/linux/sh_clk.h
··· 122 long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, 123 unsigned int div_max, unsigned long rate); 124 125 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ 126 { \ 127 .parent = _parent, \
··· 122 long clk_rate_div_range_round(struct clk *clk, unsigned int div_min, 123 unsigned int div_max, unsigned long rate); 124 125 + long clk_round_parent(struct clk *clk, unsigned long target, 126 + unsigned long *best_freq, unsigned long *parent_freq, 127 + unsigned int div_min, unsigned int div_max); 128 + 129 #define SH_CLK_MSTP32(_parent, _enable_reg, _enable_bit, _flags) \ 130 { \ 131 .parent = _parent, \