tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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EDAC, mv64x60: Replace in_le32()/out_le32() with readl()/writel()

To allow this driver to be used on non-powerpc platforms it needs to use
io accessors suitable for all platforms.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Cc: linux-edac <linux-edac@vger.kernel.org>
Cc: linuxppc-dev@lists.ozlabs.org
Link: http://lkml.kernel.org/r/20170518083135.28048-4-chris.packham@alliedtelesis.co.nz
Signed-off-by: Borislav Petkov <bp@suse.de>

authored by

Chris Packham and committed by
Borislav Petkov 8b9afe59 0b3df44e

+42 -42
+42 -42
drivers/edac/mv64x60_edac.c
··· 32 32 struct mv64x60_pci_pdata *pdata = pci->pvt_info; 33 33 u32 cause; 34 34 35 - cause = in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); 35 + cause = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); 36 36 if (!cause) 37 37 return; 38 38 39 39 printk(KERN_ERR "Error in PCI %d Interface\n", pdata->pci_hose); 40 40 printk(KERN_ERR "Cause register: 0x%08x\n", cause); 41 41 printk(KERN_ERR "Address Low: 0x%08x\n", 42 - in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_LO)); 42 + readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_LO)); 43 43 printk(KERN_ERR "Address High: 0x%08x\n", 44 - in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_HI)); 44 + readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ADDR_HI)); 45 45 printk(KERN_ERR "Attribute: 0x%08x\n", 46 - in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_ATTR)); 46 + readl(pdata->pci_vbase + MV64X60_PCI_ERROR_ATTR)); 47 47 printk(KERN_ERR "Command: 0x%08x\n", 48 - in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CMD)); 49 - out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE, ~cause); 48 + readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CMD)); 49 + writel(~cause, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); 50 50 51 51 if (cause & MV64X60_PCI_PE_MASK) 52 52 edac_pci_handle_pe(pci, pci->ctl_name); ··· 61 61 struct mv64x60_pci_pdata *pdata = pci->pvt_info; 62 62 u32 val; 63 63 64 - val = in_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); 64 + val = readl(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); 65 65 if (!val) 66 66 return IRQ_NONE; 67 67 ··· 93 93 if (!pci_serr) 94 94 return -ENOMEM; 95 95 96 - out_le32(pci_serr, in_le32(pci_serr) & ~0x1); 96 + writel(readl(pci_serr) & ~0x1, pci_serr); 97 97 iounmap(pci_serr); 98 98 99 99 return 0; ··· 161 161 goto err; 162 162 } 163 163 164 - out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE, 0); 165 - out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_MASK, 0); 166 - out_le32(pdata->pci_vbase + MV64X60_PCI_ERROR_MASK, 167 - MV64X60_PCIx_ERR_MASK_VAL); 164 + writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_CAUSE); 165 + writel(0, pdata->pci_vbase + MV64X60_PCI_ERROR_MASK); 166 + writel(MV64X60_PCIx_ERR_MASK_VAL, 167 + pdata->pci_vbase + MV64X60_PCI_ERROR_MASK); 168 168 169 169 if (edac_pci_add_device(pci, pdata->edac_idx) > 0) { 170 170 edac_dbg(3, "failed edac_pci_add_device()\n"); ··· 233 233 struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info; 234 234 u32 cause; 235 235 236 - cause = in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); 236 + cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); 237 237 if (!cause) 238 238 return; 239 239 240 240 printk(KERN_ERR "Error in internal SRAM\n"); 241 241 printk(KERN_ERR "Cause register: 0x%08x\n", cause); 242 242 printk(KERN_ERR "Address Low: 0x%08x\n", 243 - in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_LO)); 243 + readl(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_LO)); 244 244 printk(KERN_ERR "Address High: 0x%08x\n", 245 - in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_HI)); 245 + readl(pdata->sram_vbase + MV64X60_SRAM_ERR_ADDR_HI)); 246 246 printk(KERN_ERR "Data Low: 0x%08x\n", 247 - in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_LO)); 247 + readl(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_LO)); 248 248 printk(KERN_ERR "Data High: 0x%08x\n", 249 - in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_HI)); 249 + readl(pdata->sram_vbase + MV64X60_SRAM_ERR_DATA_HI)); 250 250 printk(KERN_ERR "Parity: 0x%08x\n", 251 - in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_PARITY)); 252 - out_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE, 0); 251 + readl(pdata->sram_vbase + MV64X60_SRAM_ERR_PARITY)); 252 + writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); 253 253 254 254 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); 255 255 } ··· 260 260 struct mv64x60_sram_pdata *pdata = edac_dev->pvt_info; 261 261 u32 cause; 262 262 263 - cause = in_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); 263 + cause = readl(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); 264 264 if (!cause) 265 265 return IRQ_NONE; 266 266 ··· 322 322 } 323 323 324 324 /* setup SRAM err registers */ 325 - out_le32(pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE, 0); 325 + writel(0, pdata->sram_vbase + MV64X60_SRAM_ERR_CAUSE); 326 326 327 327 edac_dev->mod_name = EDAC_MOD_STR; 328 328 edac_dev->ctl_name = pdata->name; ··· 398 398 struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info; 399 399 u32 cause; 400 400 401 - cause = in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) & 401 + cause = readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) & 402 402 MV64x60_CPU_CAUSE_MASK; 403 403 if (!cause) 404 404 return; ··· 406 406 printk(KERN_ERR "Error on CPU interface\n"); 407 407 printk(KERN_ERR "Cause register: 0x%08x\n", cause); 408 408 printk(KERN_ERR "Address Low: 0x%08x\n", 409 - in_le32(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_LO)); 409 + readl(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_LO)); 410 410 printk(KERN_ERR "Address High: 0x%08x\n", 411 - in_le32(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_HI)); 411 + readl(pdata->cpu_vbase[0] + MV64x60_CPU_ERR_ADDR_HI)); 412 412 printk(KERN_ERR "Data Low: 0x%08x\n", 413 - in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_LO)); 413 + readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_LO)); 414 414 printk(KERN_ERR "Data High: 0x%08x\n", 415 - in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_HI)); 415 + readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_DATA_HI)); 416 416 printk(KERN_ERR "Parity: 0x%08x\n", 417 - in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_PARITY)); 418 - out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE, 0); 417 + readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_PARITY)); 418 + writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE); 419 419 420 420 edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name); 421 421 } ··· 426 426 struct mv64x60_cpu_pdata *pdata = edac_dev->pvt_info; 427 427 u32 cause; 428 428 429 - cause = in_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) & 429 + cause = readl(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE) & 430 430 MV64x60_CPU_CAUSE_MASK; 431 431 if (!cause) 432 432 return IRQ_NONE; ··· 515 515 } 516 516 517 517 /* setup CPU err registers */ 518 - out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE, 0); 519 - out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK, 0); 520 - out_le32(pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK, 0x000000ff); 518 + writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_CAUSE); 519 + writel(0, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK); 520 + writel(0x000000ff, pdata->cpu_vbase[1] + MV64x60_CPU_ERR_MASK); 521 521 522 522 edac_dev->mod_name = EDAC_MOD_STR; 523 523 edac_dev->ctl_name = pdata->name; ··· 596 596 u32 comp_ecc; 597 597 u32 syndrome; 598 598 599 - reg = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR); 599 + reg = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR); 600 600 if (!reg) 601 601 return; 602 602 603 603 err_addr = reg & ~0x3; 604 - sdram_ecc = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_RCVD); 605 - comp_ecc = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CALC); 604 + sdram_ecc = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_RCVD); 605 + comp_ecc = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CALC); 606 606 syndrome = sdram_ecc ^ comp_ecc; 607 607 608 608 /* first bit clear in ECC Err Reg, 1 bit error, correctable by HW */ ··· 620 620 mci->ctl_name, ""); 621 621 622 622 /* clear the error */ 623 - out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0); 623 + writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR); 624 624 } 625 625 626 626 static irqreturn_t mv64x60_mc_isr(int irq, void *dev_id) ··· 629 629 struct mv64x60_mc_pdata *pdata = mci->pvt_info; 630 630 u32 reg; 631 631 632 - reg = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR); 632 + reg = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR); 633 633 if (!reg) 634 634 return IRQ_NONE; 635 635 ··· 664 664 665 665 get_total_mem(pdata); 666 666 667 - ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); 667 + ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); 668 668 669 669 csrow = mci->csrows[0]; 670 670 dimm = csrow->channels[0]->dimm; ··· 753 753 goto err; 754 754 } 755 755 756 - ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); 756 + ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_CONFIG); 757 757 if (!(ctl & MV64X60_SDRAM_ECC)) { 758 758 /* Non-ECC RAM? */ 759 759 printk(KERN_WARNING "%s: No ECC DIMMs discovered\n", __func__); ··· 779 779 mv64x60_init_csrows(mci, pdata); 780 780 781 781 /* setup MC registers */ 782 - out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR, 0); 783 - ctl = in_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL); 782 + writel(0, pdata->mc_vbase + MV64X60_SDRAM_ERR_ADDR); 783 + ctl = readl(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL); 784 784 ctl = (ctl & 0xff00ffff) | 0x10000; 785 - out_le32(pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL, ctl); 785 + writel(ctl, pdata->mc_vbase + MV64X60_SDRAM_ERR_ECC_CNTL); 786 786 787 787 res = edac_mc_add_mc(mci); 788 788 if (res) {