tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

net: ipa: clarify endpoint register macro constraints

A handful of registers are valid only for RX endpoints, and some
others are valid only for TX endpoints. For these endpoints, add
a comment above their defined offset macro that indicates the
endpoints to which they apply.

Extend the endpoint parameter naming convention as well, to make
these constraints more explicit.

Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

authored by

Alex Elder and committed by
David S. Miller 8b97bcb7 00b9102a

+25 -18
+25 -18
drivers/net/ipa/ipa_reg.h
··· 32 32 * parameter is supplied to the offset macro. The "ee" value is a member of 33 33 * the gsi_ee enumerated type. 34 34 * 35 - * The offset of a register dependent on endpoint id is computed by a macro 36 - * that is supplied a parameter "ep". The "ep" value is assumed to be less 37 - * than the maximum endpoint value for the current hardware, and that will 38 - * not exceed IPA_ENDPOINT_MAX. 35 + * The offset of a register dependent on endpoint ID is computed by a macro 36 + * that is supplied a parameter "ep", "txep", or "rxep". A register with an 37 + * "ep" parameter is valid for any endpoint; a register with a "txep" or 38 + * "rxep" parameter is valid only for TX or RX endpoints, respectively. The 39 + * "*ep" value is assumed to be less than the maximum valid endpoint ID 40 + * for the current hardware, and that will not exceed IPA_ENDPOINT_MAX. 39 41 * 40 42 * The offset of registers related to filter and route tables is computed 41 43 * by a macro that is supplied a parameter "er". The "er" represents an ··· 294 292 #define HDR_TOTAL_LEN_OR_PAD_OFFSET_FMASK GENMASK(9, 4) 295 293 #define HDR_PAD_TO_ALIGNMENT_FMASK GENMASK(13, 10) 296 294 297 - #define IPA_REG_ENDP_INIT_HDR_METADATA_MASK_N_OFFSET(ep) \ 298 - (0x00000818 + 0x0070 * (ep)) 295 + /* Valid only for RX (IPA producer) endpoints */ 296 + #define IPA_REG_ENDP_INIT_HDR_METADATA_MASK_N_OFFSET(rxep) \ 297 + (0x00000818 + 0x0070 * (rxep)) 299 298 300 - #define IPA_REG_ENDP_INIT_MODE_N_OFFSET(ep) \ 301 - (0x00000820 + 0x0070 * (ep)) 299 + /* Valid only for TX (IPA consumer) endpoints */ 300 + #define IPA_REG_ENDP_INIT_MODE_N_OFFSET(txep) \ 301 + (0x00000820 + 0x0070 * (txep)) 302 302 #define MODE_FMASK GENMASK(2, 0) 303 303 #define DEST_PIPE_INDEX_FMASK GENMASK(8, 4) 304 304 #define BYTE_THRESHOLD_FMASK GENMASK(27, 12) ··· 319 315 #define AGGR_FORCE_CLOSE_FMASK GENMASK(22, 22) 320 316 #define AGGR_HARD_BYTE_LIMIT_ENABLE_FMASK GENMASK(24, 24) 321 317 322 - #define IPA_REG_ENDP_INIT_HOL_BLOCK_EN_N_OFFSET(ep) \ 323 - (0x0000082c + 0x0070 * (ep)) 318 + /* Valid only for RX (IPA producer) endpoints */ 319 + #define IPA_REG_ENDP_INIT_HOL_BLOCK_EN_N_OFFSET(rxep) \ 320 + (0x0000082c + 0x0070 * (rxep)) 324 321 #define HOL_BLOCK_EN_FMASK GENMASK(0, 0) 325 322 326 - /* The next register is valid only for RX (IPA producer) endpoints */ 327 - #define IPA_REG_ENDP_INIT_HOL_BLOCK_TIMER_N_OFFSET(ep) \ 328 - (0x00000830 + 0x0070 * (ep)) 323 + /* Valid only for RX (IPA producer) endpoints */ 324 + #define IPA_REG_ENDP_INIT_HOL_BLOCK_TIMER_N_OFFSET(rxep) \ 325 + (0x00000830 + 0x0070 * (rxep)) 329 326 /* The next fields are present for IPA v4.2 only */ 330 327 #define BASE_VALUE_FMASK GENMASK(4, 0) 331 328 #define SCALE_FMASK GENMASK(12, 8) 332 329 333 - #define IPA_REG_ENDP_INIT_DEAGGR_N_OFFSET(ep) \ 334 - (0x00000834 + 0x0070 * (ep)) 330 + /* Valid only for TX (IPA consumer) endpoints */ 331 + #define IPA_REG_ENDP_INIT_DEAGGR_N_OFFSET(txep) \ 332 + (0x00000834 + 0x0070 * (txep)) 335 333 #define DEAGGR_HDR_LEN_FMASK GENMASK(5, 0) 336 334 #define PACKET_OFFSET_VALID_FMASK GENMASK(7, 7) 337 335 #define PACKET_OFFSET_LOCATION_FMASK GENMASK(13, 8) ··· 343 337 (0x00000838 + 0x0070 * (ep)) 344 338 #define RSRC_GRP_FMASK GENMASK(1, 0) 345 339 346 - #define IPA_REG_ENDP_INIT_SEQ_N_OFFSET(ep) \ 347 - (0x0000083c + 0x0070 * (ep)) 340 + /* Valid only for TX (IPA consumer) endpoints */ 341 + #define IPA_REG_ENDP_INIT_SEQ_N_OFFSET(txep) \ 342 + (0x0000083c + 0x0070 * (txep)) 348 343 #define HPS_SEQ_TYPE_FMASK GENMASK(3, 0) 349 344 #define DPS_SEQ_TYPE_FMASK GENMASK(7, 4) 350 345 #define HPS_REP_SEQ_TYPE_FMASK GENMASK(11, 8) ··· 359 352 /* The next field is present for IPA v4.0 and above */ 360 353 #define STATUS_PKT_SUPPRESS_FMASK GENMASK(9, 9) 361 354 362 - /* "er" is either an endpoint id (for filters) or a route id (for routes) */ 355 + /* "er" is either an endpoint ID (for filters) or a route ID (for routes) */ 363 356 #define IPA_REG_ENDP_FILTER_ROUTER_HSH_CFG_N_OFFSET(er) \ 364 357 (0x0000085c + 0x0070 * (er)) 365 358 #define FILTER_HASH_MSK_SRC_ID_FMASK GENMASK(0, 0)