Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[ARM] 3620/2: ixp23xx: add uengine loader support

Patch from Lennert Buytenhek

This patch allows the ixp2000 uengine loader that is already in the
tree to also be used on the ixp23xx.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Lennert Buytenhek and committed by
Russell King
8b76a68c 744da2cb

+68 -10
+1
arch/arm/common/Makefile
··· 16 16 obj-$(CONFIG_SHARPSL_PM) += sharpsl_pm.o 17 17 obj-$(CONFIG_SHARP_SCOOP) += scoop.o 18 18 obj-$(CONFIG_ARCH_IXP2000) += uengine.o 19 + obj-$(CONFIG_ARCH_IXP23XX) += uengine.o
+48 -10
arch/arm/common/uengine.c
··· 18 18 #include <linux/module.h> 19 19 #include <linux/string.h> 20 20 #include <asm/hardware.h> 21 - #include <asm/arch/ixp2000-regs.h> 21 + #include <asm/arch/hardware.h> 22 22 #include <asm/hardware/uengine.h> 23 23 #include <asm/io.h> 24 + 25 + #if defined(CONFIG_ARCH_IXP2000) 26 + #define IXP_UENGINE_CSR_VIRT_BASE IXP2000_UENGINE_CSR_VIRT_BASE 27 + #define IXP_PRODUCT_ID IXP2000_PRODUCT_ID 28 + #define IXP_MISC_CONTROL IXP2000_MISC_CONTROL 29 + #define IXP_RESET1 IXP2000_RESET1 30 + #else 31 + #if defined(CONFIG_ARCH_IXP23XX) 32 + #define IXP_UENGINE_CSR_VIRT_BASE IXP23XX_UENGINE_CSR_VIRT_BASE 33 + #define IXP_PRODUCT_ID IXP23XX_PRODUCT_ID 34 + #define IXP_MISC_CONTROL IXP23XX_MISC_CONTROL 35 + #define IXP_RESET1 IXP23XX_RESET1 36 + #else 37 + #error unknown platform 38 + #endif 39 + #endif 24 40 25 41 #define USTORE_ADDRESS 0x000 26 42 #define USTORE_DATA_LOWER 0x004 ··· 59 43 60 44 static void *ixp2000_uengine_csr_area(int uengine) 61 45 { 62 - return ((void *)IXP2000_UENGINE_CSR_VIRT_BASE) + (uengine << 10); 46 + return ((void *)IXP_UENGINE_CSR_VIRT_BASE) + (uengine << 10); 63 47 } 64 48 65 49 /* ··· 107 91 108 92 void ixp2000_uengine_reset(u32 uengine_mask) 109 93 { 110 - ixp2000_reg_wrb(IXP2000_RESET1, uengine_mask & ixp2000_uengine_mask); 111 - ixp2000_reg_wrb(IXP2000_RESET1, 0); 94 + u32 value; 95 + 96 + value = ixp2000_reg_read(IXP_RESET1) & ~ixp2000_uengine_mask; 97 + 98 + uengine_mask &= ixp2000_uengine_mask; 99 + ixp2000_reg_wrb(IXP_RESET1, value | uengine_mask); 100 + ixp2000_reg_wrb(IXP_RESET1, value); 112 101 } 113 102 EXPORT_SYMBOL(ixp2000_uengine_reset); 114 103 ··· 256 235 u32 product_id; 257 236 u32 rev; 258 237 259 - product_id = ixp2000_reg_read(IXP2000_PRODUCT_ID); 238 + product_id = ixp2000_reg_read(IXP_PRODUCT_ID); 260 239 if (((product_id >> 16) & 0x1f) != 0) 261 240 return 0; 262 241 263 242 switch ((product_id >> 8) & 0xff) { 243 + #ifdef CONFIG_ARCH_IXP2000 264 244 case 0: /* IXP2800 */ 265 245 if (!(c->cpu_model_bitmask & 4)) 266 246 return 0; ··· 276 254 if (!(c->cpu_model_bitmask & 2)) 277 255 return 0; 278 256 break; 257 + #endif 258 + 259 + #ifdef CONFIG_ARCH_IXP23XX 260 + case 4: /* IXP23xx */ 261 + if (!(c->cpu_model_bitmask & 0x3f0)) 262 + return 0; 263 + break; 264 + #endif 279 265 280 266 default: 281 267 return 0; ··· 462 432 /* 463 433 * Determine number of microengines present. 464 434 */ 465 - switch ((ixp2000_reg_read(IXP2000_PRODUCT_ID) >> 8) & 0x1fff) { 435 + switch ((ixp2000_reg_read(IXP_PRODUCT_ID) >> 8) & 0x1fff) { 436 + #ifdef CONFIG_ARCH_IXP2000 466 437 case 0: /* IXP2800 */ 467 438 case 1: /* IXP2850 */ 468 439 ixp2000_uengine_mask = 0x00ff00ff; ··· 472 441 case 2: /* IXP2400 */ 473 442 ixp2000_uengine_mask = 0x000f000f; 474 443 break; 444 + #endif 445 + 446 + #ifdef CONFIG_ARCH_IXP23XX 447 + case 4: /* IXP23xx */ 448 + ixp2000_uengine_mask = (*IXP23XX_EXP_CFG_FUSE >> 8) & 0xf; 449 + break; 450 + #endif 475 451 476 452 default: 477 453 printk(KERN_INFO "Detected unknown IXP2000 model (%.8x)\n", 478 - (unsigned int)ixp2000_reg_read(IXP2000_PRODUCT_ID)); 454 + (unsigned int)ixp2000_reg_read(IXP_PRODUCT_ID)); 479 455 ixp2000_uengine_mask = 0x00000000; 480 456 break; 481 457 } ··· 495 457 /* 496 458 * Synchronise timestamp counters across all microengines. 497 459 */ 498 - value = ixp2000_reg_read(IXP2000_MISC_CONTROL); 499 - ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value & ~0x80); 460 + value = ixp2000_reg_read(IXP_MISC_CONTROL); 461 + ixp2000_reg_wrb(IXP_MISC_CONTROL, value & ~0x80); 500 462 for (uengine = 0; uengine < 32; uengine++) { 501 463 if (ixp2000_uengine_mask & (1 << uengine)) { 502 464 ixp2000_uengine_csr_write(uengine, TIMESTAMP_LOW, 0); 503 465 ixp2000_uengine_csr_write(uengine, TIMESTAMP_HIGH, 0); 504 466 } 505 467 } 506 - ixp2000_reg_wrb(IXP2000_MISC_CONTROL, value | 0x80); 468 + ixp2000_reg_wrb(IXP_MISC_CONTROL, value | 0x80); 507 469 508 470 return 0; 509 471 }
+1
arch/arm/mach-ixp23xx/core.c
··· 439 439 440 440 void __init ixp23xx_sys_init(void) 441 441 { 442 + *IXP23XX_EXP_UNIT_FUSE |= 0xf; 442 443 platform_add_devices(ixp23xx_devices, ARRAY_SIZE(ixp23xx_devices)); 443 444 }
+3
include/asm-arm/arch-ixp23xx/ixp23xx.h
··· 124 124 125 125 #define IXP23XX_EXP_UNIT_FUSE IXP23XX_EXP_CFG_REG(0x28) 126 126 #define IXP23XX_EXP_MSF_MUX IXP23XX_EXP_CFG_REG(0x30) 127 + #define IXP23XX_EXP_CFG_FUSE IXP23XX_EXP_CFG_REG(0x34) 127 128 128 129 #define IXP23XX_EXP_BUS_PHYS 0x90000000 129 130 #define IXP23XX_EXP_BUS_WINDOW_SIZE 0x01000000 ··· 265 264 #define IXP23XX_RESET_PCI (1 << 2) 266 265 #define IXP23XX_PCI_UNIT_RESET (1 << 1) 267 266 #define IXP23XX_XSCALE_RESET (1 << 0) 267 + 268 + #define IXP23XX_UENGINE_CSR_VIRT_BASE (IXP23XX_CAP_CSR_VIRT + 0x18000) 268 269 269 270 270 271 /****************************************************************************
+15
include/asm-arm/arch-ixp23xx/platform.h
··· 14 14 15 15 #ifndef __ASSEMBLY__ 16 16 17 + extern inline unsigned long ixp2000_reg_read(volatile void *reg) 18 + { 19 + return *((volatile unsigned long *)reg); 20 + } 21 + 22 + extern inline void ixp2000_reg_write(volatile void *reg, unsigned long val) 23 + { 24 + *((volatile unsigned long *)reg) = val; 25 + } 26 + 27 + extern inline void ixp2000_reg_wrb(volatile void *reg, unsigned long val) 28 + { 29 + *((volatile unsigned long *)reg) = val; 30 + } 31 + 17 32 struct pci_sys_data; 18 33 19 34 void ixp23xx_map_io(void);