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dt-bindings: soc: qcom: Add AOSS QMP binding
Add binding for the QMP based side-channel communication mechanism to
the AOSS, which is used to control resources not exposed through the
RPMh interface.
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
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Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.txt
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Qualcomm Always-On Subsystem side channel binding
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This binding describes the hardware component responsible for side channel
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requests to the always-on subsystem (AOSS), used for certain power management
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requests that is not handled by the standard RPMh interface. Each client in the
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SoC has it's own block of message RAM and IRQ for communication with the AOSS.
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The protocol used to communicate in the message RAM is known as Qualcomm
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Messaging Protocol (QMP)
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The AOSS side channel exposes control over a set of resources, used to control
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a set of debug related clocks and to affect the low power state of resources
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related to the secondary subsystems. These resources are exposed as a set of
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power-domains.
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- compatible:
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Usage: required
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Value type: <string>
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Definition: must be "qcom,sdm845-aoss-qmp"
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: the base address and size of the message RAM for this
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client's communication with the AOSS
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- interrupts:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: should specify the AOSS message IRQ for this client
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- mboxes:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: reference to the mailbox representing the outgoing doorbell
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in APCS for this client, as described in mailbox/mailbox.txt
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- #clock-cells:
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Usage: optional
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Value type: <u32>
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Definition: must be 0
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The single clock represents the QDSS clock.
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- #power-domain-cells:
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Usage: optional
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Value type: <u32>
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Definition: must be 1
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The provided power-domains are:
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CDSP state (0), LPASS state (1), modem state (2), SLPI
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state (3), SPSS state (4) and Venus state (5).
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= SUBNODES
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The AOSS side channel also provides the controls for three cooling devices,
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these are expressed as subnodes of the QMP node. The name of the node is used
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to identify the resource and must therefor be "cx", "mx" or "ebi".
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- #cooling-cells:
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Usage: optional
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Value type: <u32>
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Definition: must be 2
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= EXAMPLE
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The following example represents the AOSS side-channel message RAM and the
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mechanism exposing the power-domains, as found in SDM845.
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aoss_qmp: qmp@c300000 {
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compatible = "qcom,sdm845-aoss-qmp";
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reg = <0x0c300000 0x100000>;
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interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
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mboxes = <&apss_shared 0>;
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#power-domain-cells = <1>;
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cx_cdev: cx {
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#cooling-cells = <2>;
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};
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mx_cdev: mx {
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#cooling-cells = <2>;
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};
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};
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include/dt-bindings/power/qcom-aoss-qmp.h
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include/dt-bindings/power/qcom-aoss-qmp.h
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Linaro Ltd. */
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#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H
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#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H
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#define AOSS_QMP_LS_CDSP 0
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#define AOSS_QMP_LS_LPASS 1
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#define AOSS_QMP_LS_MODEM 2
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#define AOSS_QMP_LS_SLPI 3
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#define AOSS_QMP_LS_SPSS 4
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#define AOSS_QMP_LS_VENUS 5
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#endif