Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: at91: sckc: switch to parent_data/parent_hw

Switch slow clock drivers to use parent_data and parent_hw.
With this parent-child relation is described with pointers rather
than strings.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Reviewed-by: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230615093227.576102-10-claudiu.beznea@microchip.com

+48 -27
+48 -27
drivers/clk/at91/sckc.c
··· 117 117 static struct clk_hw * __init 118 118 at91_clk_register_slow_osc(void __iomem *sckcr, 119 119 const char *name, 120 - const char *parent_name, 120 + const struct clk_parent_data *parent_data, 121 121 unsigned long startup, 122 122 bool bypass, 123 123 const struct clk_slow_bits *bits) 124 124 { 125 125 struct clk_slow_osc *osc; 126 126 struct clk_hw *hw; 127 - struct clk_init_data init; 127 + struct clk_init_data init = {}; 128 128 int ret; 129 129 130 - if (!sckcr || !name || !parent_name) 130 + if (!sckcr || !name || !parent_data) 131 131 return ERR_PTR(-EINVAL); 132 132 133 133 osc = kzalloc(sizeof(*osc), GFP_KERNEL); ··· 136 136 137 137 init.name = name; 138 138 init.ops = &slow_osc_ops; 139 - init.parent_names = &parent_name; 139 + init.parent_data = parent_data; 140 140 init.num_parents = 1; 141 141 init.flags = CLK_IGNORE_UNUSED; 142 142 ··· 317 317 static struct clk_hw * __init 318 318 at91_clk_register_sam9x5_slow(void __iomem *sckcr, 319 319 const char *name, 320 - const char **parent_names, 320 + const struct clk_hw **parent_hws, 321 321 int num_parents, 322 322 const struct clk_slow_bits *bits) 323 323 { 324 324 struct clk_sam9x5_slow *slowck; 325 325 struct clk_hw *hw; 326 - struct clk_init_data init; 326 + struct clk_init_data init = {}; 327 327 int ret; 328 328 329 - if (!sckcr || !name || !parent_names || !num_parents) 329 + if (!sckcr || !name || !parent_hws || !num_parents) 330 330 return ERR_PTR(-EINVAL); 331 331 332 332 slowck = kzalloc(sizeof(*slowck), GFP_KERNEL); ··· 335 335 336 336 init.name = name; 337 337 init.ops = &sam9x5_slow_ops; 338 - init.parent_names = parent_names; 338 + init.parent_hws = parent_hws; 339 339 init.num_parents = num_parents; 340 340 init.flags = 0; 341 341 ··· 366 366 unsigned int rc_osc_startup_us, 367 367 const struct clk_slow_bits *bits) 368 368 { 369 - const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; 370 369 void __iomem *regbase = of_iomap(np, 0); 371 370 struct device_node *child = NULL; 372 371 const char *xtal_name; 373 372 struct clk_hw *slow_rc, *slow_osc, *slowck; 373 + static struct clk_parent_data parent_data = { 374 + .name = "slow_xtal", 375 + }; 376 + const struct clk_hw *parent_hws[2]; 374 377 bool bypass; 375 378 int ret; 376 379 377 380 if (!regbase) 378 381 return; 379 382 380 - slow_rc = at91_clk_register_slow_rc_osc(regbase, parent_names[0], 383 + slow_rc = at91_clk_register_slow_rc_osc(regbase, "slow_rc_osc", 381 384 32768, 50000000, 382 385 rc_osc_startup_us, bits); 383 386 if (IS_ERR(slow_rc)) ··· 404 401 if (!xtal_name) 405 402 goto unregister_slow_rc; 406 403 407 - slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], 408 - xtal_name, 1200000, bypass, bits); 404 + parent_data.fw_name = xtal_name; 405 + 406 + slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", 407 + &parent_data, 1200000, bypass, bits); 409 408 if (IS_ERR(slow_osc)) 410 409 goto unregister_slow_rc; 411 410 412 - slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_names, 411 + parent_hws[0] = slow_rc; 412 + parent_hws[1] = slow_osc; 413 + slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", parent_hws, 413 414 2, bits); 414 415 if (IS_ERR(slowck)) 415 416 goto unregister_slow_osc; ··· 471 464 struct clk_hw_onecell_data *clk_data; 472 465 struct clk_hw *slow_rc, *slow_osc; 473 466 const char *xtal_name; 474 - const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; 467 + const struct clk_hw *parent_hws[2]; 468 + static struct clk_parent_data parent_data = { 469 + .name = "slow_xtal", 470 + }; 475 471 bool bypass; 476 472 int ret; 477 473 478 474 if (!regbase) 479 475 return; 480 476 481 - slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, parent_names[0], 477 + slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, "slow_rc_osc", 482 478 NULL, 0, 32768, 483 479 93750000); 484 480 if (IS_ERR(slow_rc)) ··· 491 481 if (!xtal_name) 492 482 goto unregister_slow_rc; 493 483 484 + parent_data.fw_name = xtal_name; 494 485 bypass = of_property_read_bool(np, "atmel,osc-bypass"); 495 - slow_osc = at91_clk_register_slow_osc(regbase, parent_names[1], 496 - xtal_name, 5000000, bypass, 486 + slow_osc = at91_clk_register_slow_osc(regbase, "slow_osc", 487 + &parent_data, 5000000, bypass, 497 488 &at91sam9x60_bits); 498 489 if (IS_ERR(slow_osc)) 499 490 goto unregister_slow_rc; ··· 505 494 506 495 /* MD_SLCK and TD_SLCK. */ 507 496 clk_data->num = 2; 508 - clk_data->hws[0] = clk_hw_register_fixed_rate(NULL, "md_slck", 509 - parent_names[0], 510 - 0, 32768); 497 + clk_data->hws[0] = clk_hw_register_fixed_rate_parent_hw(NULL, "md_slck", 498 + slow_rc, 499 + 0, 32768); 511 500 if (IS_ERR(clk_data->hws[0])) 512 501 goto clk_data_free; 513 502 503 + parent_hws[0] = slow_rc; 504 + parent_hws[1] = slow_osc; 514 505 clk_data->hws[1] = at91_clk_register_sam9x5_slow(regbase, "td_slck", 515 - parent_names, 2, 506 + parent_hws, 2, 516 507 &at91sam9x60_bits); 517 508 if (IS_ERR(clk_data->hws[1])) 518 509 goto unregister_md_slck; ··· 585 572 void __iomem *regbase = of_iomap(np, 0); 586 573 struct clk_hw *slow_rc, *slowck; 587 574 struct clk_sama5d4_slow_osc *osc; 588 - struct clk_init_data init; 575 + struct clk_init_data init = {}; 589 576 const char *xtal_name; 590 - const char *parent_names[2] = { "slow_rc_osc", "slow_osc" }; 577 + const struct clk_hw *parent_hws[2]; 578 + static struct clk_parent_data parent_data = { 579 + .name = "slow_xtal", 580 + }; 591 581 int ret; 592 582 593 583 if (!regbase) 594 584 return; 595 585 596 586 slow_rc = clk_hw_register_fixed_rate_with_accuracy(NULL, 597 - parent_names[0], 587 + "slow_rc_osc", 598 588 NULL, 0, 32768, 599 589 250000000); 600 590 if (IS_ERR(slow_rc)) 601 591 return; 602 592 603 593 xtal_name = of_clk_get_parent_name(np, 0); 594 + if (!xtal_name) 595 + goto unregister_slow_rc; 596 + parent_data.fw_name = xtal_name; 604 597 605 598 osc = kzalloc(sizeof(*osc), GFP_KERNEL); 606 599 if (!osc) 607 600 goto unregister_slow_rc; 608 601 609 - init.name = parent_names[1]; 602 + init.name = "slow_osc"; 610 603 init.ops = &sama5d4_slow_osc_ops; 611 - init.parent_names = &xtal_name; 604 + init.parent_data = &parent_data; 612 605 init.num_parents = 1; 613 606 init.flags = CLK_IGNORE_UNUSED; 614 607 ··· 627 608 if (ret) 628 609 goto free_slow_osc_data; 629 610 611 + parent_hws[0] = slow_rc; 612 + parent_hws[1] = &osc->hw; 630 613 slowck = at91_clk_register_sam9x5_slow(regbase, "slowck", 631 - parent_names, 2, 614 + parent_hws, 2, 632 615 &at91sama5d4_bits); 633 616 if (IS_ERR(slowck)) 634 617 goto unregister_slow_osc;