tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
perf tests: Add attr stat default test
Adding test to validate perf_event_attr data for commands:
'stat -d'
'stat -dd'
'stat -ddd'
Signed-off-by: Jiri Olsa <jolsa@redhat.com>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1351634526-1516-24-git-send-email-jolsa@redhat.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
authored by
Jiri Olsa
and committed by
Arnaldo Carvalho de Melo
8a6408a0
149960a0
+429
+101
tools/perf/tests/attr/test-stat-detailed-1
+101
tools/perf/tests/attr/test-stat-detailed-1
···
1
+
[config]
2
+
command = stat
3
+
args = -d kill >/dev/null 2>&1
4
+
ret = 1
5
+
6
+
7
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_TASK_CLOCK
8
+
[event1:base-stat]
9
+
fd=1
10
+
type=1
11
+
config=1
12
+
13
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CONTEXT_SWITCHES
14
+
[event2:base-stat]
15
+
fd=2
16
+
type=1
17
+
config=3
18
+
19
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CPU_MIGRATIONS
20
+
[event3:base-stat]
21
+
fd=3
22
+
type=1
23
+
config=4
24
+
25
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_PAGE_FAULTS
26
+
[event4:base-stat]
27
+
fd=4
28
+
type=1
29
+
config=2
30
+
31
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_CPU_CYCLES
32
+
[event5:base-stat]
33
+
fd=5
34
+
type=0
35
+
config=0
36
+
37
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
38
+
[event6:base-stat]
39
+
fd=6
40
+
type=0
41
+
config=7
42
+
43
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_BACKEND
44
+
[event7:base-stat]
45
+
fd=7
46
+
type=0
47
+
config=8
48
+
49
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_INSTRUCTIONS
50
+
[event8:base-stat]
51
+
fd=8
52
+
type=0
53
+
config=1
54
+
55
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_INSTRUCTIONS
56
+
[event9:base-stat]
57
+
fd=9
58
+
type=0
59
+
config=4
60
+
61
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_MISSES
62
+
[event10:base-stat]
63
+
fd=10
64
+
type=0
65
+
config=5
66
+
67
+
# PERF_TYPE_HW_CACHE /
68
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
69
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
70
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
71
+
[event11:base-stat]
72
+
fd=11
73
+
type=3
74
+
config=0
75
+
76
+
# PERF_TYPE_HW_CACHE /
77
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
78
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
79
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
80
+
[event12:base-stat]
81
+
fd=12
82
+
type=3
83
+
config=65536
84
+
85
+
# PERF_TYPE_HW_CACHE /
86
+
# PERF_COUNT_HW_CACHE_LL << 0 |
87
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
88
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
89
+
[event13:base-stat]
90
+
fd=13
91
+
type=3
92
+
config=2
93
+
94
+
# PERF_TYPE_HW_CACHE,
95
+
# PERF_COUNT_HW_CACHE_LL << 0 |
96
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
97
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
98
+
[event14:base-stat]
99
+
fd=14
100
+
type=3
101
+
config=65538
+155
tools/perf/tests/attr/test-stat-detailed-2
+155
tools/perf/tests/attr/test-stat-detailed-2
···
1
+
[config]
2
+
command = stat
3
+
args = -dd kill >/dev/null 2>&1
4
+
ret = 1
5
+
6
+
7
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_TASK_CLOCK
8
+
[event1:base-stat]
9
+
fd=1
10
+
type=1
11
+
config=1
12
+
13
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CONTEXT_SWITCHES
14
+
[event2:base-stat]
15
+
fd=2
16
+
type=1
17
+
config=3
18
+
19
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CPU_MIGRATIONS
20
+
[event3:base-stat]
21
+
fd=3
22
+
type=1
23
+
config=4
24
+
25
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_PAGE_FAULTS
26
+
[event4:base-stat]
27
+
fd=4
28
+
type=1
29
+
config=2
30
+
31
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_CPU_CYCLES
32
+
[event5:base-stat]
33
+
fd=5
34
+
type=0
35
+
config=0
36
+
37
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
38
+
[event6:base-stat]
39
+
fd=6
40
+
type=0
41
+
config=7
42
+
43
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_BACKEND
44
+
[event7:base-stat]
45
+
fd=7
46
+
type=0
47
+
config=8
48
+
49
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_INSTRUCTIONS
50
+
[event8:base-stat]
51
+
fd=8
52
+
type=0
53
+
config=1
54
+
55
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_INSTRUCTIONS
56
+
[event9:base-stat]
57
+
fd=9
58
+
type=0
59
+
config=4
60
+
61
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_MISSES
62
+
[event10:base-stat]
63
+
fd=10
64
+
type=0
65
+
config=5
66
+
67
+
# PERF_TYPE_HW_CACHE /
68
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
69
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
70
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
71
+
[event11:base-stat]
72
+
fd=11
73
+
type=3
74
+
config=0
75
+
76
+
# PERF_TYPE_HW_CACHE /
77
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
78
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
79
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
80
+
[event12:base-stat]
81
+
fd=12
82
+
type=3
83
+
config=65536
84
+
85
+
# PERF_TYPE_HW_CACHE /
86
+
# PERF_COUNT_HW_CACHE_LL << 0 |
87
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
88
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
89
+
[event13:base-stat]
90
+
fd=13
91
+
type=3
92
+
config=2
93
+
94
+
# PERF_TYPE_HW_CACHE,
95
+
# PERF_COUNT_HW_CACHE_LL << 0 |
96
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
97
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
98
+
[event14:base-stat]
99
+
fd=14
100
+
type=3
101
+
config=65538
102
+
103
+
# PERF_TYPE_HW_CACHE,
104
+
# PERF_COUNT_HW_CACHE_L1I << 0 |
105
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
106
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
107
+
[event15:base-stat]
108
+
fd=15
109
+
type=3
110
+
config=1
111
+
112
+
# PERF_TYPE_HW_CACHE,
113
+
# PERF_COUNT_HW_CACHE_L1I << 0 |
114
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
115
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
116
+
[event16:base-stat]
117
+
fd=16
118
+
type=3
119
+
config=65537
120
+
121
+
# PERF_TYPE_HW_CACHE,
122
+
# PERF_COUNT_HW_CACHE_DTLB << 0 |
123
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
124
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
125
+
[event17:base-stat]
126
+
fd=17
127
+
type=3
128
+
config=3
129
+
130
+
# PERF_TYPE_HW_CACHE,
131
+
# PERF_COUNT_HW_CACHE_DTLB << 0 |
132
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
133
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
134
+
[event18:base-stat]
135
+
fd=18
136
+
type=3
137
+
config=65539
138
+
139
+
# PERF_TYPE_HW_CACHE,
140
+
# PERF_COUNT_HW_CACHE_ITLB << 0 |
141
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
142
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
143
+
[event19:base-stat]
144
+
fd=19
145
+
type=3
146
+
config=4
147
+
148
+
# PERF_TYPE_HW_CACHE,
149
+
# PERF_COUNT_HW_CACHE_ITLB << 0 |
150
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
151
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
152
+
[event20:base-stat]
153
+
fd=20
154
+
type=3
155
+
config=65540
+173
tools/perf/tests/attr/test-stat-detailed-3
+173
tools/perf/tests/attr/test-stat-detailed-3
···
1
+
[config]
2
+
command = stat
3
+
args = -ddd kill >/dev/null 2>&1
4
+
ret = 1
5
+
6
+
7
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_TASK_CLOCK
8
+
[event1:base-stat]
9
+
fd=1
10
+
type=1
11
+
config=1
12
+
13
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CONTEXT_SWITCHES
14
+
[event2:base-stat]
15
+
fd=2
16
+
type=1
17
+
config=3
18
+
19
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_CPU_MIGRATIONS
20
+
[event3:base-stat]
21
+
fd=3
22
+
type=1
23
+
config=4
24
+
25
+
# PERF_TYPE_SOFTWARE / PERF_COUNT_SW_PAGE_FAULTS
26
+
[event4:base-stat]
27
+
fd=4
28
+
type=1
29
+
config=2
30
+
31
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_CPU_CYCLES
32
+
[event5:base-stat]
33
+
fd=5
34
+
type=0
35
+
config=0
36
+
37
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_FRONTEND
38
+
[event6:base-stat]
39
+
fd=6
40
+
type=0
41
+
config=7
42
+
43
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_STALLED_CYCLES_BACKEND
44
+
[event7:base-stat]
45
+
fd=7
46
+
type=0
47
+
config=8
48
+
49
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_INSTRUCTIONS
50
+
[event8:base-stat]
51
+
fd=8
52
+
type=0
53
+
config=1
54
+
55
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_INSTRUCTIONS
56
+
[event9:base-stat]
57
+
fd=9
58
+
type=0
59
+
config=4
60
+
61
+
# PERF_TYPE_HARDWARE / PERF_COUNT_HW_BRANCH_MISSES
62
+
[event10:base-stat]
63
+
fd=10
64
+
type=0
65
+
config=5
66
+
67
+
# PERF_TYPE_HW_CACHE /
68
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
69
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
70
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
71
+
[event11:base-stat]
72
+
fd=11
73
+
type=3
74
+
config=0
75
+
76
+
# PERF_TYPE_HW_CACHE /
77
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
78
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
79
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
80
+
[event12:base-stat]
81
+
fd=12
82
+
type=3
83
+
config=65536
84
+
85
+
# PERF_TYPE_HW_CACHE /
86
+
# PERF_COUNT_HW_CACHE_LL << 0 |
87
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
88
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
89
+
[event13:base-stat]
90
+
fd=13
91
+
type=3
92
+
config=2
93
+
94
+
# PERF_TYPE_HW_CACHE,
95
+
# PERF_COUNT_HW_CACHE_LL << 0 |
96
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
97
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
98
+
[event14:base-stat]
99
+
fd=14
100
+
type=3
101
+
config=65538
102
+
103
+
# PERF_TYPE_HW_CACHE,
104
+
# PERF_COUNT_HW_CACHE_L1I << 0 |
105
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
106
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
107
+
[event15:base-stat]
108
+
fd=15
109
+
type=3
110
+
config=1
111
+
112
+
# PERF_TYPE_HW_CACHE,
113
+
# PERF_COUNT_HW_CACHE_L1I << 0 |
114
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
115
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
116
+
[event16:base-stat]
117
+
fd=16
118
+
type=3
119
+
config=65537
120
+
121
+
# PERF_TYPE_HW_CACHE,
122
+
# PERF_COUNT_HW_CACHE_DTLB << 0 |
123
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
124
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
125
+
[event17:base-stat]
126
+
fd=17
127
+
type=3
128
+
config=3
129
+
130
+
# PERF_TYPE_HW_CACHE,
131
+
# PERF_COUNT_HW_CACHE_DTLB << 0 |
132
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
133
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
134
+
[event18:base-stat]
135
+
fd=18
136
+
type=3
137
+
config=65539
138
+
139
+
# PERF_TYPE_HW_CACHE,
140
+
# PERF_COUNT_HW_CACHE_ITLB << 0 |
141
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
142
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
143
+
[event19:base-stat]
144
+
fd=19
145
+
type=3
146
+
config=4
147
+
148
+
# PERF_TYPE_HW_CACHE,
149
+
# PERF_COUNT_HW_CACHE_ITLB << 0 |
150
+
# (PERF_COUNT_HW_CACHE_OP_READ << 8) |
151
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
152
+
[event20:base-stat]
153
+
fd=20
154
+
type=3
155
+
config=65540
156
+
157
+
# PERF_TYPE_HW_CACHE,
158
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
159
+
# (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
160
+
# (PERF_COUNT_HW_CACHE_RESULT_ACCESS << 16)
161
+
[event21:base-stat]
162
+
fd=21
163
+
type=3
164
+
config=512
165
+
166
+
# PERF_TYPE_HW_CACHE,
167
+
# PERF_COUNT_HW_CACHE_L1D << 0 |
168
+
# (PERF_COUNT_HW_CACHE_OP_PREFETCH << 8) |
169
+
# (PERF_COUNT_HW_CACHE_RESULT_MISS << 16)
170
+
[event22:base-stat]
171
+
fd=22
172
+
type=3
173
+
config=66048