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kernel os linux

ARM: dts: Update BCM47622 DTS file

Fix a few issue in bcm47622.dtsi file:
- Remove unnecessary cpu_on and cpu_off properties from psci node
- Add the missing gic registers and interrupts property to gic node
- Cosmetic changes

Signed-off-by: William Zhang <william.zhang@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>

authored by

William Zhang and committed by
Florian Fainelli
8a3ed46f de1a99ac

+9 -5
+9 -5
arch/arm/boot/dts/bcm47622.dtsi
··· 32 32 next-level-cache = <&L2_0>; 33 33 enable-method = "psci"; 34 34 }; 35 + 35 36 CA7_2: cpu@2 { 36 37 device_type = "cpu"; 37 38 compatible = "arm,cortex-a7"; ··· 40 39 next-level-cache = <&L2_0>; 41 40 enable-method = "psci"; 42 41 }; 42 + 43 43 CA7_3: cpu@3 { 44 44 device_type = "cpu"; 45 45 compatible = "arm,cortex-a7"; ··· 48 46 next-level-cache = <&L2_0>; 49 47 enable-method = "psci"; 50 48 }; 49 + 51 50 L2_0: l2-cache0 { 52 51 compatible = "cache"; 53 52 }; ··· 79 76 #clock-cells = <0>; 80 77 clock-frequency = <200000000>; 81 78 }; 79 + 82 80 uart_clk: uart-clk { 83 81 compatible = "fixed-factor-clock"; 84 82 #clock-cells = <0>; ··· 92 88 psci { 93 89 compatible = "arm,psci-0.2"; 94 90 method = "smc"; 95 - cpu_off = <1>; 96 - cpu_on = <2>; 97 91 }; 98 92 99 93 axi@81000000 { 100 94 compatible = "simple-bus"; 101 95 #address-cells = <1>; 102 96 #size-cells = <1>; 103 - ranges = <0 0x81000000 0x818000>; 97 + ranges = <0 0x81000000 0x8000>; 104 98 105 99 gic: interrupt-controller@1000 { 106 100 compatible = "arm,cortex-a7-gic"; 107 101 #interrupt-cells = <3>; 108 - #address-cells = <0>; 109 102 interrupt-controller; 103 + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 110 104 reg = <0x1000 0x1000>, 111 - <0x2000 0x2000>; 105 + <0x2000 0x2000>, 106 + <0x4000 0x2000>, 107 + <0x6000 0x2000>; 112 108 }; 113 109 }; 114 110