···13311331#define MDIO_VEND2_PMA_CDR_CONTROL 0x805613321332#endif1333133313341334+#ifndef MDIO_VEND2_PMA_MISC_CTRL013351335+#define MDIO_VEND2_PMA_MISC_CTRL0 0x809013361336+#endif13371337+13341338#ifndef MDIO_CTRL1_SPEED1G13351339#define MDIO_CTRL1_SPEED1G (MDIO_CTRL1_SPEED10G & ~BMCR_SPEED100)13361340#endif···13921388#define XGBE_PMA_RX_RST_0_MASK BIT(4)13931389#define XGBE_PMA_RX_RST_0_RESET_ON 0x1013941390#define XGBE_PMA_RX_RST_0_RESET_OFF 0x0013911391+13921392+#define XGBE_PMA_PLL_CTRL_MASK BIT(15)13931393+#define XGBE_PMA_PLL_CTRL_ENABLE BIT(15)13941394+#define XGBE_PMA_PLL_CTRL_DISABLE 0x00001395139513961396/* Bit setting and getting macros13971397 * The get macro will extract the current bit field value from within
+19-1
drivers/net/ethernet/amd/xgbe/xgbe-phy-v2.c
···19771977 }19781978}1979197919801980+static void xgbe_phy_pll_ctrl(struct xgbe_prv_data *pdata, bool enable)19811981+{19821982+ XMDIO_WRITE_BITS(pdata, MDIO_MMD_PMAPMD, MDIO_VEND2_PMA_MISC_CTRL0,19831983+ XGBE_PMA_PLL_CTRL_MASK,19841984+ enable ? XGBE_PMA_PLL_CTRL_ENABLE19851985+ : XGBE_PMA_PLL_CTRL_DISABLE);19861986+19871987+ /* Wait for command to complete */19881988+ usleep_range(100, 200);19891989+}19901990+19801991static void xgbe_phy_perform_ratechange(struct xgbe_prv_data *pdata,19811992 unsigned int cmd, unsigned int sub_cmd)19821993{19831994 unsigned int s0 = 0;19841995 unsigned int wait;19961996+19971997+ /* Disable PLL re-initialization during FW command processing */19981998+ xgbe_phy_pll_ctrl(pdata, false);1985199919862000 /* Log if a previous command did not complete */19872001 if (XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS)) {···20172003 wait = XGBE_RATECHANGE_COUNT;20182004 while (wait--) {20192005 if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))20202020- return;20062006+ goto reenable_pll;2021200720222008 usleep_range(1000, 2000);20232009 }···2027201320282014 /* Reset on error */20292015 xgbe_phy_rx_reset(pdata);20162016+20172017+reenable_pll:20182018+ /* Enable PLL re-initialization */20192019+ xgbe_phy_pll_ctrl(pdata, true);20302020}2031202120322022static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)
+12-9
drivers/net/ethernet/ibm/ibmvnic.c
···19141914 ind_bufp = &tx_scrq->ind_buf;1915191519161916 if (test_bit(0, &adapter->resetting)) {19171917- if (!netif_subqueue_stopped(netdev, skb))19181918- netif_stop_subqueue(netdev, queue_num);19191917 dev_kfree_skb_any(skb);1920191819211919 tx_send_failed++;···2755275727562758 if (adapter->state == VNIC_PROBING) {27572759 netdev_warn(netdev, "Adapter reset during probe\n");27582758- adapter->init_done_rc = EAGAIN;27602760+ adapter->init_done_rc = -EAGAIN;27592761 ret = EAGAIN;27602762 goto err;27612763 }···52575259 */52585260 adapter->login_pending = false;5259526152605260- if (!completion_done(&adapter->init_done)) {52615261- complete(&adapter->init_done);52625262- adapter->init_done_rc = -EIO;52635263- }52645264-52655262 if (adapter->state == VNIC_DOWN)52665263 rc = ibmvnic_reset(adapter, VNIC_RESET_PASSIVE_INIT);52675264 else···52775284 rc);52785285 adapter->failover_pending = false;52795286 }52875287+52885288+ if (!completion_done(&adapter->init_done)) {52895289+ complete(&adapter->init_done);52905290+ if (!adapter->init_done_rc)52915291+ adapter->init_done_rc = -EAGAIN;52925292+ }52935293+52805294 break;52815295 case IBMVNIC_CRQ_INIT_COMPLETE:52825296 dev_info(dev, "Partner initialization complete\n");···56045604 crq->cur = 0;56055605 spin_lock_init(&crq->lock);5606560656075607+ /* process any CRQs that were queued before we enabled interrupts */56085608+ tasklet_schedule(&adapter->tasklet);56095609+56075610 return retrc;5608561156095612req_irq_failed:···57565753 }5757575457585755 rc = ibmvnic_reset_init(adapter, false);57595759- } while (rc == EAGAIN);57565756+ } while (rc == -EAGAIN);5760575757615758 /* We are ignoring the error from ibmvnic_reset_init() assuming that the57625759 * partner is not ready. CRQ is not active. When the partner becomes
···482482 local X=("192.0.2.20" "192.0.2.30")483483484484 # GMI should be 3 seconds485485- ip link set dev br0 type bridge mcast_query_interval 100 mcast_query_response_interval 100485485+ ip link set dev br0 type bridge mcast_query_interval 100 \486486+ mcast_query_response_interval 100 \487487+ mcast_membership_interval 300486488487489 v3exclude_prepare $h1 $ALL_MAC $ALL_GROUP488488- ip link set dev br0 type bridge mcast_query_interval 500 mcast_query_response_interval 500490490+ ip link set dev br0 type bridge mcast_query_interval 500 \491491+ mcast_query_response_interval 500 \492492+ mcast_membership_interval 1500493493+489494 $MZ $h1 -c 1 -b $ALL_MAC -B $ALL_GROUP -t ip "proto=2,p=$MZPKT_ALLOW2" -q490495 sleep 3491496 bridge -j -d -s mdb show dev br0 \···522517 log_test "IGMPv3 group $TEST_GROUP exclude timeout"523518524519 ip link set dev br0 type bridge mcast_query_interval 12500 \525525- mcast_query_response_interval 1000520520+ mcast_query_response_interval 1000 \521521+ mcast_membership_interval 26000526522527523 v3cleanup $swp1 $TEST_GROUP528524}
···479479 local X=("2001:db8:1::20" "2001:db8:1::30")480480481481 # GMI should be 3 seconds482482- ip link set dev br0 type bridge mcast_query_interval 100 mcast_query_response_interval 100482482+ ip link set dev br0 type bridge mcast_query_interval 100 \483483+ mcast_query_response_interval 100 \484484+ mcast_membership_interval 300483485484486 mldv2exclude_prepare $h1485485- ip link set dev br0 type bridge mcast_query_interval 500 mcast_query_response_interval 500487487+ ip link set dev br0 type bridge mcast_query_interval 500 \488488+ mcast_query_response_interval 500 \489489+ mcast_membership_interval 1500490490+486491 $MZ $h1 -c 1 $MZPKT_ALLOW2 -q487492 sleep 3488493 bridge -j -d -s mdb show dev br0 \···519514 log_test "MLDv2 group $TEST_GROUP exclude timeout"520515521516 ip link set dev br0 type bridge mcast_query_interval 12500 \522522- mcast_query_response_interval 1000517517+ mcast_query_response_interval 1000 \518518+ mcast_membership_interval 26000523519524520 mldv2cleanup $swp1525521}