Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'gpio-reserved-ranges' into devel

+167 -11
+4 -3
Documentation/devicetree/bindings/gpio/gpio.txt
··· 151 151 first 18 GPIOs, at local offset 0 .. 17, are in use. 152 152 153 153 If these GPIOs do not happen to be the first N GPIOs at offset 0...N-1, an 154 - additional bitmask is needed to specify which GPIOs are actually in use, 155 - and which are dummies. The bindings for this case has not yet been 156 - specified, but should be specified if/when such hardware appears. 154 + additional set of tuples is needed to specify which GPIOs are unusable, with 155 + the gpio-reserved-ranges binding. This property indicates the start and size 156 + of the GPIOs that can't be used. 157 157 158 158 Optionally, a GPIO controller may have a "gpio-line-names" property. This is 159 159 an array of strings defining the names of the GPIO lines going out of the ··· 178 178 gpio-controller; 179 179 #gpio-cells = <2>; 180 180 ngpios = <18>; 181 + gpio-reserved-ranges = <0 4>, <12 2>; 181 182 gpio-line-names = "MMC-CD", "MMC-WP", "VDD eth", "RST eth", "LED R", 182 183 "LED G", "LED B", "Col A", "Col B", "Col C", "Col D", 183 184 "Row A", "Row B", "Row C", "Row D", "NMI button",
+24
drivers/gpio/gpiolib-of.c
··· 511 511 } 512 512 EXPORT_SYMBOL(of_mm_gpiochip_remove); 513 513 514 + static void of_gpiochip_init_valid_mask(struct gpio_chip *chip) 515 + { 516 + int len, i; 517 + u32 start, count; 518 + struct device_node *np = chip->of_node; 519 + 520 + len = of_property_count_u32_elems(np, "gpio-reserved-ranges"); 521 + if (len < 0 || len % 2 != 0) 522 + return; 523 + 524 + for (i = 0; i < len; i += 2) { 525 + of_property_read_u32_index(np, "gpio-reserved-ranges", 526 + i, &start); 527 + of_property_read_u32_index(np, "gpio-reserved-ranges", 528 + i + 1, &count); 529 + if (start >= chip->ngpio || start + count >= chip->ngpio) 530 + continue; 531 + 532 + bitmap_clear(chip->valid_mask, start, count); 533 + } 534 + }; 535 + 514 536 #ifdef CONFIG_PINCTRL 515 537 static int of_gpiochip_add_pin_range(struct gpio_chip *chip) 516 538 { ··· 636 614 637 615 if (chip->of_gpio_n_cells > MAX_PHANDLE_ARGS) 638 616 return -EINVAL; 617 + 618 + of_gpiochip_init_valid_mask(chip); 639 619 640 620 status = of_gpiochip_add_pin_range(chip); 641 621 if (status)
+61 -5
drivers/gpio/gpiolib.c
··· 337 337 return 0; 338 338 } 339 339 340 + static unsigned long *gpiochip_allocate_mask(struct gpio_chip *chip) 341 + { 342 + unsigned long *p; 343 + 344 + p = kmalloc_array(BITS_TO_LONGS(chip->ngpio), sizeof(*p), GFP_KERNEL); 345 + if (!p) 346 + return NULL; 347 + 348 + /* Assume by default all GPIOs are valid */ 349 + bitmap_fill(p, chip->ngpio); 350 + 351 + return p; 352 + } 353 + 354 + static int gpiochip_init_valid_mask(struct gpio_chip *gpiochip) 355 + { 356 + #ifdef CONFIG_OF_GPIO 357 + int size; 358 + struct device_node *np = gpiochip->of_node; 359 + 360 + size = of_property_count_u32_elems(np, "gpio-reserved-ranges"); 361 + if (size > 0 && size % 2 == 0) 362 + gpiochip->need_valid_mask = true; 363 + #endif 364 + 365 + if (!gpiochip->need_valid_mask) 366 + return 0; 367 + 368 + gpiochip->valid_mask = gpiochip_allocate_mask(gpiochip); 369 + if (!gpiochip->valid_mask) 370 + return -ENOMEM; 371 + 372 + return 0; 373 + } 374 + 375 + static void gpiochip_free_valid_mask(struct gpio_chip *gpiochip) 376 + { 377 + kfree(gpiochip->valid_mask); 378 + gpiochip->valid_mask = NULL; 379 + } 380 + 381 + bool gpiochip_line_is_valid(const struct gpio_chip *gpiochip, 382 + unsigned int offset) 383 + { 384 + /* No mask means all valid */ 385 + if (likely(!gpiochip->valid_mask)) 386 + return true; 387 + return test_bit(offset, gpiochip->valid_mask); 388 + } 389 + EXPORT_SYMBOL_GPL(gpiochip_line_is_valid); 390 + 340 391 /* 341 392 * GPIO line handle management 342 393 */ ··· 1312 1261 if (status) 1313 1262 goto err_remove_from_list; 1314 1263 1264 + status = gpiochip_init_valid_mask(chip); 1265 + if (status) 1266 + goto err_remove_irqchip_mask; 1267 + 1315 1268 status = gpiochip_add_irqchip(chip, lock_key, request_key); 1316 1269 if (status) 1317 1270 goto err_remove_chip; ··· 1345 1290 acpi_gpiochip_remove(chip); 1346 1291 gpiochip_free_hogs(chip); 1347 1292 of_gpiochip_remove(chip); 1293 + gpiochip_free_valid_mask(chip); 1294 + err_remove_irqchip_mask: 1348 1295 gpiochip_irqchip_free_valid_mask(chip); 1349 1296 err_remove_from_list: 1350 1297 spin_lock_irqsave(&gpio_lock, flags); ··· 1403 1346 acpi_gpiochip_remove(chip); 1404 1347 gpiochip_remove_pin_ranges(chip); 1405 1348 of_gpiochip_remove(chip); 1349 + gpiochip_free_valid_mask(chip); 1406 1350 /* 1407 1351 * We accept no more calls into the driver from this point, so 1408 1352 * NULL the driver data pointer ··· 1564 1506 if (!gpiochip->irq.need_valid_mask) 1565 1507 return 0; 1566 1508 1567 - gpiochip->irq.valid_mask = kcalloc(BITS_TO_LONGS(gpiochip->ngpio), 1568 - sizeof(long), GFP_KERNEL); 1509 + gpiochip->irq.valid_mask = gpiochip_allocate_mask(gpiochip); 1569 1510 if (!gpiochip->irq.valid_mask) 1570 1511 return -ENOMEM; 1571 - 1572 - /* Assume by default all GPIOs are valid */ 1573 - bitmap_fill(gpiochip->irq.valid_mask, gpiochip->ngpio); 1574 1512 1575 1513 return 0; 1576 1514 } ··· 1580 1526 bool gpiochip_irqchip_irq_valid(const struct gpio_chip *gpiochip, 1581 1527 unsigned int offset) 1582 1528 { 1529 + if (!gpiochip_line_is_valid(gpiochip, offset)) 1530 + return false; 1583 1531 /* No mask means all valid */ 1584 1532 if (likely(!gpiochip->irq.valid_mask)) 1585 1533 return true;
+62 -3
drivers/pinctrl/qcom/pinctrl-msm.c
··· 105 105 .dt_free_map = pinctrl_utils_free_map, 106 106 }; 107 107 108 + static int msm_pinmux_request(struct pinctrl_dev *pctldev, unsigned offset) 109 + { 110 + struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); 111 + struct gpio_chip *chip = &pctrl->chip; 112 + 113 + return gpiochip_line_is_valid(chip, offset) ? 0 : -EINVAL; 114 + } 115 + 108 116 static int msm_get_functions_count(struct pinctrl_dev *pctldev) 109 117 { 110 118 struct msm_pinctrl *pctrl = pinctrl_dev_get_drvdata(pctldev); ··· 174 166 } 175 167 176 168 static const struct pinmux_ops msm_pinmux_ops = { 169 + .request = msm_pinmux_request, 177 170 .get_functions_count = msm_get_functions_count, 178 171 .get_function_name = msm_get_function_name, 179 172 .get_function_groups = msm_get_function_groups, ··· 515 506 "pull up" 516 507 }; 517 508 509 + if (!gpiochip_line_is_valid(chip, offset)) 510 + return; 511 + 518 512 g = &pctrl->soc->groups[offset]; 519 513 ctl_reg = readl(pctrl->regs + g->ctl_reg); 520 514 ··· 529 517 seq_printf(s, " %-8s: %-3s %d", g->name, is_out ? "out" : "in", func); 530 518 seq_printf(s, " %dmA", msm_regval_to_drive(drive)); 531 519 seq_printf(s, " %s", pulls[pull]); 520 + seq_puts(s, "\n"); 532 521 } 533 522 534 523 static void msm_gpio_dbg_show(struct seq_file *s, struct gpio_chip *chip) ··· 537 524 unsigned gpio = chip->base; 538 525 unsigned i; 539 526 540 - for (i = 0; i < chip->ngpio; i++, gpio++) { 527 + for (i = 0; i < chip->ngpio; i++, gpio++) 541 528 msm_gpio_dbg_show_one(s, NULL, chip, i, gpio); 542 - seq_puts(s, "\n"); 543 - } 544 529 } 545 530 546 531 #else ··· 819 808 chained_irq_exit(chip, desc); 820 809 } 821 810 811 + static int msm_gpio_init_valid_mask(struct gpio_chip *chip, 812 + struct msm_pinctrl *pctrl) 813 + { 814 + int ret; 815 + unsigned int len, i; 816 + unsigned int max_gpios = pctrl->soc->ngpios; 817 + u16 *tmp; 818 + 819 + /* The number of GPIOs in the ACPI tables */ 820 + len = ret = device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0); 821 + if (ret < 0) 822 + return 0; 823 + 824 + if (ret > max_gpios) 825 + return -EINVAL; 826 + 827 + tmp = kmalloc_array(len, sizeof(*tmp), GFP_KERNEL); 828 + if (!tmp) 829 + return -ENOMEM; 830 + 831 + ret = device_property_read_u16_array(pctrl->dev, "gpios", tmp, len); 832 + if (ret < 0) { 833 + dev_err(pctrl->dev, "could not read list of GPIOs\n"); 834 + goto out; 835 + } 836 + 837 + bitmap_zero(chip->valid_mask, max_gpios); 838 + for (i = 0; i < len; i++) 839 + set_bit(tmp[i], chip->valid_mask); 840 + 841 + out: 842 + kfree(tmp); 843 + return ret; 844 + } 845 + 846 + static bool msm_gpio_needs_valid_mask(struct msm_pinctrl *pctrl) 847 + { 848 + return device_property_read_u16_array(pctrl->dev, "gpios", NULL, 0) > 0; 849 + } 850 + 822 851 static int msm_gpio_init(struct msm_pinctrl *pctrl) 823 852 { 824 853 struct gpio_chip *chip; ··· 875 824 chip->parent = pctrl->dev; 876 825 chip->owner = THIS_MODULE; 877 826 chip->of_node = pctrl->dev->of_node; 827 + chip->need_valid_mask = msm_gpio_needs_valid_mask(pctrl); 878 828 879 829 ret = gpiochip_add_data(&pctrl->chip, pctrl); 880 830 if (ret) { 881 831 dev_err(pctrl->dev, "Failed register gpiochip\n"); 832 + return ret; 833 + } 834 + 835 + ret = msm_gpio_init_valid_mask(chip, pctrl); 836 + if (ret) { 837 + dev_err(pctrl->dev, "Failed to setup irq valid bits\n"); 838 + gpiochip_remove(&pctrl->chip); 882 839 return ret; 883 840 } 884 841
+16
include/linux/gpio/driver.h
··· 288 288 struct gpio_irq_chip irq; 289 289 #endif 290 290 291 + /** 292 + * @need_valid_mask: 293 + * 294 + * If set core allocates @valid_mask with all bits set to one. 295 + */ 296 + bool need_valid_mask; 297 + 298 + /** 299 + * @valid_mask: 300 + * 301 + * If not %NULL holds bitmask of GPIOs which are valid to be used 302 + * from the chip. 303 + */ 304 + unsigned long *valid_mask; 305 + 291 306 #if defined(CONFIG_OF_GPIO) 292 307 /* 293 308 * If CONFIG_OF is enabled, then all GPIO controllers described in the ··· 399 384 400 385 /* Sleep persistence inquiry for drivers */ 401 386 bool gpiochip_line_is_persistent(struct gpio_chip *chip, unsigned int offset); 387 + bool gpiochip_line_is_valid(const struct gpio_chip *chip, unsigned int offset); 402 388 403 389 /* get driver data */ 404 390 void *gpiochip_get_data(struct gpio_chip *chip);